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c8e95f29081fe6de3cfcf1106db5d8aee1a515ab
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Author SHA1 Message Date
Cerion Armour-Brown
c8e95f2908 Cleaned up front end a fair bit. 
Consolidated spr (non-gpr/fpr) register interface
Brought together separate guest XER flags to single word
 + fixed up switchback (latter slighly broken since r1002)
Few more comments, vasserts etc.
Updated page refs to PPC32 docs



git-svn-id: svn://svn.valgrind.org/vex/trunk@1006
 2005-03-04 17:35:29 +00:00
Cerion Armour-Brown
bcc594927e fix cmd call of switchback, and deal with return err 256 
git-svn-id: svn://svn.valgrind.org/vex/trunk@1005
 2005-03-04 14:20:14 +00:00
Julian Seward
447411a551 A couple more flags-specialisation cases, derived from profiling FP 
code.



git-svn-id: svn://svn.valgrind.org/vex/trunk@1004
 2005-03-04 13:51:28 +00:00
Julian Seward
a3cfde5d22 guest state padding wibble 
git-svn-id: svn://svn.valgrind.org/vex/trunk@1003
 2005-03-04 13:50:53 +00:00
Cerion Armour-Brown
022ec327f9 Cleaning up frontend 
- inc. changing all guest-state UChars to UInts



git-svn-id: svn://svn.valgrind.org/vex/trunk@1002
 2005-03-03 17:36:23 +00:00
Cerion Armour-Brown
868bd0b7a2 Cleaned up backend a little 
git-svn-id: svn://svn.valgrind.org/vex/trunk@1001
 2005-03-03 17:21:51 +00:00
Cerion Armour-Brown
1ea0ea0cbf Dealt properly with immediates in the backend - reduces emmitted code by ~1/3 
git-svn-id: svn://svn.valgrind.org/vex/trunk@1000
 2005-03-03 13:55:22 +00:00
Cerion Armour-Brown
acdd1199d7 comments only: guest-state offsets 
git-svn-id: svn://svn.valgrind.org/vex/trunk@999
 2005-03-03 05:29:17 +00:00
Cerion Armour-Brown
0b5890807e Cleaned up isel for instns taking an RI arg 
- limiting imms to 15 bits, so don't get inappropriately sign-extended.



git-svn-id: svn://svn.valgrind.org/vex/trunk@998
 2005-03-03 05:17:08 +00:00
Cerion Armour-Brown
6c0f1ee7f0 printout stderr msg on abnormal switchback exit 
git-svn-id: svn://svn.valgrind.org/vex/trunk@997
 2005-03-03 04:49:09 +00:00
Cerion Armour-Brown
bdfd0e3ba4 Fixed sign-extend bug for compares (just putting imm in a reg, for now) - test_bzip works now! 
Load small imm's more simply in mk_iMOVds_RRI (move RI to R).




git-svn-id: svn://svn.valgrind.org/vex/trunk@996
 2005-03-03 02:21:22 +00:00
Cerion Armour-Brown
4afdddb682 Simplified sraw a little 
git-svn-id: svn://svn.valgrind.org/vex/trunk@995
 2005-03-03 02:17:06 +00:00
Julian Seward
7d4e96c4bf * toIR.c: Handle a few more insns needed to run simple X applications 
(xfontsel, xedit)
* iropt.c: add a folding rule for Xor16.



git-svn-id: svn://svn.valgrind.org/vex/trunk@994
 2005-03-02 16:05:13 +00:00
Cerion Armour-Brown
6ad7ccc5b3 Deal with last_bad == given_last_good 
Some printout changes
Ignore vex output in output test



git-svn-id: svn://svn.valgrind.org/vex/trunk@993
 2005-03-01 20:31:53 +00:00
Cerion Armour-Brown
bbf4a8bb1b Small backend printout changes only 
git-svn-id: svn://svn.valgrind.org/vex/trunk@992
 2005-03-01 20:27:49 +00:00
Julian Seward
3930065570 Add a constant folding rule for MullS32. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@991
 2005-03-01 10:19:23 +00:00
Cerion Armour-Brown
ac072bbc0b Front end bug: bad arg order for MuxOX of srw 
git-svn-id: svn://svn.valgrind.org/vex/trunk@990
 2005-03-01 09:32:01 +00:00
Cerion Armour-Brown
4e5d7bb489 Backend bug: mkFormD wasn't smallifying the imm 
(plus not-quite-right vassert)
Small change to front-end cmp DIP



git-svn-id: svn://svn.valgrind.org/vex/trunk@989
 2005-03-01 09:11:49 +00:00
Cerion Armour-Brown
0e1f3b76c9 perl script to run a binary search with switchback 
git-svn-id: svn://svn.valgrind.org/vex/trunk@988
 2005-02-28 18:48:27 +00:00
Cerion Armour-Brown
751226af45 Front-end fix for slw - _record_ the result... 
git-svn-id: svn://svn.valgrind.org/vex/trunk@987
 2005-02-28 16:43:16 +00:00
Julian Seward
63cb75b31b Gradually move popular translations towards the start of the 
table, so they can be found more quickly on subsequent lookups.


git-svn-id: svn://svn.valgrind.org/vex/trunk@986
 2005-02-28 14:26:22 +00:00
Julian Seward
c2abd1d67a Get rid of assertion which, as gcc points out, is useless. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@985
 2005-02-28 12:26:49 +00:00
Julian Seward
a9501705e8 Placate Icc in the usual way. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@984
 2005-02-27 13:39:25 +00:00
Julian Seward
01a097c0d9 A few more 64-bit folding rules. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@983
 2005-02-27 13:35:41 +00:00
Julian Seward
b0480a8c45 Comment-only change. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@982
 2005-02-27 13:31:42 +00:00
Julian Seward
3f2ec4fdba Oops! The whole point of rev 980 was to get rid of eregOfRM and 
gregOfRM.  This commit actually does get rid of them :-)



git-svn-id: svn://svn.valgrind.org/vex/trunk@981
 2005-02-27 13:25:31 +00:00
Julian Seward
bcb1c11a14 A major overhaul of the way integer register decoding is done on 
amd64.

The presence of REX bytes -- whilst apparently a simple change --
significantly complicates instruction decoding.  The main problem is
that integer register numbers are now split into two pieces, one bit
from the REX byte and three bits from the modrm byte (or wherever).
The tricky bit is to always ensure that the correct pieces are
reassembled to form 4-bit register numbers.  Prior to this commit, it
was easy to make that kind of error -- eg, conjoining the REX.B bit
with the 'g' modrm field to produce a nonsense register number.  This
commit rearranges the handling functions for integer registers to make
that kind of error much less likely, basically by not allowing you to
deal in fragments of register fields unless absolutely necessary.




git-svn-id: svn://svn.valgrind.org/vex/trunk@980
 2005-02-27 13:10:48 +00:00
Julian Seward
9c549444d9 Icc typechecker police. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@979
 2005-02-26 02:16:39 +00:00
Julian Seward
8ac7af0845 More icc-related cleanups. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@978
 2005-02-26 02:00:50 +00:00
Julian Seward
0c37d1d20b Icc typechecker police. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@977
 2005-02-26 01:55:02 +00:00
Julian Seward
9370062dad Fix some register-field decoding bugs for SSE. Nasty. There has to 
be a more foolproof way of doing this.



git-svn-id: svn://svn.valgrind.org/vex/trunk@976
 2005-02-26 01:17:42 +00:00
Cerion Armour-Brown
1f4e27af10 Fixed some front end with-zero loads 
git-svn-id: svn://svn.valgrind.org/vex/trunk@975
 2005-02-25 20:47:36 +00:00
Cerion Armour-Brown
ec0253e3d4 Fixed isel::load of small imm to reg - these are UInts: we don't want sign extension. 
Fixed frontend addi DIP



git-svn-id: svn://svn.valgrind.org/vex/trunk@974
 2005-02-25 18:46:14 +00:00
Julian Seward
7e5d17bece Add toUInt. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@973
 2005-02-25 18:36:07 +00:00
Julian Seward
247970b6b3 Icc typechecker fixes. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@972
 2005-02-25 18:31:27 +00:00
Julian Seward
b02f88aea6 Another round of placating icc's typechecker. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@971
 2005-02-25 17:40:26 +00:00
Cerion Armour-Brown
8aba2d8a5f Simplified front-end IR encoding for some subtracts 
git-svn-id: svn://svn.valgrind.org/vex/trunk@970
 2005-02-25 16:43:08 +00:00
Cerion Armour-Brown
18d3a5b8d3 Alu32::SUB was broken in the backend. 
Moved Alu32::SUB to it's own instruction: Sub32
---
PPC32 only implements subf (= sub from), which takes form
subf(ic) regD, regA, regB|immB  => rD = rB|immB - rA
Hence Iop_Sub32 is given an RI as the left arg...
---



git-svn-id: svn://svn.valgrind.org/vex/trunk@969
 2005-02-25 16:39:58 +00:00
Julian Seward
68dddfe089 Even more amd64 floating point bits and pieces. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@968
 2005-02-25 14:22:12 +00:00
Cerion Armour-Brown
fb8daa1014 Fix flags define & printout last run translation after all... 
git-svn-id: svn://svn.valgrind.org/vex/trunk@967
 2005-02-25 13:40:31 +00:00
Cerion Armour-Brown
6056135f9c Fixes to getReg_field, putReg_field 
git-svn-id: svn://svn.valgrind.org/vex/trunk@966
 2005-02-25 13:39:10 +00:00
Julian Seward
aa4d1e2dcc Fill in a bunch more amd64 floating point cases. Some non-trivial 
FP programs are beginning to work now.


git-svn-id: svn://svn.valgrind.org/vex/trunk@965
 2005-02-25 13:03:03 +00:00
Cerion Armour-Brown
4cb4bc2ade Re-arranged switchback::run_simulator a little, so can print translation of current bb (so if test breaks @ N, we can switchback @ N and N gets printed) 
git-svn-id: svn://svn.valgrind.org/vex/trunk@964
 2005-02-25 12:33:12 +00:00
Cerion Armour-Brown
71d16e21cf Correction to iselCC::IexTmp 
git-svn-id: svn://svn.valgrind.org/vex/trunk@963
 2005-02-25 12:08:02 +00:00
Cerion Armour-Brown
a851121cb9 Added a couple of unhandled isel instrs: 
IselStmt::Ist_Tmp::Ity_I1
iselCondCode::Iex_Tmp



git-svn-id: svn://svn.valgrind.org/vex/trunk@962
 2005-02-25 11:16:58 +00:00
Cerion Armour-Brown
4bec5bcc68 Fix to guest-ppc32 subfic 
git-svn-id: svn://svn.valgrind.org/vex/trunk@961
 2005-02-25 10:23:46 +00:00
Julian Seward
7d761cb6a7 Fill in a huge number of amd64 floating point cases, and start to 
reinstate the old x87 instruction decoder.



git-svn-id: svn://svn.valgrind.org/vex/trunk@960
 2005-02-25 02:48:47 +00:00
Cerion Armour-Brown
0ae631d5bf Fixed a backend shift bug: src/dst were swapped in emitted code. 
Also fixed an assembly printf for Set32.



git-svn-id: svn://svn.valgrind.org/vex/trunk@959
 2005-02-24 20:01:02 +00:00
Cerion Armour-Brown
b4705d1d06 Another go at fixing the rotate mask 
git-svn-id: svn://svn.valgrind.org/vex/trunk@958
 2005-02-24 16:59:17 +00:00
Cerion Armour-Brown
12d61352fc Fixed a rotate bug: IBM bit labelling got me again 
git-svn-id: svn://svn.valgrind.org/vex/trunk@957
 2005-02-24 14:57:12 +00:00