Julian Seward 4eaa80103d amd64 back end: generate 32-bit shift instructions for 32-bit IR shifts. ...

Until now these have been handled by possibly widening the value to 64 bits,
if necessary, followed by a 64-bit shift.  That wastes instructions and code
space.

2020-01-02 09:23:46 +01:00

..

auxprogs

Cleanup GPL header address notices by using http://www.gnu.org/licenses/

2019-05-26 20:07:51 +02:00

priv

amd64 back end: generate 32-bit shift instructions for 32-bit IR shifts.

2020-01-02 09:23:46 +01:00

pub

Tidy up ir_opt.c aspects relating to the 'grail' work. In particular:

2020-01-02 06:42:21 +01:00

switchback

Remove the definitons of Ptr_to_ULong and ULong_to_Ptr.

2015-01-07 20:14:48 +00:00

test

Cleanup GPL header address notices by using http://www.gnu.org/licenses/

2019-05-26 20:07:51 +02:00

unused

Update copyright dates to 2010 and change license to standard GPL2+.

2010-05-03 21:38:49 +00:00

useful

Cleanup GPL header address notices by using http://www.gnu.org/licenses/

2019-05-26 20:07:51 +02:00

HACKING.README

Update copyright dates to 2010 and change license to standard GPL2+.

2010-05-03 21:38:49 +00:00

LICENSE.GPL

Cleanup GPL header address notices by using http://www.gnu.org/licenses/

2019-05-26 20:07:51 +02:00

LICENSE.README

Cleanup GPL header address notices by using http://www.gnu.org/licenses/

2019-05-26 20:07:51 +02:00

Makefile-gcc

mips: code refactoring (NFC)

2019-03-27 18:42:05 +00:00

nanoarm.orig

Test driver stuff for arm.

2004-11-25 13:08:26 +00:00

TODO.txt

Update.

2005-04-22 21:21:09 +00:00