mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-04 02:18:37 +00:00
This set of tests covers MIPS r6 specific instructions: none/tests/mips32/MIPS32r6int none/tests/mips32/branch_pc none/tests/mips32/branches_r6 none/tests/mips32/fp_r6 none/tests/mips32/pc_instructions_r6 none/tests/mips64/MIPS64r6int none/tests/mips64/branch_pc none/tests/mips64/branches_r6 none/tests/mips64/fp_r6 none/tests/mips64/pc_instructions_r6 none/tests/mips64/r6_instructions The following tests had to be changed to be applicaple for Rev6: none/tests/libvex_test.c none/tests/mips32/LoadStore none/tests/mips32/LoadStore1 none/tests/mips32/MIPS32int none/tests/mips32/MoveIns none/tests/mips32/branches none/tests/mips32/change_fp_mode none/tests/mips32/mips32_dsp none/tests/mips32/vfp none/tests/mips64/arithmetic_instruction none/tests/mips64/branches none/tests/mips64/fpu_arithmetic none/tests/mips64/fpu_load_store none/tests/mips64/load_store none/tests/mips64/load_store_multiple none/tests/mips64/move_instructions The following tests are not applicable for Rev6: none/tests/mips32/fpu_branches none/tests/mips32/unaligned_load_store none/tests/mips64/branch_and_jump_instructions none/tests/mips64/change_fp_mode none/tests/mips64/fpu_branches none/tests/mips64/load_store_unaligned none/tests/mips64/unaligned_load none/tests/mips64/unaligned_load_store. Contributed by: Tamara Vlahovic, Aleksandar Rikalo and Aleksandra Karadzic. Related BZ issue - #387410.
40 lines
1.2 KiB
Plaintext
40 lines
1.2 KiB
Plaintext
addiupc
|
|
addiupc :: out - ra 0, RSval 0x00000000
|
|
addiupc :: out - ra 4, RSval 0x00000004
|
|
addiupc :: out - ra 10, RSval 0x00000010
|
|
addiupc :: out - ra 40, RSval 0x00000040
|
|
addiupc :: out - ra 100, RSval 0x00000100
|
|
addiupc :: out - ra 400, RSval 0x00000400
|
|
addiupc :: out - ra 1000, RSval 0x00001000
|
|
addiupc :: out - ra 4000, RSval 0x00004000
|
|
|
|
aluipc
|
|
aluipc :: out - ra 400000, RSval 0x00000000
|
|
aluipc :: out - ra 440000, RSval 0x00000004
|
|
aluipc :: out - ra 500000, RSval 0x00000010
|
|
aluipc :: out - ra 800000, RSval 0x00000040
|
|
aluipc :: out - ra 1400000, RSval 0x00000100
|
|
aluipc :: out - ra 4400000, RSval 0x00000400
|
|
aluipc :: out - ra 10400000, RSval 0x00001000
|
|
aluipc :: out - ra 40400000, RSval 0x00004000
|
|
|
|
auipc
|
|
auipc :: out - ra 0, RSval 0x00000000
|
|
auipc :: out - ra 40000, RSval 0x00000004
|
|
auipc :: out - ra 100000, RSval 0x00000010
|
|
auipc :: out - ra 400000, RSval 0x00000040
|
|
auipc :: out - ra 1000000, RSval 0x00000100
|
|
auipc :: out - ra 4000000, RSval 0x00000400
|
|
auipc :: out - ra 10000000, RSval 0x00001000
|
|
auipc :: out - ra 40000000, RSval 0x00004000
|
|
|
|
lwpc
|
|
lwpc :: out: 0x25
|
|
lwpc :: out: 0x25
|
|
lwpc :: out: 0x25
|
|
lwpc :: out: 0x25
|
|
lwpc :: out: 0x25
|
|
lwpc :: out: 0x25
|
|
lwpc :: out: 0x25
|
|
lwpc :: out: 0x25
|