ftmemsim-valgrind/none/tests/mips64/unaligned_load.c
Petar Jovanovic 9fc2bfba5c mips: add tests for mips32/mips64 R6
This set of tests covers MIPS r6 specific instructions:

  none/tests/mips32/MIPS32r6int
  none/tests/mips32/branch_pc
  none/tests/mips32/branches_r6
  none/tests/mips32/fp_r6
  none/tests/mips32/pc_instructions_r6

  none/tests/mips64/MIPS64r6int
  none/tests/mips64/branch_pc
  none/tests/mips64/branches_r6
  none/tests/mips64/fp_r6
  none/tests/mips64/pc_instructions_r6
  none/tests/mips64/r6_instructions

The following tests had to be changed to be applicaple for Rev6:

  none/tests/libvex_test.c

  none/tests/mips32/LoadStore
  none/tests/mips32/LoadStore1
  none/tests/mips32/MIPS32int
  none/tests/mips32/MoveIns
  none/tests/mips32/branches
  none/tests/mips32/change_fp_mode
  none/tests/mips32/mips32_dsp
  none/tests/mips32/vfp

  none/tests/mips64/arithmetic_instruction
  none/tests/mips64/branches
  none/tests/mips64/fpu_arithmetic
  none/tests/mips64/fpu_load_store
  none/tests/mips64/load_store
  none/tests/mips64/load_store_multiple
  none/tests/mips64/move_instructions

The following tests are not applicable for Rev6:

  none/tests/mips32/fpu_branches
  none/tests/mips32/unaligned_load_store

  none/tests/mips64/branch_and_jump_instructions
  none/tests/mips64/change_fp_mode
  none/tests/mips64/fpu_branches
  none/tests/mips64/load_store_unaligned
  none/tests/mips64/unaligned_load
  none/tests/mips64/unaligned_load_store.

Contributed by:
  Tamara Vlahovic, Aleksandar Rikalo and Aleksandra Karadzic.

Related BZ issue - #387410.
2018-02-01 18:37:28 +01:00

43 lines
1.1 KiB
C

#include <stdio.h>
#define N 15
#define SOLL 8 /* size of unsigned long long */
unsigned long long memSrc[] = {
0x12345658121f1e1f, 0,
3, -1,
0x232f2e2f56568441, 0x242c2b2b1236548c,
0xffffffff252a2e2b, 0x262d2d2a4521dddd,
0x3f343f3e22222222, 0x3e353d3c41231548,
0x363a3c3b45421212, 0x3b373b3a4545afcb,
0x454f4e4556984525, 0xfffffffffffffffc,
0x474d474c55aaaaaa, 0x4a484a4c65665659
};
int main()
{
int i, index;
unsigned long long outLoad;
#if (__mips_isa_rev < 6)
for (i = 8; i < N * SOLL ; i++) {
outLoad = 0;
__asm__ __volatile__(
"move $t0, %1" "\n\t"
"move $t1, %2" "\n\t"
"daddu $t0, $t0, $t1" "\n\t"
"move $t1, $zero" "\n\t"
"ldl $t1, 0($t0)" "\n\t"
"ldr $t1, 7($t0)" "\n\t"
"move %0, $t1" "\n\t"
: "=r" (outLoad)
: "r" (memSrc), "r" (i)
: "t0", "t1"
);
index = (i / SOLL) % N;
printf("i: %d, memSrc[%d]: 0x%llx, outLoad: 0x%llx\n",
i, index, memSrc[index], outLoad);
}
#endif
return 0;
}