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Author SHA1 Message Date
Cerion Armour-Brown
a17cecb0ca increased N_HREG_USAGE for host-ppc32 
git-svn-id: svn://svn.valgrind.org/vex/trunk@886
 2005-02-11 13:46:13 +00:00
Cerion Armour-Brown
3eefe94930 Added the first instrs (load,store) to emit_PPC32Instr() 
Corrected some assembly printouts




git-svn-id: svn://svn.valgrind.org/vex/trunk@885
 2005-02-11 13:38:15 +00:00
Cerion Armour-Brown
1db7c95cb1 Added Div32 - that's the last for this .orig file! 
git-svn-id: svn://svn.valgrind.org/vex/trunk@884
 2005-02-10 22:35:34 +00:00
Cerion Armour-Brown
53d36370cb Added CLZ 
Fixed Unary32
Added genSpill_PPC32, genReload_PPC32



git-svn-id: svn://svn.valgrind.org/vex/trunk@883
 2005-02-10 19:51:03 +00:00
Cerion Armour-Brown
9f0fbe90eb hdefs: MulL, MFence 
isel:
  Iop_64HIto32
  Iop_64to32
  iselInt64Expr:
    Iop_MullU32
    Iop_MullS32
  Ist_MFence

Had a go at implementing long multiplies (last shortcut was wrong)




git-svn-id: svn://svn.valgrind.org/vex/trunk@882
 2005-02-10 16:11:35 +00:00
Cerion Armour-Brown
bf16999d1f hdefs: CMov32, Set32 
isel:
  Iex_LDle
  match for 64HIto32(MullU32(expr,expr))
  1Uto32, 1Uto8
  Iex_Mux0X
  Iop_Cmp*
  Ist_Exit

Changed Unary32 to use hreg only (no imm for this on ppc32)
Fixed a reg usage mistake with call/goto



git-svn-id: svn://svn.valgrind.org/vex/trunk@881
 2005-02-10 15:03:19 +00:00
Cerion Armour-Brown
794292cb44 Dealt with some cases where imm > 0xFFFF 
git-svn-id: svn://svn.valgrind.org/vex/trunk@880
 2005-02-10 11:39:43 +00:00
Julian Seward
3a3abc6d7e Fill in many amd64 front end and back end cases. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@879
 2005-02-10 02:07:43 +00:00
Cerion Armour-Brown
47b609ab7e Changed the register setup a little 
git-svn-id: svn://svn.valgrind.org/vex/trunk@878
 2005-02-09 21:01:22 +00:00
Julian Seward
ea1f136cd7 Print useful diagnostics if reg-alloc bombs due to bogus live ranges 
in the input code.


git-svn-id: svn://svn.valgrind.org/vex/trunk@877
 2005-02-09 19:13:29 +00:00
Cerion Armour-Brown
db1e84af44 A whole bunch more ppc32 backend code 
- just the isel stuff so far, no assembly



git-svn-id: svn://svn.valgrind.org/vex/trunk@876
 2005-02-09 17:29:49 +00:00
Cerion Armour-Brown
29abc83a54 keeping arm .orig files 
git-svn-id: svn://svn.valgrind.org/vex/trunk@875
 2005-02-09 13:03:06 +00:00
Julian Seward
e53fb172ed More amd64 back end bits and pieces. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@874
 2005-02-08 20:10:04 +00:00
Cerion Armour-Brown
a88a62f824 A first swing at getting ppc32 backend working. 
Done: tmp, get, put, load, store



git-svn-id: svn://svn.valgrind.org/vex/trunk@873
 2005-02-08 19:40:24 +00:00
Cerion Armour-Brown
9242c1e6ea removed host=bigendian assertion for now. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@872
 2005-02-08 19:38:39 +00:00
Julian Seward
2380fb0907 More amd64 instruction set support. This includes (in toIR) more stuff 
to make %rip-relative addressing work properly.


git-svn-id: svn://svn.valgrind.org/vex/trunk@871
 2005-02-08 15:02:39 +00:00
Julian Seward
0437812bcc Add a new IR type -- 128-bit integral (I128) and a small collection of 
primops operating on it.  Use this to implement amd64 64x64->128
multiplies (will also be useful for divides).



git-svn-id: svn://svn.valgrind.org/vex/trunk@870
 2005-02-08 11:13:09 +00:00
Cerion Armour-Brown
9b86bf4eed This belonged with last nights changes... r868 
git-svn-id: svn://svn.valgrind.org/vex/trunk@869
 2005-02-08 11:12:02 +00:00
Cerion Armour-Brown
3c69ebfa37 Another attempt at abstracting the register access... not certain i've 
succeeded... would like to abstract the 'setFlags_' functions too...
I want C++! boohoo...

Also tidied up dis_int_arith() & co., setting flags at function end.




git-svn-id: svn://svn.valgrind.org/vex/trunk@868
 2005-02-08 02:19:25 +00:00
Julian Seward
53c35e60c2 Consistently rename all existing IROps which operate on 128-bit values 
to make it clear they operate on 128-bit *vector* values.  This is so
as to facilitate introduction of a 128-bit *scalar* type into IR
without causing confusion.



git-svn-id: svn://svn.valgrind.org/vex/trunk@867
 2005-02-07 23:47:38 +00:00
Julian Seward
8264d18514 Make rflag-thunk evaluation work (ghelpers); fix various missing cases 
(toIR, isel).



git-svn-id: svn://svn.valgrind.org/vex/trunk@866
 2005-02-07 18:55:29 +00:00
Julian Seward
4e291f7fc5 Fix assembly of amd64 amodes: the special cases that apply to %rsp on 
x86 also (sometimes) also apply to %r12 on amd64; ditto %rbp and %r13.
Just for everybody's maximum confusion.



git-svn-id: svn://svn.valgrind.org/vex/trunk@865
 2005-02-07 17:47:21 +00:00
Julian Seward
d4e2839ffb Fix %rip-relative addressing, which uses the address of the _next_ 
instruction, not the current one.  Grrr.  This is inconvenient since
it means we sometimes need to know how long an insn is before it is
decoded, and that information is only available after is is decoded.

Currently we make guesses about insn length when a %rip-relative
address appears.  If such a guess is made, it is then checked for
correctness after the decode, so at least all errors should get picked
up.



git-svn-id: svn://svn.valgrind.org/vex/trunk@864
 2005-02-07 15:02:25 +00:00
Julian Seward
157eeeee80 Fix guest-state layout descriptor. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@863
 2005-02-07 14:59:28 +00:00
Julian Seward
e5dcf5d3fe Typechecker police. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@862
 2005-02-07 03:12:19 +00:00
Julian Seward
2955c11bc3 More typechecker police. Hopefully this doesn't break anything. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@861
 2005-02-07 03:11:17 +00:00
Julian Seward
c4aab86b68 Suppress another warning. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@860
 2005-02-07 02:34:22 +00:00
Julian Seward
8a100a4da0 Typechecker police (a big commit, but all harmless). 
git-svn-id: svn://svn.valgrind.org/vex/trunk@859
 2005-02-07 02:33:58 +00:00
Julian Seward
1c5945eff5 Typechecker police. There are a couple of unresolved warnings which 
actually point out some interesting inconsistencies.



git-svn-id: svn://svn.valgrind.org/vex/trunk@858
 2005-02-07 01:42:18 +00:00
Julian Seward
0d5cc040e1 Typechecker police 
git-svn-id: svn://svn.valgrind.org/vex/trunk@857
 2005-02-07 01:39:17 +00:00
Julian Seward
2c1e2edde0 Make iropt.c compile cleanly with icc in paranoid mode. Along the way, 
find and fix what looked like a bug in the folding rule for Iop_32to1.


git-svn-id: svn://svn.valgrind.org/vex/trunk@856
 2005-02-07 01:11:31 +00:00
Julian Seward
6d551741ea More 32-bit build cleanups. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@855
 2005-02-07 00:20:43 +00:00
Julian Seward
2e798a8c20 Get a clean(er) build on amd64. Also a couple of amd64 fe/be fixes. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@854
 2005-02-07 00:17:12 +00:00
Julian Seward
04149a3b0b Define ULong_to_Ptr / Ptr_to_ULong to help clean up 64/32 bit issues. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@853
 2005-02-07 00:00:50 +00:00
Julian Seward
c61edd07ae A few more bits and pieces of amd64 instruction support. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@852
 2005-02-05 18:24:47 +00:00
Julian Seward
c8d75a58e7 Fill in many amd64 assembler cases. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@851
 2005-02-05 14:34:18 +00:00
Julian Seward
474760698a Even more startup paranoia. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@850
 2005-02-05 14:32:18 +00:00
Julian Seward
219771799c Add missing commas. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@849
 2005-02-05 14:13:00 +00:00
Cerion Armour-Brown
5d533616a0 Small correction to getReg_CR() 
git-svn-id: svn://svn.valgrind.org/vex/trunk@848
 2005-02-05 14:01:57 +00:00
Cerion Armour-Brown
23da0b97f2 Cleaned up thunk functions. 
Abstracted non-GPR register access - safer & cleaner.



git-svn-id: svn://svn.valgrind.org/vex/trunk@847
 2005-02-05 13:45:57 +00:00
Julian Seward
52df8ca399 Fill in some more amd64 assembler cases. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@846
 2005-02-05 12:00:14 +00:00
Julian Seward
8c2cdf9d3a Allow easy switching of guest-host arch pairs using ifdefs. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@845
 2005-02-04 21:18:55 +00:00
Julian Seward
2094d61f0a A couple of debugging hacks to allow work to proceed on a front end 
without a corresponding working back end.


git-svn-id: svn://svn.valgrind.org/vex/trunk@844
 2005-02-04 21:18:16 +00:00
Julian Seward
354ef43965 Make a start on the amd64 assembler. Bleh. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@843
 2005-02-04 21:16:48 +00:00
Julian Seward
379421ad05 'movabsq' instruction definitions. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@842
 2005-02-04 21:15:39 +00:00
Julian Seward
e0154ca0a1 Fix bogus assertion. (How long has that been there?) 
git-svn-id: svn://svn.valgrind.org/vex/trunk@841
 2005-02-04 21:14:52 +00:00
Julian Seward
05c23f7afc A few more amd64 isel cases. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@840
 2005-02-04 21:13:55 +00:00
Cerion Armour-Brown
c70920e120 Yay! return.orig gets totally chomped! 
- Implemented sc, lwarx, stwcrx.
- Plus a couple of corrections



git-svn-id: svn://svn.valgrind.org/vex/trunk@839
 2005-02-04 18:29:05 +00:00
Cerion Armour-Brown
42114e95ed Support host-ppc32... 
git-svn-id: svn://svn.valgrind.org/vex/trunk@838
 2005-02-04 16:28:19 +00:00
Cerion Armour-Brown
b9345ff768 Get the PPC32 back-end show on the road. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@837
 2005-02-04 16:17:07 +00:00