Cerion Armour-Brown
973949d2b3
Implemented checks for FPSCR and VSCR on leaving dispatcher
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- required flags: FPSCR[RM] == 0, VSCR[NJ] == 1
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5155
2005-11-16 20:22:11 +00:00
Julian Seward
f306ed7f00
The absolute bare minimum changes needed to make it work on an
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integer-only PPC processor (PPC440GX).
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5110
2005-11-13 01:59:22 +00:00
Julian Seward
77a40e2556
Hook the ppc32 stuff up to the revised CPU detection machinery, and
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add a bunch of code to detect what the cpu can do at startup by
catching SIGILLs. Shame PPC doesn't offer any sane mechanism for
finding out what instruction subsets the CPU is capable of (a la
x86/amd64 cpuid).
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5108
2005-11-13 00:30:22 +00:00
Cerion Armour-Brown
4d0a44c474
Comments from Greg Parker re ppc ABI conventions.
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git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5077
2005-11-11 01:00:36 +00:00
Cerion Armour-Brown
3acbecc3c6
Save/Restore condition register, and VRSAVE register in core dispatch loop.
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Cleaned up stack according to common abi constraints.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5055
2005-11-09 14:13:08 +00:00
Cerion Armour-Brown
207b24c793
store & load callee-saved floating-point and vector registers in core dispatch loop.
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git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5047
2005-11-08 22:03:07 +00:00
Julian Seward
073c102b95
Use standard syntax for the rlwinm.
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git-svn-id: svn://svn.valgrind.org/valgrind/trunk@4946
2005-10-19 10:14:19 +00:00
Nicholas Nethercote
4ef4aabbd0
Make the dispatch files platform-specific, not just arch-specific,
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as requested by Greg Parker. (The ppc32/Darwin dispatch loop is
different to the ppc32/Linux one, for example.)
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@4843
2005-10-02 14:48:09 +00:00
