Check whether the target platform is meant to have an FPU before executing
tests that make use of a floating-point unit.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14571
Extend mips_features with "hard-float" query to which mips_features will
respond whether or not the platform is meant to have a floating point unit.
The query is not a runtime check, but a built-time check.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14570
Tool files shall use tl_assert not vg_assert.
Fix code accordingly.
Adapted check_headers_and_includes to make sure the code
stays clean in that respect.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14542
Otherwise, we get an error for the 2nd dir if specifying 2 directories e.g.
perl tests/vg_regtest cachegrind/tests callgrind/tests
-- Running tests in cachegrind/tests ----------------------------------
chdir: valgrind ./chdir
clreq: valgrind -q ./clreq
dlclose: valgrind ./dlclose
notpower2: valgrind --I1=32768,8,64 --D1=24576,6,64 --LL=3145728,12,64 ./../../tests/true
wrap5: valgrind ./../../memcheck/tests/wrap5
-- Running tests in cachegrind/tests/x86 ------------------------------
fpu-28-108: valgrind ./fpu-28-108
-- Finished tests in cachegrind/tests/x86 ------------------------------
-- Finished tests in cachegrind/tests ----------------------------------
`callgrind/tests' neither a directory nor a readable test file/name
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14487
An address below the sp will be described as being on a stack, but below sp.
The stack for such an address is found in the registered stacks.
Also, if there is a guard page at the end of the stack (lowest address)
an address in this page will be described as being in thread guard page.
A guard page is recognised as being a page not readable/writable/executable.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14399
to add PPC64 LE support. The other two patches can be found in Bugzillas
334384 and 334834. Note, there are no VEX changes in this patch.
PP64 Little Endian test case fixes.
This patch adds new LE and BE expect files where needed. In other
cases, the test was fixed to run correctly on LE and BE using based on
testing to see which platform is being used.
Where practical, the test cases have been changed so that the output
produced for BE and LE will be identical. The test cases that require
a major rewrite to make the output identical for BE and LE simply
had an additional expect file added.
Signed-off-by: Carl Love <carll@us.ibm.com>
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14240
to add PPC64 LE support. The other two patches can be found in Bugzillas
334384 and 334836.
POWER PC, add the functional Little Endian support, patch 2
The IBM POWER processor now supports both Big Endian and Little Endian.
The ABI for Little Endian also changes. Specifically, the function
descriptor is not used, the stack size changed, accessing the TOC
changed. Functions now have a local and a global entry point. Register
r2 contains the TOC for local calls and register r12 contains the TOC
for global calls. This patch makes the functional changes to the
Valgrind tool. The patch makes the changes needed for the
none/tests/ppc32 and none/tests/ppc64 Makefile.am. A number of the
ppc specific tests have Endian dependencies that are not fixed in
this patch. They are fixed in the next patch.
Per Julian's comments renamed coregrind/m_dispatch/dispatch-ppc64-linux.S
to coregrind/m_dispatch/dispatch-ppc64be-linux.S Created new file for LE
coregrind/m_dispatch/dispatch-ppc64le-linux.S. The same was done for
coregrind/m_syswrap/syscall-ppc-linux.S.
Signed-off-by: Carl Love <carll@us.ibm.com>
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14239
to add PPC64 LE support. The other two patches can be found in Bugzillas
334834 and 334836. The commit does not have a VEX commit associated with it.
POWER PC, add initial Little Endian support
The IBM POWER processor now supports both Big Endian and Little Endian.
This patch renames the #defines with the name ppc64 to ppc64be for the BE
specific code. This patch adds the Little Endian #define ppc64le to the
Additionally, a few functions are renamed to remove BE from the name if the
function is used by BE and LE. Functions that are BE specific have BE put
in the name.
The goals of this patch is to make sure #defines, function names and
variables consistently use PPC64/ppc64 if it refers to BE and LE,
PPC64BE/ppc64be if it is specific to BE, PPC64LE/ppc64le if it is LE
specific. The patch does not break the code for PPC64 Big Endian.
The test files memcheck/tests/atomic_incs.c, tests/power_insn_available.c
and tests/power_insn_available.c are also updated to the new #define
definition for PPC64 BE.
Signed-off-by: Carl Love <carll@us.ibm.com>
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14238
as this makes the inner stacktraces easier to understand
and also it exercises the inline unwinding somewhat already,
waiting for a (possible) activation by default of --read-inline-info
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14101
instruction: dcbzl" submitted by Anmol P. Paralkar <paralkar@freescale.com>
The patch adds the following files:
none/tests/ppc64/data-cache-instructions.vgtest
none/tests/ppc64/data-cache-instructions.c
none/tests/ppc64/data-cache-instructions.stdout.exp
none/tests/ppc64/data-cache-instructions.stderr.exp
none/tests/ppc32/data-cache-instructions.stdout.exp
none/tests/ppc32/data-cache-instructions.c
none/tests/ppc32/data-cache-instructions.vgtest
none/tests/ppc32/data-cache-instructions.stderr.exp
tests/power_insn_available.c
The following files are modified:
none/tests/ppc32/Makefile.am
none/tests/ppc64/Makefile.am
tests/Makefile.am
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13791
Detect Cavium Octeon II CPU. This is needed as a prerequisite for
successful execution of cavium-octeon2 specific tests.
Patch by Zahid Anwar.
Related to Bugzilla issue 326444.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13782
Move memcheck/mc_replace_strmem.c to shared/vg_replace_strmem.c and
add several intercepts for SSE-variants. Include that source file from
drd/drd_strmem_intercepts.c, helgrind/hg_intercepts.c and
memcheck/mc_replace_strmem.c.
Merge memcheck/tests/filter_memcpy into tests/filter_stderr_basic.
Update tests/check_headers_and_includes.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13719
Also allow a .git directory in check_headers_and_includes to help
people using a git mirror of valgrind/VEX svn.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13601
are not against the grain.
Wrap this script together with 'check_makefile_consistency' into
'post_regtest_checks' and invoke that from the toplevel Makefile. So we can
easily add new checkers in the future.
Add a new make target 'post-regtest-checks' to just run those checks
and nothing else.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13570
(1) Detect availability of pthread_setname_np. Ignore testcases
memcheck/tests/threadname[_xml] if not available.
(2) Enable _GNU_SOURCE to avold compiler warnings.
(3) In threadname_xml filter out stackframes referring to system
libraries. Added tests/filter_xml_frames to do that.
(4) Adjust .exp files as needed
(5) Do not ship stdout.exp for memcheck/tests/threadname[_xml].
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13557
As this file is now detecting mips64/Cavium boards, we are renaming it to
reflect that. The functional change is that mips_features now can detect
Cavium board and allow Cavium-specific tests to be run.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13551
The IBM Power ISA 2.07 has been published on power.org, and IBM's new POWER8
processor is under development to implement that ISA. This patch provides
initial runtime and testsuite support for running Valgrind on POWER8 systems
running a soon-to-be released Linux distribution. This Linux distro will
include a POWER8-tuned libc that uses a subset of the new instructions from
ISA 2.07. Since virtually all applications link with libc, it would be
impossible to run an application under Valgrind on this distro without adding
support for these new instructions to Valgrind, so that's the intent of this
patch. Note that applications built on this distro will *not* employ new POWER8
instructions by default. There are roughly 150 new instructions in the Power
ISA 2.07, including hardware transaction management (HTM). Support for these
new instructions (modulo the subset included in this bug) will be added to
Valgrind in a phased approach, similar to what we did for Power ISA 2.06.
Bugzilla 322294, VEX commit 2740
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13494
See companion patch VEX r2719.
Patch by Maran Pakkirisamy (maranp@linux.vnet.ibm.com).
Part of fixing BZ #307113
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13387
Necessary changes to Valgrind to support MIPS64LE on Linux.
Minor cleanup/style changes embedded in the patch as well.
The change corresponds to r2687 in VEX.
Patch written by Dejan Jevtic and Petar Jovanovic.
More information about this issue:
https://bugs.kde.org/show_bug.cgi?id=313267
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13292
Add a testcase.
Patch by Maran (maranp@linux.vnet.ibm.com).
Part of fixing BZ 307113.
See also VEX r2560.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13120
This is infintely less painful than to find out how to invert
the condition in a test prerequisite.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12928
seconday platform (x86 and ppc32, respectively) is not available.
Add -DVGA_SEC_xxxxx and -DVGP_SEC_... to the GCC command line
indicating that a seconday platform is supported. Make arch_test.c
recognise those flags.
Fixes bugzilla #296983.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12556
* perf/vg_perf:
Similarly to tests/vg_regtest, perf/vg_perf now accepts the 3
optional arguments:
--outer-valgrind
--outer-tool
--outer-args
This allows easy analysis or comparison of performance between
different Valgrind versions (e.g. using callgrind, or cachegrind/cg_diff).
* See README_DEVELOPERS for more details.
* vg_regtest modified so as to use the 'in-place' build of inner, rather
than the installed version.
* added option --smc-check=all-non-file to vg_perf and vg_regtest
outer default arguments (needed when evaluating a Valgrind which does
translation chaining).
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12496
instruction support -- VEX side changes. See #295221.
This patch adds test cases. Also adds some minor Memcheck
instrumentation tweaks necessitated by the IR changes.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12476
A '3 lines how to':
perl tests/vg_regtest --outer-valgrind=../trunk_untouched/install/bin/valgrind --all
(the outer results for a test xxx is in xxx.outer.log)
To run with another tool (e.g. drd), add the argument --outer-tool=drd
Still to do/things to improve:
* Most (inner) tests are successful when running under an outer
memcheck. Need to analyse the reasons of remaining failures.
* The memcheck annotations in m_mallocfree.c can be improved:
- A superblock is marked 'undefined', it should rather be marked
'no access'.
- When a free block is splitted, the remaining free block is
not made 'no access'. Instead, it is made 'undefined'.
=> this decreases the chance to find bugs.
=> this is not very efficient (e.g. the rest of a superblock
is often marked undefined repetitively).
Similarly, the free block created by VG_(arena_memalign)
is marked 'undefined'. 'No access' would be preferrable.
- mkInuseBlock marks the new block as undefined. This is probably
not needed, as VALGRIND_MALLOCLIKE_BLOCK will do it already.
- VG_(arena_malloc) should give the requested size to
VALGRIND_MALLOCLIKE_BLOCK, not the malloc usable size,
as this decreases the chance to find buffer overrun bugs.
But giving the requested size is tricky (see comments in
the code).
* need to do memcheck annotations in m_poolalloc.c
so as to allow leak checking for pool allocated elements.
* vg_regtest.in
- should analyse the results of the outer and should
produce a separate result for the tests for which
the outer detects an error or a memory leak or ...
Changes done:
README_DEVELOPERS: document the new outer/inner features.
manual-core.xml: document the new sim-hint no-inner-prefix
tests/outer_inner.supp: new file, containing the suppressions for inner.
vg_regtest.in: implement new args --outer-valgrind, --outer-tool, --outer-args.
m_mallocfree.c: annotations for memcheck.
m_libcprint.c: handle the new sim-hint no-inner-prefix
m_main.c: do an (early) parse of --sim-hints
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12441
