zenithsiz/ftmemsim-valgrind
1
0
Fork 0
mirror of https://github.com/Zenithsiz/ftmemsim-valgrind.git synced 2026-02-14 14:58:07 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
602 Commits 1 Branch 0 Tags
76d8f00edcc3dcdfd6bcc9e733f3e14795dec556
Commit Graph

602 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Julian Seward
76d8f00edc Make a start on SSE for x86 guest. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@602
 2004-11-30 18:51:59 +00:00
Nicholas Nethercote
45357238cd Added AMD64 skeleton, just defining LibVEX_GuestAMD64_initialise(). 
git-svn-id: svn://svn.valgrind.org/vex/trunk@601
 2004-11-30 15:56:47 +00:00
Julian Seward
0e29835d76 Loop unroller: do not unroll loops in which the conditional branch is 
not Ijk_Boring, as that will cause events that should be passed to the
caller's scheduler, not to be.



git-svn-id: svn://svn.valgrind.org/vex/trunk@600
 2004-11-30 13:40:29 +00:00
Julian Seward
f5a2a1606e Add -Wmissing-prototypes as a flag. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@599
 2004-11-30 13:37:21 +00:00
Julian Seward
4f365980c3 guest x86: fix x87 FP rounding modes enough so that 
none/tests/x86/insn_fpu works correctly.



git-svn-id: svn://svn.valgrind.org/vex/trunk@598
 2004-11-30 13:18:37 +00:00
Julian Seward
a5ff6638bb guest x87: Add enough x87 FP gunk to get through 
none/tests/x86/insn_fpu without dying.



git-svn-id: svn://svn.valgrind.org/vex/trunk@597
 2004-11-30 12:30:11 +00:00
Nicholas Nethercote
b1be842d36 Make Valgrind's AMD64 and ARM ports compile again. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@596
 2004-11-30 11:37:48 +00:00
Julian Seward
26338fd250 Create a new mechanism: "emulation warnings", which is a way for Vex 
to report to whatever is using it that it cannot emulate precisely.
Net result is that a bb can exit with the guest state pointer set to
VEX_TRC_EMWARN.  In this case, the (mandatory) guest state psuedo-reg
called "guest_EMWARN" holds a value of type VexEmWarn, indicating the
kind of problem encounted.

Use this to warn about approximations in the x87 FPU simulation:
unmasked exceptions not supported, round to +inf/-inf not supported,
precisions other than 80-bit not supported.



git-svn-id: svn://svn.valgrind.org/vex/trunk@595
 2004-11-29 19:57:54 +00:00
Nicholas Nethercote
9167c47f04 Added %rip to the AMD64 guest state. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@594
 2004-11-28 16:05:46 +00:00
Julian Seward
2e5eae7fe5 x86g_dirtyhelper_CPUID: Claim to be a P55C (Intel Pentium/MMX) 
git-svn-id: svn://svn.valgrind.org/vex/trunk@593
 2004-11-26 19:34:34 +00:00
Julian Seward
c9f5e132ec x86 guest: finish off MMX instructions. Blargh. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@592
 2004-11-26 19:15:38 +00:00
Julian Seward
bf229ea067 x86 guest: implement fsave/frstor instructions 
git-svn-id: svn://svn.valgrind.org/vex/trunk@591
 2004-11-26 17:57:40 +00:00
Julian Seward
a962f1bd3c Make VEX define the special thread-return-code values it uses. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@590
 2004-11-26 13:18:19 +00:00
Julian Seward
4578ef5697 Handle Ijk_Yield properly. This fixes V regtest "none/tests/yield". 
git-svn-id: svn://svn.valgrind.org/vex/trunk@589
 2004-11-26 13:01:47 +00:00
Julian Seward
73835ad313 Implement "rep nop" (P4 pause). 
git-svn-id: svn://svn.valgrind.org/vex/trunk@588
 2004-11-26 12:18:51 +00:00
Julian Seward
d95d9f6278 Test driver stuff for arm. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@587
 2004-11-25 13:08:26 +00:00
Julian Seward
c398540562 Build stuff for arm. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@586
 2004-11-25 13:07:51 +00:00
Julian Seward
5d6a73c1fc Add a skeletal ARM insn decoder. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@585
 2004-11-25 13:07:02 +00:00
Julian Seward
dedf93ac48 Start adding some ARM guest infrastructure stuff, but as a result get 
diverted into a massive renaming of the x86 guest stuff so as to avoid
namespace clashes.



git-svn-id: svn://svn.valgrind.org/vex/trunk@584
 2004-11-25 02:46:58 +00:00
Julian Seward
dd546662d2 Add a pseudo-guest-register to hold the 'next syscall number.' 
git-svn-id: svn://svn.valgrind.org/vex/trunk@583
 2004-11-24 11:22:31 +00:00
Nicholas Nethercote
b36d3bfca1 Make Vex less verbose, so regression tests pass again. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@582
 2004-11-23 17:11:49 +00:00
Julian Seward
4573c9a9f6 Make a start on a guest state definition for AMD64. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@581
 2004-11-23 14:07:46 +00:00
Julian Seward
1b8dffc406 Do 32Uto64. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@580
 2004-11-23 00:19:06 +00:00
Julian Seward
186d92f18f Add a dummy ARM guest state include that Valgrind can be compiled 
against.



git-svn-id: svn://svn.valgrind.org/vex/trunk@579
 2004-11-22 16:02:34 +00:00
Julian Seward
30ca18634a Make VEX's "Char" type always be signed, so as to bring it into line 
with Valgrind conventions.



git-svn-id: svn://svn.valgrind.org/vex/trunk@578
 2004-11-22 12:55:45 +00:00
Julian Seward
f109e70857 gcc-2.95 build fixes. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@577
 2004-11-22 11:29:33 +00:00
Julian Seward
d46357cb3b rec_alloc.c is defunct; reg_alloc2.c replaced it a while back. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@576
 2004-11-22 11:26:51 +00:00
Julian Seward
9edc865c3e Fix behaviour so that out-of-range shifts behave the same as on a 
PIII.



git-svn-id: svn://svn.valgrind.org/vex/trunk@575
 2004-11-21 19:22:35 +00:00
Julian Seward
a4d5612b43 Test each insn 25000 times with random data, rather than just once or 
twice.



git-svn-id: svn://svn.valgrind.org/vex/trunk@574
 2004-11-21 19:21:36 +00:00
Julian Seward
784eb72b6d Fix various failings in the MMX simulation code. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@573
 2004-11-21 17:41:09 +00:00
Julian Seward
0c8b3501cd Add MMX shift-by-vector (not correct yet). 
git-svn-id: svn://svn.valgrind.org/vex/trunk@572
 2004-11-21 17:04:50 +00:00
Julian Seward
805c7cab5f Complete MMX and/or/xor/andn. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@571
 2004-11-21 13:45:05 +00:00
Julian Seward
d74671c7d3 Implement a bunch more MMX insns. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@570
 2004-11-21 12:30:18 +00:00
Julian Seward
ab7ff28c22 Some more MMX insns. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@569
 2004-11-20 13:17:04 +00:00
Julian Seward
8bdbe7aba3 Partial support for MMX, using a low-performance scheme. 
aAlso gets rid of some old FP stuff from toIR.c that wasn't ever going
to get used.



git-svn-id: svn://svn.valgrind.org/vex/trunk@568
 2004-11-19 22:17:29 +00:00
Julian Seward
9a15edf80c An MMX test program. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@567
 2004-11-18 15:56:56 +00:00
Julian Seward
c4e28a3954 Nuke this useless bunch of tests. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@566
 2004-11-18 15:38:37 +00:00
Julian Seward
c06717bc05 Restore ability to run with no instrumentation. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@565
 2004-11-18 13:44:15 +00:00
Julian Seward
54c67ca962 CSE enhancements: handle binop(const,temp), and get rid of 
unused load-from-memory case


git-svn-id: svn://svn.valgrind.org/vex/trunk@564
 2004-11-18 13:43:24 +00:00
Julian Seward
4bbc49a210 x86 guest: finally redo marshalling of register-passed parameters so 
that it's always correct (hopefully).  If any of the regparm
parameters look like they might need a fixed register, compute them
all into temporaries and then move all the temps at the end into the
arg regs.  OTOH, if all the args are simple enough so that they
definitely don't need fixed regs to compute, compute them directly
into the argument registers, thereby saving some reg-reg moves.



git-svn-id: svn://svn.valgrind.org/vex/trunk@563
 2004-11-17 13:06:21 +00:00
Julian Seward
aa4cf9776e Use improved 80 <-> 64 bit FP conversion routines, as developed in 
useful/fp_80_64.c



git-svn-id: svn://svn.valgrind.org/vex/trunk@562
 2004-11-16 02:07:18 +00:00
Julian Seward
5a08277c4f Further improve accuracy of 80->64 bit conversions, by rounding 
correctly in the case where the infinitely precise value is mid-way
between the two closest representable values.  None of this has the
slightest affect on any test cases, unfortunately.



git-svn-id: svn://svn.valgrind.org/vex/trunk@561
 2004-11-16 02:06:09 +00:00
Julian Seward
d101955e06 Program for testing IEEE gradual underflow. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@560
 2004-11-16 00:56:35 +00:00
Julian Seward
983660317b Do at least a passable job converting denormals and therefore 
significantly improve accuracy on conversions of numbers in the range
+/- 1e-308 down to about +/- 1e-325.



git-svn-id: svn://svn.valgrind.org/vex/trunk@559
 2004-11-16 00:38:19 +00:00
Julian Seward
59afb4cec9 Properly sanity check IRConst values. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@558
 2004-11-15 15:46:26 +00:00
Julian Seward
dd054f05b5 Rename the boolean field in IRStmt_Exit from 'cond' to 'guard' to be 
consistent with other places where boolean guards are stored.



git-svn-id: svn://svn.valgrind.org/vex/trunk@557
 2004-11-15 15:30:21 +00:00
Julian Seward
fd77102469 Rename all the _Bit types to I1 so as to be consistent with all the 
other notation used.



git-svn-id: svn://svn.valgrind.org/vex/trunk@556
 2004-11-15 15:21:17 +00:00
Julian Seward
a54ff960d3 Rename INVALID_IRTEMP to IRTemp_INVALID to be consistent with 
other *_INVALID symbols.


git-svn-id: svn://svn.valgrind.org/vex/trunk@555
 2004-11-15 14:22:12 +00:00
Julian Seward
221e2e8c3b Get rid of some unused primops: And1 Or1 Neg8/16/32/64. 
git-svn-id: svn://svn.valgrind.org/vex/trunk@554
 2004-11-15 13:54:26 +00:00
Julian Seward
1247c331f0 Record stuff that needs to be done 
git-svn-id: svn://svn.valgrind.org/vex/trunk@553
 2004-11-15 13:30:26 +00:00