In case of out of memory, Valgrind will output
the state of the address space manager and of the arena.
Then it will output a message to inform the user about the out of memory.
In case out of memory happens again while outputting the aspacemgr
or arena info, then another trial is done to only output the user msg.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13077
The test succeeds on amd64, but fails on x86, with the following diff:
+Syscall param semctl(arg) points to uninitialised byte(s)
+ at 0x........: semctl@@GLIBC_2.2 (semctl.c:109)
+ by 0x........: main (sem.c:36)
+ Address 0x........ is on thread 1's stack
+
+Syscall param semctl(arg) points to uninitialised byte(s)
+ at 0x........: semctl@@GLIBC_2.2 (semctl.c:109)
+ by 0x........: main (sem.c:43)
+ Address 0x........ is on thread 1's stack
+
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13073
(allows to have the list of opened fds and the associated info
on request from GDB or from the shell, using vgdb)
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13072
Also fix all usages of the wordFM data structure. Once upon a time
wordFM used Words but now it uses UWords.
Likewise for WordBag.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13070
Update trace cache warning so that it is the same as before the cache reorg
(avoid failure of some tests on Pentium4 as the warning output
must match what is filtered by cachegrind/tests/filter_stderr)
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13060
Add support to properly handle TEQ, ADD and SUB instructions that generate
exceptions on MIPS platforms. A SignalException test for MIPS32 has also been
added, so we can cover more cases.
This resolves:
none/tests/faultstatus
gdbserver_tests/mcsignopass
gdbserver_tests/mcsigpass
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13059
New function write_cache_info to dump what was detected for debugging
purposes.
New function cache_info_is_sensible to ensure that autodetected
cache info lives up to the promises made in libvex.h.
Moved the trace-cache related kludgery to cachegrind where it belongs.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13053
patch from Mark Wielaard.
(with small modifications).
Also clarified some comments related to the resume reply.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13052
Makes it easier to figure out what was not initialised.
Thanks, once again, to Julien Grall.
From: Ian Campbell <ian.campbell@citrix.com>
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13050
This is pretty dodgy on 64 bit systems.
Thanks to Julien Grall.
From: Ian Campbell <ian.campbell@citrix.com>
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13049
all take const HChar * arguments.
__FILE__ and __func__ expand into string literals (or character
arrays initialised by them), as do strings created by the preprocessor
e.g. #stuff.
This change reduces the number of warnings from 17000+ to ~5500
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13039
For example, options below are silently "accepted"+ignored:
valgrind --profile-heaps=yes --max-stackframes=35 memcheck/tests/trivialleak
valgrind --profile-heaps=oui --max-stackframes=3.141592654 memcheck/tests/trivialleak
Also fixed the on-line --help output for option --core-redzone-size
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13037
It's reorg only. No new cache autodetection stuff has been added.
coregrind
pub_tool_cpuid.h is removed as it is no longer exposed to tools.
Its contents has moved to pub_core_cpuid.h.
New file: coregrind/m_cache.c to contain the autodetect code for
cache configurations and define other cache characteristics that
cannot be autodetected (i.e. icaches_maintain_coherence). Most of
cg-arch/x86-amd64.c was moved here. The cache detection code for
x86-64 needs to be fixed to properly initialise VexCacheInfo. It
currently has cachegrind bias.
m_cache.c exports a single function (to coregrind):
VG_(machine_get_cache_info)(VexArchInfo *vai)
This function is called from VG_(machine_get_hwcaps) after hwcaps have
been detected.
cachegrind
Remove cachegrind/cg-{ppc32,ppc43,arm,mips32,s390x,x86-amd64}.c
With the exception of x86/mamd64 those were only establishing a
default cache configuration and that is so small a code snippet that
a separate file is no longer warranted. So, the code was moved to
cg-arch.c. Code was added to extract the relevant info from
x86-amd64.
New function maybe_tweak_LLc which captures the code to massage the
LLc cache configuration into something the simulator can handle. This
was originally in cg-x86-amd64.c but should be used to all architectures.
Changed warning message about missing cache auto-detect feature
to be more useful. Adapted filter-stderr scripts accordingly.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13028
