Note: this just unbreaks the build on avx + non_adx capable systems
(such as gcc farm gcc20).
adx capable system should probably be better handled:
* ./tests/x86_amd64_features cannot check for adx flag
(so fb_test_amd64 is run if compiled and system is avx capable, which
might give problems if gcc/as can compile the test, but the cpu
cannot execute adx instructions)
* on an adx capable system, a native run of cpuid tells it is adx capable
but under valgrind, cpuid reports the valgrind synthetic cpu is not adx
capable.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16401
- Fix mffs instruction, FPSCR, C_FPCC field access is not
working correctly.
- Fix xscmpexpdp again still had a bug.
- Remove duplicate tests from test_isa_3_0.c
- Comment out he tests for the new ISA 3.0B instructions. There
seem to be some issues between the simulator and early HW that
need to be sorted out.
Bugzilla 379925, VEX commit 3375
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16396
Update inline assembly with .set noreorder.
This prevents assembler from reordering the instructions.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16394
Follow up to r16372.
The test is now built if the compiler understands AVX
instructions. The test is executed if the host speaks AVX
is well. Finally bogus printf format flags were fixed as
they caused the output to be inconsistent on Linux and Solaris.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16393
Fix for stxvx instruction.
Add LE support for stxv instruction
Fix for the xscmpexpdp instruction
Bugzilla: 379703
VEX commit: 3374
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16391
condition codes. This is originally by Fabrice Bellard (GPL2+'d), with MD5
support from Alexander Peslyak (public domain) and has been extended to cover
ADOX and ADCX as per bug #360415.
The program generates more than 800MB of output, which it MD5 sums, so the final
MD5 sum serves as the pass/fail check. It takes roughly a minute to run.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16372
- Invalid memory access fixed;
- Inappropriate immediate value on ROTR test changed;
- Stricter tests for LWL/LWR instructions.
Patch by Aleksandar Rikalo.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16363
Compiler produces position independent executables (PIE) by default
which gets in the way of some unit tests.
Fixes BZ#377066.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16349
mffscdrni, mffsce, mffscrn, mffscrni, mffsl. vmsumudm.
Forgot to add the new files.
Vex commit 3359 Has the source code changes for the instruction and OV32, CS32
support
Valgrind commit 16329 updated the existing files
This commit adds all the new files.
Valgrind bugzilla 378931
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16330
mffscdrni, mffsce, mffscrn, mffscrni, mffsl. vmsumudm.
Additionally, the OV32 and CA32 bits were introduced in ISA 3.0 but
Valgrind add support for setting these bits for ISA 3.0. The OV32 and CA32
bits must now be set on a number of pre ISA 3.0 instructions. So now the
instructions produce different results in the XER register. Thus we need pre
and post ISA 3.0 expect files. Command line options were added to thee
pre ISA test cases so instructions that didn't change could be run with one
set of command line args. The instructions that have different XER results
are run using a different set of command line args. The tests were split into
two, one for instructions that didn't change on for instructions that do
change under ISA 3.0. We then create ISA3.0 expect files only for the tests
that run differently. By doing this we minimized the size of the expect files
needed.
Vex commit 3359 Has the source code changes for the instruction and OV32, CS32
support
This commit is all the test case changes, adding the new test case files.
Valgrind bugzilla 378931
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16329
This implements a fallback LL/SC implementation as described in bug 344524.
Valgrind side changes:
* Command line plumbing for --sim-hints=fallback-llsc
* memcheck: handle new arm64 guest state in memcheck/mc_machine.c
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16309
Update the test cvm_atomic_thread so it can be executed on BE boards too.
Reuse the stdout.exp file.
Based on patch from Tamara Vlahovic.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16298
Patch from Matthias Schwarzott (zzam@gentoo.org). The patch removes
a volatile memory read which was only there to stop compilers warning
about |format| being unused.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16290
Leave the old exp file that covers cases in which __addtf3 and __subtf3
did not take into account rounding modes. New exp file is the same file
that already exists in mips32 folder, so we just create a symbolic link
to it.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16201
Fix 373192 Calling posix_spawn in glibc 2.24 completely broken
Functionally, this patch just does the following 2 changes to the
fork clone handling:
* It does not mask anymore CLONE_VFORK :
The only effect of this flag is to suspend the parent, waiting for
the child to either exit or execve.
If some applications depends on this synchronisation, better keep it,
as it will not harm to suspend the parent valgrind waiting for the
child valgrind to exit or execve.
* In case the guest calls the clone syscall providing a non zero client stack,
set the child guest SP after the syscall, before executing guest instructions.
Not setting the guest stack ptr was the source of the problem reported
in the bugs.
This also adds a test case none/tests/linux/clonev.
Before this patch, test gives a SEGV, which is fixed by the patch.
The patch is however a lot bigger : this fix was touching some (mostly
identical/duplicated) code in all the linux platforms.
So, the clone/fork code has been factorised as much as possible.
This removes about 1700 lines of code.
This has been tested on:
* amd64
* x86
* ppc64 be and le
* ppc32
* arm64
This has been compiled on but *not really tested* on:
* mips64 (not too clear how to properly build and run valgrind on gcc22)
It has *not* been compiled and *not* tested on:
* arm
* mips32
* tilegx
* darwin (normally, no impact)
* solaris (normally, no impact)
The changes are relatively mechanical, so it is not impossible that
it will compile and work out of the box on these platforms.
Otherwise, questions welcome.
A few points of interest:
* Some platforms did have a typedef void vki_modify_ldt_t,
and some platforms had no definition for this type at all.
To make it easier to factorise, for such platforms, the following has
been used:
typedef char vki_modify_ldt_t;
When the sizeof vki_modify_ldt_t is > 1, then the arg syscall is checked.
This is somewhat a hack, but was simplifying the factorisation.
* for mips32/mips64 and tilegx, there is a strange unconditional assignment
of 0 to a register (guest_r2 on mips, guest_r0 on tilegx).
Unclear what this is, in particular because this is assigned whatever
the result of the syscall (success or not).
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16186
Add BE variant of exp file for cvm_atomic test.
This fixes none/tests/mips64/cvm_atomic for Cavium MIPS64 BE systems.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16183
Allow execution of none/tests/mips32/round_fpu64 test if it is built with
-mfpxx. It gets us more coverage eventually.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16181
When signal SIGINT was used, it got propagated to the parent shell
and therefore the regression test suite was terminated.
With SIGTERM only the parent exits, as is supposed.
Verified that this changed test case still reproduces the original problem
on Linux and Solaris, when r16140 is temporarily undone.
Follow up to r16140 and r16143 and BZ#372600.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16147
Note that it is unclear if the PRE syscall for rt_sigsuspend
is properly setting up a temporary mask in the thread state
tmp_sig_mask: if an handler is called while a thread is
calling sigsuspend, the mask during the handler run must be
the temporary mask set by sigsuspend.
It is not clear if/where the valgrind sigframe builder/handler
sets the tmp_sig_mask to the value as expected by the user
(i.e. the value of the temporary mask which was given to
the sigsuspend syscall)
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16141
The none/tests/nocwd creates a really deep temporary directory structure
that is also inaccessible after the test. This causes issues with some
build wrappers like koji which fail to cleanup such deep subdirectories.
So explicitly cleanup the directory after the test.
https://bugzilla.redhat.com/show_bug.cgi?id=1390282
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16134
Option is added, parsed, explained in --help
but is not used yet by any other code.
So, apart of the --help, no functional effect.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16124
The 64-bit compares are not supported in 32-bit mode. Change the 64-bit
compares to 32-bit compares when doing byte compares. Add routine for
doing V128 GT compare using 32-bit compares.
The clean caller support was missing for 32-bit mode
Update the expected output file jm_vec_isa_2_07.stdout.exp
Bugzilla 371128 VEX commit 3271
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16072
Add the tests cases (in none/tests/mips32/vfp.c) that expose the error
with luxc1/suxc1 that was fixed by VEX r3262.
Patch by Aleksandra Karadzic.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16040
Force "hardfloat" mode for inline assembly that uses FPU instructions,
but pop original mode at the end of the assembly. Unhandled FPU
instructions will be handled by the signal handler (env_unsup_insn).
Skip MIPS specific tests for FPU if the code gets compiled for soft-
float.
This should allow Valgrind to be compiled as a soft-float binary, but
that executable should be used for soft-float systems only.
Related VEX change - r3261.
Related issue - BZ#351282.
Patch by Aleksandar Rikalo.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16039
Clear floating point condition codes in the test after calling external
function (in this case printf), as it might have clobbered fcc bits in
fcsr.
This resolves none/tests/mips64/round.c failure on some systems.
Patch by Aleksandra Karadzic.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16038
This patch makes the following updates:
- Update the configure scripts to fix a configure/build issue seen on Power 7
- Update the ISA 3.0 hwcaps string.
- Update the ISA 3.0 ifdef value to be consistent with the hwcaps string
The patch was submitted by Will Schmidt. Patch reviewed and tested by Carl Love
on Power 7, Power 8 LE and BE, ISA 3.0 simulator for LE and BE.
Bugzilla 369175
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16034
In testing issues with the new ISA 3.0 instructions in BE mode, it was
found that we needed some more unique values in the operands to catch
various errors. The issue is a sigle 32-bit value was replicated four
times for a V128 operand. The result is testing loads and stores where
the word or half word order was swizzled couln't be detected because
they were the same. By making the 32-bit chunks unique we were able
to catch additional errors.
The VEX instruction fixes was committed in VEX commit 3260.
Bugzilla 369175
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16032
