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https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-14 14:58:07 +00:00
More tuning of the eflags machinery.
git-svn-id: svn://svn.valgrind.org/vex/trunk@739
This commit is contained in:
@@ -765,6 +765,12 @@ IRExpr* guest_x86_spechelper ( Char* function_name,
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binop(Iop_CmpEQ32, cc_dep1, cc_dep2));
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}
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if (isU32(cc_op, X86G_CC_OP_SUBL) && isU32(cond, X86CondNZ)) {
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/* long sub/cmp, then NZ --> test dst!=src */
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return unop(Iop_1Uto32,
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binop(Iop_CmpNE32, cc_dep1, cc_dep2));
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}
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if (isU32(cc_op, X86G_CC_OP_SUBL) && isU32(cond, X86CondL)) {
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/* long sub/cmp, then L (signed less than)
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--> test dst <s src */
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@@ -853,6 +859,15 @@ IRExpr* guest_x86_spechelper ( Char* function_name,
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return unop(Iop_1Uto32,binop(Iop_CmpLE32S, cc_dep1, mkU32(0)));
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}
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if (isU32(cc_op, X86G_CC_OP_LOGICL) && isU32(cond, X86CondBE)) {
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/* long and/or/xor, then BE
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LOGIC sets ZF according to the result and makes CF be zero.
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BE computes (CF | ZF), but CF is zero, so this reduces ZF
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-- which will be 1 iff the result is zero. Hence ...
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*/
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return unop(Iop_1Uto32,binop(Iop_CmpEQ32, cc_dep1, mkU32(0)));
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}
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/*---------------- LOGICW ----------------*/
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if (isU32(cc_op, X86G_CC_OP_LOGICW) && isU32(cond, X86CondZ)) {
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@@ -894,14 +909,18 @@ IRExpr* guest_x86_spechelper ( Char* function_name,
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/* This can happen, as a result of x87 FP compares: "fcom ... ;
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fnstsw %ax ; sahf ; jbe" for example. */
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if (isU32(cc_op, X86G_CC_OP_COPY) && isU32(cond, X86CondBE)) {
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if (isU32(cc_op, X86G_CC_OP_COPY) &&
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(isU32(cond, X86CondBE) || isU32(cond, X86CondNBE))) {
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/* COPY, then BE --> extract C and Z from dep1, and test (C
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or Z == 1). */
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/* COPY, then NBE --> extract C and Z from dep1, and test (C
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or Z == 0). */
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UInt nnn = isU32(cond, X86CondBE) ? 1 : 0;
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return
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unop(
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Iop_1Uto32,
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binop(
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Iop_CmpNE32,
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Iop_CmpEQ32,
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binop(
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Iop_And32,
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binop(
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@@ -911,7 +930,7 @@ IRExpr* guest_x86_spechelper ( Char* function_name,
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),
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mkU32(1)
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),
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mkU32(0)
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mkU32(nnn)
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)
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);
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}
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