Converted all functions visible from vg_skin.h with names in CamelCaps to

use_under_scores instead, to be consistent.

Also added some missing 'extern's on function declarations in vg_skin.h.

Also added a quick note in vg_regtest.in on the simplest way to run regression
tests.


git-svn-id: svn://svn.valgrind.org/valgrind/trunk@1135
This commit is contained in:
Nicholas Nethercote 2002-09-30 10:23:54 +00:00
parent f0e299960b
commit 4cd67f62e6
18 changed files with 491 additions and 483 deletions

View File

@ -510,7 +510,7 @@ Bool SK_(read_extra_suppression_info) ( Int fd, Char* buf, Int nBuf,
Bool eof;
if (s->skind == ParamSupp) {
eof = VG_(getLine) ( fd, buf, nBuf );
eof = VG_(get_line) ( fd, buf, nBuf );
if (eof) return False;
s->string = VG_(strdup)(buf);
}
@ -1699,7 +1699,7 @@ static void add_to_freed_queue ( ShadowChunk* sc )
vg_freed_list_start = sc1->next;
}
sc1->next = NULL; /* just paranoia */
VG_(freeShadowChunk) ( sc1 );
VG_(free_ShadowChunk) ( sc1 );
}
}
@ -1732,10 +1732,11 @@ void SK_(alt_free) ( ShadowChunk* sc, ThreadState* tst )
/*--- Our instrumenter ---*/
/*------------------------------------------------------------*/
#define uInstr1 VG_(newUInstr1)
#define uInstr2 VG_(newUInstr2)
#define uLiteral VG_(setLiteralField)
#define newTemp VG_(getNewTemp)
#define uInstr1 VG_(new_UInstr1)
#define uInstr2 VG_(new_UInstr2)
#define uLiteral VG_(set_lit_field)
#define uCCall VG_(set_ccall_fields)
#define newTemp VG_(get_new_temp)
UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
{
@ -1747,7 +1748,7 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
UInstr* u_in;
Int t_addr, t_size;
cb = VG_(allocCodeBlock)();
cb = VG_(alloc_UCodeBlock)();
cb->nextTemp = cb_in->nextTemp;
for (i = 0; i < cb_in->used; i++) {
@ -1770,19 +1771,16 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
do_LOAD_or_STORE:
uInstr1(cb, CCALL, 0, TempReg, t_addr);
switch (u_in->size) {
case 4: VG_(setCCallFields)(cb, (Addr)&SK_(helperc_ACCESS4),
1, 1, False );
case 4: uCCall(cb, (Addr)&SK_(helperc_ACCESS4), 1, 1, False );
break;
case 2: VG_(setCCallFields)(cb, (Addr)&SK_(helperc_ACCESS2),
1, 1, False );
case 2: uCCall(cb, (Addr)&SK_(helperc_ACCESS2), 1, 1, False );
break;
case 1: VG_(setCCallFields)(cb, (Addr)&SK_(helperc_ACCESS1),
1, 1, False );
case 1: uCCall(cb, (Addr)&SK_(helperc_ACCESS1), 1, 1, False );
break;
default:
VG_(panic)("addrcheck::SK_(instrument):LOAD/STORE");
}
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
case FPU_R:
@ -1792,18 +1790,17 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
uInstr2(cb, MOV, 4, Literal, 0, TempReg, t_size);
uLiteral(cb, u_in->size);
uInstr2(cb, CCALL, 0, TempReg, t_addr, TempReg, t_size);
VG_(setCCallFields)(cb, (Addr)&SK_(fpu_ACCESS_check),
2, 2, False );
VG_(copyUInstr)(cb, u_in);
uCCall(cb, (Addr)&SK_(fpu_ACCESS_check), 2, 2, False );
VG_(copy_UInstr)(cb, u_in);
break;
default:
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
}
}
VG_(freeCodeBlock)(cb_in);
VG_(free_UCodeBlock)(cb_in);
return cb;
}

View File

@ -484,12 +484,12 @@ static __inline__ BBCC* get_BBCC(Addr bb_orig_addr, UCodeBlock* cb,
/*------------------------------------------------------------*/
// SSS: do something about all these...
#define uInstr1 VG_(newUInstr1)
#define uInstr2 VG_(newUInstr2)
#define uInstr3 VG_(newUInstr3)
#define uLiteral VG_(setLiteralField)
#define uCCall VG_(setCCallFields)
#define newTemp VG_(getNewTemp)
#define uInstr1 VG_(new_UInstr1)
#define uInstr2 VG_(new_UInstr2)
#define uInstr3 VG_(new_UInstr3)
#define uLiteral VG_(set_lit_field)
#define uCCall VG_(set_ccall_fields)
#define newTemp VG_(get_new_temp)
static Int compute_BBCC_array_size(UCodeBlock* cb)
{
@ -701,7 +701,7 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
BBCC_node = get_BBCC(orig_addr, cb_in, /*remove=*/False, &BB_seen_before);
BBCC_ptr0 = BBCC_ptr = (Addr)(BBCC_node->array);
cb = VG_(allocCodeBlock)();
cb = VG_(alloc_UCodeBlock)();
cb->nextTemp = cb_in->nextTemp;
t_CC_addr = t_read_addr = t_write_addr = t_data_addr1 = t_data_addr2 =
@ -748,7 +748,7 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
t_read_addr = newTemp(cb);
uInstr2(cb, MOV, 4, TempReg, u_in->val1, TempReg, t_read_addr);
data_size = u_in->size;
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
case FPU_R:
@ -758,7 +758,7 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
data_size = ( u_in->size <= MIN_LINE_SIZE
? u_in->size
: MIN_LINE_SIZE);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* Note that we must set t_write_addr even for mod instructions;
@ -777,7 +777,7 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
data_size = ( u_in->size <= MIN_LINE_SIZE
? u_in->size
: MIN_LINE_SIZE);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
@ -795,7 +795,7 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
/* Call helper */
uInstr1(cb, CCALL, 0, TempReg, t_CC_addr);
uCCall(cb, (Addr) & log_1I_0D_cache_access_JIFZ, 1, 1, False);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
@ -809,7 +809,7 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
if (instrumented_Jcond) {
vg_assert(CondAlways == u_in->cond);
vg_assert(i+1 == cb_in->used);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
instrumented_Jcond = False; /* reset */
break;
}
@ -953,7 +953,7 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
}
/* Copy original UInstr (INCEIP or JMP) */
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
/* Update BBCC_ptr, EIP, de-init read/write temps for next instr */
BBCC_ptr += CC_size;
@ -965,7 +965,7 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
break;
default:
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
}
}
@ -973,7 +973,7 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
/* Just check everything looks ok */
vg_assert(BBCC_ptr - BBCC_ptr0 == BBCC_node->array_size);
VG_(freeCodeBlock)(cb_in);
VG_(free_UCodeBlock)(cb_in);
return cb;
#undef INVALID_DATA_SIZE

View File

@ -147,7 +147,7 @@ static ShadowChunk* getShadowChunk ( Addr a, /*OUT*/ShadowChunk*** next_ptr )
return curr;
}
void VG_(freeShadowChunk) ( ShadowChunk* sc )
void VG_(free_ShadowChunk) ( ShadowChunk* sc )
{
VG_(arena_free) ( VG_AR_CLIENT, (void*)sc->data );
VG_(arena_free) ( VG_AR_CORE, sc );
@ -310,7 +310,7 @@ void die_and_free_mem ( ThreadState* tst, ShadowChunk* sc,
if (VG_(needs).alternative_free)
SK_(alt_free) ( sc, tst );
else
VG_(freeShadowChunk) ( sc );
VG_(free_ShadowChunk) ( sc );
}

View File

@ -172,29 +172,29 @@ UInt SK_(handle_client_request)(ThreadState* tst, UInt* arg_block)
UCode extension
------------------------------------------------------------------ */
void SK_(emitExtUInstr)(UInstr* u, RRegSet regs_live_before)
void SK_(emit_XUInstr)(UInstr* u, RRegSet regs_live_before)
{
non_fund_panic("SK_(emitExtUInstr)");
non_fund_panic("SK_(emit_XUInstr)");
}
Bool SK_(saneExtUInstr)(Bool beforeRA, Bool beforeLiveness, UInstr* u)
Bool SK_(sane_XUInstr)(Bool beforeRA, Bool beforeLiveness, UInstr* u)
{
non_fund_panic("SK_(saneExtUInstr)");
non_fund_panic("SK_(sane_XUInstr)");
}
Char* SK_(nameExtUOpcode)(Opcode opc)
Char* SK_(name_XUOpcode)(Opcode opc)
{
non_fund_panic("SK_(nameExtUOpcode)");
non_fund_panic("SK_(name_XUOpcode)");
}
void SK_(ppExtUInstr)(UInstr* u)
void SK_(pp_XUInstr)(UInstr* u)
{
non_fund_panic("SK_(ppExtUInstr)");
non_fund_panic("SK_(pp_XUInstr)");
}
Int SK_(getExtRegUsage)(UInstr* u, Tag tag, RegUse* arr)
Int SK_(get_Xreg_usage)(UInstr* u, Tag tag, RegUse* arr)
{
non_fund_panic("SK_(getExtTempUsage)");
non_fund_panic("SK_(get_Xreg_usage)");
}
/* ---------------------------------------------------------------------

View File

@ -459,7 +459,7 @@ void VG_(show_all_errors) ( void )
#define VG_ISSPACE(ch) (((ch)==' ') || ((ch)=='\n') || ((ch)=='\t'))
Bool VG_(getLine) ( Int fd, Char* buf, Int nBuf )
Bool VG_(get_line) ( Int fd, Char* buf, Int nBuf )
{
Char ch;
Int n, i;
@ -546,16 +546,16 @@ static void load_one_suppressions_file ( Char* filename )
for (i = 0; i < VG_N_SUPP_CALLERS; i++) supp->caller[i] = NULL;
supp->skin_supp.string = supp->skin_supp.extra = NULL;
eof = VG_(getLine) ( fd, buf, N_BUF );
eof = VG_(get_line) ( fd, buf, N_BUF );
if (eof) break;
if (!STREQ(buf, "{")) goto syntax_error;
eof = VG_(getLine) ( fd, buf, N_BUF );
eof = VG_(get_line) ( fd, buf, N_BUF );
if (eof || STREQ(buf, "}")) goto syntax_error;
supp->sname = VG_(arena_strdup)(VG_AR_CORE, buf);
eof = VG_(getLine) ( fd, buf, N_BUF );
eof = VG_(get_line) ( fd, buf, N_BUF );
if (eof) goto syntax_error;
@ -583,7 +583,7 @@ static void load_one_suppressions_file ( Char* filename )
VG_(add_to_msg)(", '%s'", buf);
}
while (True) {
eof = VG_(getLine) ( fd, buf, N_BUF );
eof = VG_(get_line) ( fd, buf, N_BUF );
if (eof) goto syntax_error;
if (STREQ(buf, "}"))
break;
@ -597,7 +597,7 @@ static void load_one_suppressions_file ( Char* filename )
/* "i > 0" ensures at least one caller read. */
for (i = 0; i < VG_N_SUPP_CALLERS; i++) {
eof = VG_(getLine) ( fd, buf, N_BUF );
eof = VG_(get_line) ( fd, buf, N_BUF );
if (eof) goto syntax_error;
if (i > 0 && STREQ(buf, "}"))
break;
@ -689,11 +689,11 @@ Bool supp_matches_callers(CoreSupp* su, Char caller_obj[][M_VG_ERRTXT],
for (i = 0; su->caller[i] != NULL; i++) {
switch (su->caller_ty[i]) {
case ObjName: if (VG_(stringMatch)(su->caller[i],
caller_obj[i])) break;
case ObjName: if (VG_(string_match)(su->caller[i],
caller_obj[i])) break;
return False;
case FunName: if (VG_(stringMatch)(su->caller[i],
caller_fun[i])) break;
case FunName: if (VG_(string_match)(su->caller[i],
caller_fun[i])) break;
return False;
default: VG_(panic)("is_suppressible_error");
}

View File

@ -35,8 +35,8 @@
/*--- Renamings of frequently-used global functions. ---*/
/*------------------------------------------------------------*/
#define nameIReg VG_(nameOfIntReg)
#define nameISize VG_(nameOfIntSize)
#define nameIReg VG_(name_of_int_reg)
#define nameISize VG_(name_of_int_size)
#define dis VG_(print_codegen)
@ -140,7 +140,7 @@ void VG_(print_UInstr_histogram)(void)
(UInt)(histogram[i].size / (double)histogram[i].counts + 0.5);
VG_(printf)("%-7s:%8u (%2u%%), avg %2dB (%2u%%) |",
VG_(nameUOpcode)(True, i),
VG_(name_UOpcode)(True, i),
histogram[i].counts, count_pc,
avg_size, size_pc);
@ -194,7 +194,7 @@ __inline__ void VG_(emitL) ( UInt l )
VG_(emitB) ( (l >> 24) & 0x000000FF );
}
__inline__ void VG_(newEmit) ( void )
__inline__ void VG_(new_emit) ( void )
{
if (dis)
VG_(printf)("\t %4d: ", emitted_code_used );
@ -369,7 +369,7 @@ static __inline__ UChar mkPrimaryOpcode ( Opcode opc )
void VG_(emit_movv_offregmem_reg) ( Int sz, Int off, Int areg, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) VG_(emitB) ( 0x66 );
VG_(emitB) ( 0x8B ); /* MOV Ev, Gv */
VG_(emit_amode_offregmem_reg) ( off, areg, reg );
@ -380,7 +380,7 @@ void VG_(emit_movv_offregmem_reg) ( Int sz, Int off, Int areg, Int reg )
void VG_(emit_movv_reg_offregmem) ( Int sz, Int reg, Int off, Int areg )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) VG_(emitB) ( 0x66 );
VG_(emitB) ( 0x89 ); /* MOV Gv, Ev */
VG_(emit_amode_offregmem_reg) ( off, areg, reg );
@ -391,7 +391,7 @@ void VG_(emit_movv_reg_offregmem) ( Int sz, Int reg, Int off, Int areg )
static void emit_movv_regmem_reg ( Int sz, Int reg1, Int reg2 )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) VG_(emitB) ( 0x66 );
VG_(emitB) ( 0x8B ); /* MOV Ev, Gv */
emit_amode_regmem_reg ( reg1, reg2 );
@ -402,7 +402,7 @@ static void emit_movv_regmem_reg ( Int sz, Int reg1, Int reg2 )
static void emit_movv_reg_regmem ( Int sz, Int reg1, Int reg2 )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) VG_(emitB) ( 0x66 );
VG_(emitB) ( 0x89 ); /* MOV Gv, Ev */
emit_amode_regmem_reg ( reg2, reg1 );
@ -413,7 +413,7 @@ static void emit_movv_reg_regmem ( Int sz, Int reg1, Int reg2 )
void VG_(emit_movv_reg_reg) ( Int sz, Int reg1, Int reg2 )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) VG_(emitB) ( 0x66 );
VG_(emitB) ( 0x89 ); /* MOV Gv, Ev */
VG_(emit_amode_ereg_greg) ( reg2, reg1 );
@ -424,7 +424,7 @@ void VG_(emit_movv_reg_reg) ( Int sz, Int reg1, Int reg2 )
void VG_(emit_nonshiftopv_lit_reg) ( Int sz, Opcode opc, UInt lit, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) VG_(emitB) ( 0x66 );
if (lit == VG_(extend_s_8to32)(lit & 0x000000FF)) {
/* short form OK */
@ -438,26 +438,26 @@ void VG_(emit_nonshiftopv_lit_reg) ( Int sz, Opcode opc, UInt lit, Int reg )
}
if (dis)
VG_(printf)( "\n\t\t%s%c\t$0x%x, %s\n",
VG_(nameUOpcode)(False,opc), nameISize(sz),
VG_(name_UOpcode)(False,opc), nameISize(sz),
lit, nameIReg(sz,reg));
}
void VG_(emit_shiftopv_lit_reg) ( Int sz, Opcode opc, UInt lit, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) VG_(emitB) ( 0x66 );
VG_(emitB) ( 0xC1 ); /* Grp2 Ib,Ev */
VG_(emit_amode_ereg_greg) ( reg, mkGrp2opcode(opc) );
VG_(emitB) ( lit );
if (dis)
VG_(printf)( "\n\t\t%s%c\t$%d, %s\n",
VG_(nameUOpcode)(False,opc), nameISize(sz),
VG_(name_UOpcode)(False,opc), nameISize(sz),
lit, nameIReg(sz,reg));
}
static void emit_shiftopv_cl_stack0 ( Int sz, Opcode opc )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) VG_(emitB) ( 0x66 );
VG_(emitB) ( 0xD3 ); /* Grp2 CL,Ev */
VG_(emitB) ( mkModRegRM ( 1, mkGrp2opcode(opc), 4 ) );
@ -465,38 +465,38 @@ static void emit_shiftopv_cl_stack0 ( Int sz, Opcode opc )
VG_(emitB) ( 0x00 ); /* the d8 displacement */
if (dis)
VG_(printf)("\n\t\t%s%c %%cl, 0(%%esp)\n",
VG_(nameUOpcode)(False,opc), nameISize(sz) );
VG_(name_UOpcode)(False,opc), nameISize(sz) );
}
static void emit_shiftopb_cl_stack0 ( Opcode opc )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0xD2 ); /* Grp2 CL,Eb */
VG_(emitB) ( mkModRegRM ( 1, mkGrp2opcode(opc), 4 ) );
VG_(emitB) ( 0x24 ); /* a SIB, I think `d8(%esp)' */
VG_(emitB) ( 0x00 ); /* the d8 displacement */
if (dis)
VG_(printf)("\n\t\t%s%c %%cl, 0(%%esp)\n",
VG_(nameUOpcode)(False,opc), nameISize(1) );
VG_(name_UOpcode)(False,opc), nameISize(1) );
}
static void emit_nonshiftopv_offregmem_reg ( Int sz, Opcode opc,
Int off, Int areg, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) VG_(emitB) ( 0x66 );
VG_(emitB) ( 3 + mkPrimaryOpcode(opc) ); /* op Ev, Gv */
VG_(emit_amode_offregmem_reg) ( off, areg, reg );
if (dis)
VG_(printf)( "\n\t\t%s%c\t0x%x(%s), %s\n",
VG_(nameUOpcode)(False,opc), nameISize(sz),
VG_(name_UOpcode)(False,opc), nameISize(sz),
off, nameIReg(4,areg), nameIReg(sz,reg));
}
void VG_(emit_nonshiftopv_reg_reg) ( Int sz, Opcode opc,
Int reg1, Int reg2 )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) VG_(emitB) ( 0x66 );
# if 0
/* Perfectly correct, but the GNU assembler uses the other form.
@ -509,7 +509,7 @@ void VG_(emit_nonshiftopv_reg_reg) ( Int sz, Opcode opc,
# endif
if (dis)
VG_(printf)( "\n\t\t%s%c\t%s, %s\n",
VG_(nameUOpcode)(False,opc), nameISize(sz),
VG_(name_UOpcode)(False,opc), nameISize(sz),
nameIReg(sz,reg1), nameIReg(sz,reg2));
}
@ -519,7 +519,7 @@ void VG_(emit_movv_lit_reg) ( Int sz, UInt lit, Int reg )
VG_(emit_nonshiftopv_reg_reg) ( sz, XOR, reg, reg );
return;
}
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) VG_(emitB) ( 0x66 );
VG_(emitB) ( 0xB8+reg ); /* MOV imm, Gv */
if (sz == 2) VG_(emitW) ( lit ); else VG_(emitL) ( lit );
@ -530,7 +530,7 @@ void VG_(emit_movv_lit_reg) ( Int sz, UInt lit, Int reg )
void VG_(emit_unaryopv_reg) ( Int sz, Opcode opc, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) VG_(emitB) ( 0x66 );
switch (opc) {
case NEG:
@ -566,7 +566,7 @@ void VG_(emit_unaryopv_reg) ( Int sz, Opcode opc, Int reg )
void VG_(emit_pushv_reg) ( Int sz, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) {
VG_(emitB) ( 0x66 );
} else {
@ -579,7 +579,7 @@ void VG_(emit_pushv_reg) ( Int sz, Int reg )
void VG_(emit_popv_reg) ( Int sz, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) {
VG_(emitB) ( 0x66 );
} else {
@ -592,7 +592,7 @@ void VG_(emit_popv_reg) ( Int sz, Int reg )
void VG_(emit_pushl_lit32) ( UInt int32 )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x68 );
VG_(emitL) ( int32 );
if (dis)
@ -602,7 +602,7 @@ void VG_(emit_pushl_lit32) ( UInt int32 )
void VG_(emit_pushl_lit8) ( Int lit8 )
{
vg_assert(lit8 >= -128 && lit8 < 128);
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x6A );
VG_(emitB) ( (UChar)((UInt)lit8) );
if (dis)
@ -611,7 +611,7 @@ void VG_(emit_pushl_lit8) ( Int lit8 )
void VG_(emit_cmpl_zero_reg) ( Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x83 );
VG_(emit_amode_ereg_greg) ( reg, 7 /* Grp 3 opcode for CMP */ );
VG_(emitB) ( 0x00 );
@ -621,7 +621,7 @@ void VG_(emit_cmpl_zero_reg) ( Int reg )
static void emit_swapl_reg_ECX ( Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x87 ); /* XCHG Gv,Ev */
VG_(emit_amode_ereg_greg) ( reg, R_ECX );
if (dis)
@ -630,7 +630,7 @@ static void emit_swapl_reg_ECX ( Int reg )
void VG_(emit_swapl_reg_EAX) ( Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x90 + reg ); /* XCHG Gv,eAX */
if (dis)
VG_(printf)("\n\t\txchgl %%eax, %s\n", nameIReg(4,reg));
@ -638,7 +638,7 @@ void VG_(emit_swapl_reg_EAX) ( Int reg )
static void emit_swapl_reg_reg ( Int reg1, Int reg2 )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x87 ); /* XCHG Gv,Ev */
VG_(emit_amode_ereg_greg) ( reg1, reg2 );
if (dis)
@ -648,7 +648,7 @@ static void emit_swapl_reg_reg ( Int reg1, Int reg2 )
static void emit_bswapl_reg ( Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x0F );
VG_(emitB) ( 0xC8 + reg ); /* BSWAP r32 */
if (dis)
@ -657,7 +657,7 @@ static void emit_bswapl_reg ( Int reg )
static void emit_movl_reg_reg ( Int regs, Int regd )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x89 ); /* MOV Gv,Ev */
VG_(emit_amode_ereg_greg) ( regd, regs );
if (dis)
@ -666,7 +666,7 @@ static void emit_movl_reg_reg ( Int regs, Int regd )
void VG_(emit_movv_lit_offregmem) ( Int sz, UInt lit, Int off, Int memreg )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) {
VG_(emitB) ( 0x66 );
} else {
@ -689,7 +689,7 @@ void VG_(emit_movv_lit_offregmem) ( Int sz, UInt lit, Int off, Int memreg )
486 insn set. ToDo: investigate. */
void VG_(emit_movb_lit_offregmem) ( UInt lit, Int off, Int memreg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0xC6 ); /* Grp11 Eb */
VG_(emit_amode_offregmem_reg) ( off, memreg, 0 /* Grp11 subopcode for MOV */ );
VG_(emitB) ( lit );
@ -701,19 +701,19 @@ void VG_(emit_movb_lit_offregmem) ( UInt lit, Int off, Int memreg )
static void emit_nonshiftopb_offregmem_reg ( Opcode opc,
Int off, Int areg, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 2 + mkPrimaryOpcode(opc) ); /* op Eb, Gb */
VG_(emit_amode_offregmem_reg) ( off, areg, reg );
if (dis)
VG_(printf)( "\n\t\t%sb\t0x%x(%s), %s\n",
VG_(nameUOpcode)(False,opc), off, nameIReg(4,areg),
VG_(name_UOpcode)(False,opc), off, nameIReg(4,areg),
nameIReg(1,reg));
}
void VG_(emit_movb_reg_offregmem) ( Int reg, Int off, Int areg )
{
/* Could do better when reg == %al. */
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x88 ); /* MOV G1, E1 */
VG_(emit_amode_offregmem_reg) ( off, areg, reg );
if (dis)
@ -723,18 +723,18 @@ void VG_(emit_movb_reg_offregmem) ( Int reg, Int off, Int areg )
static void emit_nonshiftopb_reg_reg ( Opcode opc, Int reg1, Int reg2 )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 2 + mkPrimaryOpcode(opc) ); /* op Eb, Gb */
VG_(emit_amode_ereg_greg) ( reg1, reg2 );
if (dis)
VG_(printf)( "\n\t\t%sb\t%s, %s\n",
VG_(nameUOpcode)(False,opc),
VG_(name_UOpcode)(False,opc),
nameIReg(1,reg1), nameIReg(1,reg2));
}
static void emit_movb_reg_regmem ( Int reg1, Int reg2 )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x88 ); /* MOV G1, E1 */
emit_amode_regmem_reg ( reg2, reg1 );
if (dis)
@ -744,30 +744,30 @@ static void emit_movb_reg_regmem ( Int reg1, Int reg2 )
static void emit_nonshiftopb_lit_reg ( Opcode opc, UInt lit, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x80 ); /* Grp1 Ib,Eb */
VG_(emit_amode_ereg_greg) ( reg, mkGrp1opcode(opc) );
VG_(emitB) ( lit & 0x000000FF );
if (dis)
VG_(printf)( "\n\t\t%sb\t$0x%x, %s\n", VG_(nameUOpcode)(False,opc),
VG_(printf)( "\n\t\t%sb\t$0x%x, %s\n", VG_(name_UOpcode)(False,opc),
lit, nameIReg(1,reg));
}
static void emit_shiftopb_lit_reg ( Opcode opc, UInt lit, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0xC0 ); /* Grp2 Ib,Eb */
VG_(emit_amode_ereg_greg) ( reg, mkGrp2opcode(opc) );
VG_(emitB) ( lit );
if (dis)
VG_(printf)( "\n\t\t%sb\t$%d, %s\n",
VG_(nameUOpcode)(False,opc),
VG_(name_UOpcode)(False,opc),
lit, nameIReg(1,reg));
}
void VG_(emit_unaryopb_reg) ( Opcode opc, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
switch (opc) {
case INC:
VG_(emitB) ( 0xFE );
@ -800,7 +800,7 @@ void VG_(emit_unaryopb_reg) ( Opcode opc, Int reg )
void VG_(emit_testb_lit_reg) ( UInt lit, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0xF6 ); /* Grp3 Eb */
VG_(emit_amode_ereg_greg) ( reg, 0 /* Grp3 subopcode for TEST */ );
VG_(emitB) ( lit );
@ -814,7 +814,7 @@ void VG_(emit_testb_lit_reg) ( UInt lit, Int reg )
void VG_(emit_movzbl_offregmem_reg) ( Int off, Int regmem, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x0F ); VG_(emitB) ( 0xB6 ); /* MOVZBL */
VG_(emit_amode_offregmem_reg) ( off, regmem, reg );
if (dis)
@ -824,7 +824,7 @@ void VG_(emit_movzbl_offregmem_reg) ( Int off, Int regmem, Int reg )
static void emit_movzbl_regmem_reg ( Int reg1, Int reg2 )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x0F ); VG_(emitB) ( 0xB6 ); /* MOVZBL */
emit_amode_regmem_reg ( reg1, reg2 );
if (dis)
@ -834,7 +834,7 @@ static void emit_movzbl_regmem_reg ( Int reg1, Int reg2 )
void VG_(emit_movzwl_offregmem_reg) ( Int off, Int areg, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x0F ); VG_(emitB) ( 0xB7 ); /* MOVZWL */
VG_(emit_amode_offregmem_reg) ( off, areg, reg );
if (dis)
@ -844,7 +844,7 @@ void VG_(emit_movzwl_offregmem_reg) ( Int off, Int areg, Int reg )
static void emit_movzwl_regmem_reg ( Int reg1, Int reg2 )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x0F ); VG_(emitB) ( 0xB7 ); /* MOVZWL */
emit_amode_regmem_reg ( reg1, reg2 );
if (dis)
@ -859,7 +859,7 @@ static void emit_movzwl_regmem_reg ( Int reg1, Int reg2 )
static void emit_get_fpu_state ( void )
{
Int off = 4 * VGOFF_(m_fpustate);
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0xDD ); VG_(emitB) ( 0xA5 ); /* frstor d32(%ebp) */
VG_(emitL) ( off );
if (dis)
@ -869,7 +869,7 @@ static void emit_get_fpu_state ( void )
static void emit_put_fpu_state ( void )
{
Int off = 4 * VGOFF_(m_fpustate);
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0xDD ); VG_(emitB) ( 0xB5 ); /* fnsave d32(%ebp) */
VG_(emitL) ( off );
if (dis)
@ -879,7 +879,7 @@ static void emit_put_fpu_state ( void )
static void emit_fpu_no_mem ( UChar first_byte,
UChar second_byte )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( first_byte );
VG_(emitB) ( second_byte );
if (dis)
@ -891,7 +891,7 @@ static void emit_fpu_regmem ( UChar first_byte,
UChar second_byte_masked,
Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( first_byte );
emit_amode_regmem_reg ( reg, second_byte_masked >> 3 );
if (dis)
@ -907,7 +907,7 @@ static void emit_fpu_regmem ( UChar first_byte,
void VG_(emit_call_reg) ( Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0xFF ); /* Grp5 */
VG_(emit_amode_ereg_greg) ( reg, mkGrp5opcode(CALLM) );
if (dis)
@ -916,7 +916,7 @@ void VG_(emit_call_reg) ( Int reg )
static void emit_call_star_EBP_off ( Int byte_off )
{
VG_(newEmit)();
VG_(new_emit)();
if (byte_off < -128 || byte_off > 127) {
VG_(emitB) ( 0xFF );
VG_(emitB) ( 0x95 );
@ -934,7 +934,7 @@ static void emit_call_star_EBP_off ( Int byte_off )
static void emit_addlit8_offregmem ( Int lit8, Int regmem, Int off )
{
vg_assert(lit8 >= -128 && lit8 < 128);
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x83 ); /* Grp1 Ib,Ev */
VG_(emit_amode_offregmem_reg) ( off, regmem,
0 /* Grp1 subopcode for ADD */ );
@ -948,7 +948,7 @@ static void emit_addlit8_offregmem ( Int lit8, Int regmem, Int off )
void VG_(emit_add_lit_to_esp) ( Int lit )
{
if (lit < -128 || lit > 127) VG_(panic)("VG_(emit_add_lit_to_esp)");
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x83 );
VG_(emitB) ( 0xC4 );
VG_(emitB) ( lit & 0xFF );
@ -961,7 +961,7 @@ static void emit_movb_AL_zeroESPmem ( void )
{
/* movb %al, 0(%esp) */
/* 88442400 movb %al, 0(%esp) */
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x88 );
VG_(emitB) ( 0x44 );
VG_(emitB) ( 0x24 );
@ -974,7 +974,7 @@ static void emit_movb_zeroESPmem_AL ( void )
{
/* movb 0(%esp), %al */
/* 8A442400 movb 0(%esp), %al */
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x8A );
VG_(emitB) ( 0x44 );
VG_(emitB) ( 0x24 );
@ -990,7 +990,7 @@ static void emit_movb_zeroESPmem_AL ( void )
void VG_(emit_jcondshort_delta) ( Condcode cond, Int delta )
{
vg_assert(delta >= -128 && delta <= 127);
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x70 + (UInt)cond );
VG_(emitB) ( (UChar)delta );
if (dis)
@ -1002,7 +1002,7 @@ static void emit_get_eflags ( void )
{
Int off = 4 * VGOFF_(m_eflags);
vg_assert(off >= 0 && off < 128);
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0xFF ); /* PUSHL off(%ebp) */
VG_(emitB) ( 0x75 );
VG_(emitB) ( off );
@ -1015,7 +1015,7 @@ static void emit_put_eflags ( void )
{
Int off = 4 * VGOFF_(m_eflags);
vg_assert(off >= 0 && off < 128);
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x9C ); /* PUSHFL */
VG_(emitB) ( 0x8F ); /* POPL vg_m_state.m_eflags */
VG_(emitB) ( 0x45 );
@ -1026,7 +1026,7 @@ static void emit_put_eflags ( void )
static void emit_setb_reg ( Int reg, Condcode cond )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x0F ); VG_(emitB) ( 0x90 + (UChar)cond );
VG_(emit_amode_ereg_greg) ( reg, 0 );
if (dis)
@ -1036,7 +1036,7 @@ static void emit_setb_reg ( Int reg, Condcode cond )
static void emit_ret ( void )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0xC3 ); /* RET */
if (dis)
VG_(printf)("\n\t\tret\n");
@ -1044,7 +1044,7 @@ static void emit_ret ( void )
void VG_(emit_pushal) ( void )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x60 ); /* PUSHAL */
if (dis)
VG_(printf)("\n\t\tpushal\n");
@ -1052,7 +1052,7 @@ void VG_(emit_pushal) ( void )
void VG_(emit_popal) ( void )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x61 ); /* POPAL */
if (dis)
VG_(printf)("\n\t\tpopal\n");
@ -1060,7 +1060,7 @@ void VG_(emit_popal) ( void )
static void emit_lea_litreg_reg ( UInt lit, Int regmem, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x8D ); /* LEA M,Gv */
VG_(emit_amode_offregmem_reg) ( (Int)lit, regmem, reg );
if (dis)
@ -1071,7 +1071,7 @@ static void emit_lea_litreg_reg ( UInt lit, Int regmem, Int reg )
static void emit_lea_sib_reg ( UInt lit, Int scale,
Int regbase, Int regindex, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x8D ); /* LEA M,Gv */
emit_amode_sib_reg ( (Int)lit, scale, regbase, regindex, reg );
if (dis)
@ -1083,7 +1083,7 @@ static void emit_lea_sib_reg ( UInt lit, Int scale,
void VG_(emit_AMD_prefetch_reg) ( Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
VG_(emitB) ( 0x0F );
VG_(emitB) ( 0x0D );
emit_amode_regmem_reg ( reg, 1 /* 0 is prefetch; 1 is prefetchw */ );
@ -1286,8 +1286,8 @@ void VG_(synth_ccall) ( Addr fn, Int argc, Int regparms_n, UInt argv[],
ranges, but you miss this if you don't consider what happens during
the UInstr.) */
# define PRESERVE_REG(realReg) \
(IS_RREG_LIVE(VG_(realRegNumToRank)(realReg), regs_live_before) && \
IS_RREG_LIVE(VG_(realRegNumToRank)(realReg), regs_live_after) && \
(IS_RREG_LIVE(VG_(realreg_to_rank)(realReg), regs_live_before) && \
IS_RREG_LIVE(VG_(realreg_to_rank)(realReg), regs_live_after) && \
ret_reg != realReg)
preserve_eax = PRESERVE_REG(R_EAX);
@ -1880,7 +1880,7 @@ static Int eflagsOffset ( void )
/* Return the byte offset from %ebp (ie, into baseBlock)
for the specified shadow register */
Int VG_(shadowRegOffset) ( Int arch )
Int VG_(shadow_reg_offset) ( Int arch )
{
switch (arch) {
case R_EAX: return 4 * VGOFF_(sh_eax);
@ -1895,7 +1895,7 @@ Int VG_(shadowRegOffset) ( Int arch )
}
}
Int VG_(shadowFlagsOffset) ( void )
Int VG_(shadow_flags_offset) ( void )
{
return 4 * VGOFF_(sh_eflags);
}
@ -1953,7 +1953,7 @@ static void emitUInstr ( UCodeBlock* cb, Int i, RRegSet regs_live_before )
UInstr* u = &cb->instrs[i];
if (dis)
VG_(ppUInstrWithRegs)(i, u);
VG_(pp_UInstr_regs)(i, u);
# if 0
if (0&& VG_(translations_done) >= 600) {
@ -2225,7 +2225,7 @@ static void emitUInstr ( UCodeBlock* cb, Int i, RRegSet regs_live_before )
case BSWAP:
vg_assert(u->tag1 == RealReg);
vg_assert(u->size == 4);
vg_assert(!VG_(anyFlagUse)(u));
vg_assert(!VG_(any_flag_use)(u));
emit_bswapl_reg ( u->val1 );
break;
@ -2327,7 +2327,7 @@ static void emitUInstr ( UCodeBlock* cb, Int i, RRegSet regs_live_before )
case CC2VAL:
vg_assert(u->tag1 == RealReg);
vg_assert(u->tag2 == NoValue);
vg_assert(VG_(anyFlagUse)(u));
vg_assert(VG_(any_flag_use)(u));
synth_setb_reg ( u->val1, u->cond );
break;
@ -2353,13 +2353,13 @@ static void emitUInstr ( UCodeBlock* cb, Int i, RRegSet regs_live_before )
default:
if (VG_(needs).extended_UCode)
SK_(emitExtUInstr)(u, regs_live_before);
SK_(emit_XUInstr)(u, regs_live_before);
else {
VG_(printf)("\nError:\n"
" unhandled opcode: %u. Perhaps "
" VG_(needs).extended_UCode should be set?\n",
u->opcode);
VG_(ppUInstr)(0,u);
VG_(pp_UInstr)(0,u);
VG_(panic)("emitUInstr: unimplemented opcode");
}
}
@ -2392,7 +2392,7 @@ UChar* VG_(emit_code) ( UCodeBlock* cb, Int* nbytes )
Bool sane = VG_(saneUInstr)( False, False, u );
if (!sane) {
VG_(printf)("\ninsane instruction\n");
VG_(upUInstr)( i, u );
VG_(up_UInstr)( i, u );
}
vg_assert(sane);
emitUInstr( cb, i, regs_live_before );

View File

@ -38,21 +38,21 @@
couldn't otherwise do. */
#include "vg_skin.h"
#define uInstr0 VG_(newUInstr0)
#define uInstr1 VG_(newUInstr1)
#define uInstr2 VG_(newUInstr2)
#define uLiteral VG_(setLiteralField)
#define uCCall VG_(setCCallFields)
#define newTemp VG_(getNewTemp)
#define uInstr0 VG_(new_UInstr0)
#define uInstr1 VG_(new_UInstr1)
#define uInstr2 VG_(new_UInstr2)
#define uLiteral VG_(set_lit_field)
#define uCCall VG_(set_ccall_fields)
#define newTemp VG_(get_new_temp)
void VG_(callHelper_0_0)(UCodeBlock* cb, Addr f)
void VG_(call_helper_0_0)(UCodeBlock* cb, Addr f)
{
uInstr0(cb, CCALL, 0);
uCCall(cb, f, 0, 0, 0);
}
void VG_(callHelper_1_0)(UCodeBlock* cb, Addr f, UInt arg1, UInt regparms_n)
void VG_(call_helper_1_0)(UCodeBlock* cb, Addr f, UInt arg1, UInt regparms_n)
{
UInt t1 = newTemp(cb);
@ -63,7 +63,7 @@ void VG_(callHelper_1_0)(UCodeBlock* cb, Addr f, UInt arg1, UInt regparms_n)
uCCall(cb, f, 1, regparms_n, 0);
}
void VG_(callHelper_2_0)(UCodeBlock* cb, Addr f, UInt arg1, UInt arg2,
void VG_(call_helper_2_0)(UCodeBlock* cb, Addr f, UInt arg1, UInt arg2,
UInt regparms_n)
{
UInt t1 = newTemp(cb);

View File

@ -932,7 +932,7 @@ Char* VG_(strdup) ( const Char* s )
/* Keep track of recursion depth. */
static Int recDepth;
static Bool stringMatch_wrk ( Char* pat, Char* str )
static Bool string_match_wrk ( Char* pat, Char* str )
{
vg_assert(recDepth >= 0 && recDepth < 250);
recDepth++;
@ -940,7 +940,7 @@ static Bool stringMatch_wrk ( Char* pat, Char* str )
switch (*pat) {
case '\0' : return (*str=='\0');
case '*' : do {
if (stringMatch_wrk(pat+1,str)) {
if (string_match_wrk(pat+1,str)) {
recDepth--;
return True;
}
@ -967,11 +967,11 @@ static Bool stringMatch_wrk ( Char* pat, Char* str )
}
}
Bool VG_(stringMatch) ( Char* pat, Char* str )
Bool VG_(string_match) ( Char* pat, Char* str )
{
Bool b;
recDepth = 0;
b = stringMatch_wrk ( pat, str );
b = string_match_wrk ( pat, str );
/*
VG_(printf)("%s %s %s\n",
b?"TRUE ":"FALSE", pat, str);

View File

@ -36,14 +36,14 @@
/*--- Renamings of frequently-used global functions. ---*/
/*------------------------------------------------------------*/
#define uInstr0 VG_(newUInstr0)
#define uInstr1 VG_(newUInstr1)
#define uInstr2 VG_(newUInstr2)
#define uInstr3 VG_(newUInstr3)
#define nameIReg VG_(nameOfIntReg)
#define nameISize VG_(nameOfIntSize)
#define newTemp VG_(getNewTemp)
#define uLiteral VG_(setLiteralField)
#define uInstr0 VG_(new_UInstr0)
#define uInstr1 VG_(new_UInstr1)
#define uInstr2 VG_(new_UInstr2)
#define uInstr3 VG_(new_UInstr3)
#define nameIReg VG_(name_of_int_reg)
#define nameISize VG_(name_of_int_size)
#define newTemp VG_(get_new_temp)
#define uLiteral VG_(set_lit_field)
#define dis VG_(print_codegen)
@ -52,14 +52,14 @@
/*------------------------------------------------------------*/
/* Allocate a new temp reg number. */
__inline__ Int VG_(getNewTemp) ( UCodeBlock* cb )
__inline__ Int VG_(get_new_temp) ( UCodeBlock* cb )
{
Int t = cb->nextTemp;
cb->nextTemp += 2;
return t;
}
Int VG_(getNewShadow) ( UCodeBlock* cb )
Int VG_(get_new_shadow) ( UCodeBlock* cb )
{
Int t = cb->nextTemp;
cb->nextTemp += 2;
@ -112,7 +112,7 @@ static Char* nameGrp8 ( Int opc_aux )
return grp8_names[opc_aux];
}
Char* VG_(nameOfIntReg) ( Int size, Int reg )
Char* VG_(name_of_int_reg) ( Int size, Int reg )
{
static Char* ireg32_names[8]
= { "%eax", "%ecx", "%edx", "%ebx",
@ -128,17 +128,17 @@ Char* VG_(nameOfIntReg) ( Int size, Int reg )
case 1: return ireg8_names[reg];
}
bad:
VG_(panic)("nameOfIntReg");
VG_(panic)("name_of_int_reg");
return NULL; /*notreached*/
}
Char VG_(nameOfIntSize) ( Int size )
Char VG_(name_of_int_size) ( Int size )
{
switch (size) {
case 4: return 'l';
case 2: return 'w';
case 1: return 'b';
default: VG_(panic)("nameOfIntSize");
default: VG_(panic)("name_of_int_size");
}
}
@ -238,7 +238,7 @@ __inline__ static UInt getSDisp ( Int size, Addr eip )
static __inline__ void uFlagsRWU ( UCodeBlock* cb,
FlagSet rr, FlagSet ww, FlagSet uu )
{
VG_(setFlagRW)(
VG_(set_flag_RW)(
&LAST_UINSTR(cb), rr, VG_UNION_FLAG_SETS(ww,uu)
);
}
@ -265,7 +265,7 @@ static void setFlagsFromUOpcode ( UCodeBlock* cb, Int uopc )
uFlagsRWU(cb, FlagsEmpty, FlagsEmpty, FlagsEmpty); break;
default:
VG_(printf)("unhandled case is %s\n",
VG_(nameUOpcode)(True, uopc));
VG_(name_UOpcode)(True, uopc));
VG_(panic)("setFlagsFromUOpcode: unhandled case");
}
}
@ -4473,9 +4473,9 @@ static Addr disInstr ( UCodeBlock* cb, Addr eip, Bool* isEnd )
for (; first_uinstr < cb->used; first_uinstr++) {
Bool sane = VG_(saneUInstr)(True, True, &cb->instrs[first_uinstr]);
if (dis)
VG_(ppUInstr)(first_uinstr, &cb->instrs[first_uinstr]);
VG_(pp_UInstr)(first_uinstr, &cb->instrs[first_uinstr]);
else if (!sane)
VG_(upUInstr)(-1, &cb->instrs[first_uinstr]);
VG_(up_UInstr)(-1, &cb->instrs[first_uinstr]);
vg_assert(sane);
}
@ -4514,7 +4514,7 @@ Int VG_(disBB) ( UCodeBlock* cb, Addr eip0 )
uLiteral(cb, eip);
uCond(cb, CondAlways);
/* Print added JMP */
if (dis) VG_(ppUInstr)(cb->used-1, &cb->instrs[cb->used-1]);
if (dis) VG_(pp_UInstr)(cb->used-1, &cb->instrs[cb->used-1]);
}
if (dis) VG_(printf)("\n");
delta = eip - eip0;
@ -4535,13 +4535,13 @@ Int VG_(disBB) ( UCodeBlock* cb, Addr eip0 )
uLiteral(cb, eip);
uCond(cb, CondAlways);
/* Print added JMP */
if (dis) VG_(ppUInstr)(cb->used-1, &cb->instrs[cb->used-1]);
if (dis) VG_(pp_UInstr)(cb->used-1, &cb->instrs[cb->used-1]);
isEnd = True;
} else if (!isEnd) {
uInstr1(cb, INCEIP, 0, Lit16, delta);
/* Print added INCEIP */
if (dis) VG_(ppUInstr)(cb->used-1, &cb->instrs[cb->used-1]);
if (dis) VG_(pp_UInstr)(cb->used-1, &cb->instrs[cb->used-1]);
}
if (dis) VG_(printf)("\n");
}
@ -4552,7 +4552,7 @@ Int VG_(disBB) ( UCodeBlock* cb, Addr eip0 )
block_sane = VG_(saneUCodeBlockCalls)(cb);
if (!block_sane) {
VG_(ppUCodeBlock)(cb, "block failing sanity check");
VG_(pp_UCodeBlock)(cb, "block failing sanity check");
vg_assert(block_sane);
}

View File

@ -35,9 +35,9 @@
/*--- Renamings of frequently-used global functions. ---*/
/*------------------------------------------------------------*/
#define uInstr2 VG_(newUInstr2)
#define nameIReg VG_(nameOfIntReg)
#define nameISize VG_(nameOfIntSize)
#define uInstr2 VG_(new_UInstr2)
#define nameIReg VG_(name_of_int_reg)
#define nameISize VG_(name_of_int_size)
#define dis VG_(print_codegen)
@ -45,7 +45,7 @@
/*--- Basics ---*/
/*------------------------------------------------------------*/
UCodeBlock* VG_(allocCodeBlock) ( void )
UCodeBlock* VG_(alloc_UCodeBlock) ( void )
{
UCodeBlock* cb = VG_(arena_malloc)(VG_AR_CORE, sizeof(UCodeBlock));
cb->used = cb->size = cb->nextTemp = 0;
@ -54,7 +54,7 @@ UCodeBlock* VG_(allocCodeBlock) ( void )
}
void VG_(freeCodeBlock) ( UCodeBlock* cb )
void VG_(free_UCodeBlock) ( UCodeBlock* cb )
{
if (cb->instrs) VG_(arena_free)(VG_AR_CORE, cb->instrs);
VG_(arena_free)(VG_AR_CORE, cb);
@ -88,7 +88,7 @@ void ensureUInstr ( UCodeBlock* cb )
__inline__
void VG_(newNOP) ( UInstr* u )
void VG_(new_NOP) ( UInstr* u )
{
u->val1 = u->val2 = u->val3 = 0;
u->tag1 = u->tag2 = u->tag3 = NoValue;
@ -108,7 +108,7 @@ void VG_(newNOP) ( UInstr* u )
/* Add an instruction to a ucode block, and return the index of the
instruction. */
__inline__
void VG_(newUInstr3) ( UCodeBlock* cb, Opcode opcode, Int sz,
void VG_(new_UInstr3) ( UCodeBlock* cb, Opcode opcode, Int sz,
Tag tag1, UInt val1,
Tag tag2, UInt val2,
Tag tag3, UInt val3 )
@ -117,7 +117,7 @@ void VG_(newUInstr3) ( UCodeBlock* cb, Opcode opcode, Int sz,
ensureUInstr(cb);
ui = & cb->instrs[cb->used];
cb->used++;
VG_(newNOP)(ui);
VG_(new_NOP)(ui);
ui->val1 = val1;
ui->val2 = val2;
ui->val3 = val3;
@ -133,7 +133,7 @@ void VG_(newUInstr3) ( UCodeBlock* cb, Opcode opcode, Int sz,
__inline__
void VG_(newUInstr2) ( UCodeBlock* cb, Opcode opcode, Int sz,
void VG_(new_UInstr2) ( UCodeBlock* cb, Opcode opcode, Int sz,
Tag tag1, UInt val1,
Tag tag2, UInt val2 )
{
@ -141,7 +141,7 @@ void VG_(newUInstr2) ( UCodeBlock* cb, Opcode opcode, Int sz,
ensureUInstr(cb);
ui = & cb->instrs[cb->used];
cb->used++;
VG_(newNOP)(ui);
VG_(new_NOP)(ui);
ui->val1 = val1;
ui->val2 = val2;
ui->opcode = opcode;
@ -154,14 +154,14 @@ void VG_(newUInstr2) ( UCodeBlock* cb, Opcode opcode, Int sz,
__inline__
void VG_(newUInstr1) ( UCodeBlock* cb, Opcode opcode, Int sz,
void VG_(new_UInstr1) ( UCodeBlock* cb, Opcode opcode, Int sz,
Tag tag1, UInt val1 )
{
UInstr* ui;
ensureUInstr(cb);
ui = & cb->instrs[cb->used];
cb->used++;
VG_(newNOP)(ui);
VG_(new_NOP)(ui);
ui->val1 = val1;
ui->opcode = opcode;
ui->tag1 = tag1;
@ -171,20 +171,20 @@ void VG_(newUInstr1) ( UCodeBlock* cb, Opcode opcode, Int sz,
__inline__
void VG_(newUInstr0) ( UCodeBlock* cb, Opcode opcode, Int sz )
void VG_(new_UInstr0) ( UCodeBlock* cb, Opcode opcode, Int sz )
{
UInstr* ui;
ensureUInstr(cb);
ui = & cb->instrs[cb->used];
cb->used++;
VG_(newNOP)(ui);
VG_(new_NOP)(ui);
ui->opcode = opcode;
ui->size = sz;
}
/* Copy an instruction into the given codeblock. */
__inline__
void VG_(copyUInstr) ( UCodeBlock* cb, UInstr* instr )
void VG_(copy_UInstr) ( UCodeBlock* cb, UInstr* instr )
{
ensureUInstr(cb);
cb->instrs[cb->used] = *instr;
@ -209,9 +209,9 @@ void copyAuxInfoFromTo ( UInstr* src, UInstr* dst )
/* Set the flag R/W sets on a uinstr. */
void VG_(setFlagRW) ( UInstr* u, FlagSet fr, FlagSet fw )
void VG_(set_flag_RW) ( UInstr* u, FlagSet fr, FlagSet fw )
{
/* VG_(ppUInstr)(-1,u); */
/* VG_(pp_UInstr)(-1,u); */
vg_assert(fr == (fr & FlagsALL));
vg_assert(fw == (fw & FlagsALL));
u->flags_r = fr;
@ -220,15 +220,15 @@ void VG_(setFlagRW) ( UInstr* u, FlagSet fr, FlagSet fw )
/* Set the lit32 field of the most recent uinsn. */
void VG_(setLiteralField) ( UCodeBlock* cb, UInt lit32 )
void VG_(set_lit_field) ( UCodeBlock* cb, UInt lit32 )
{
LAST_UINSTR(cb).lit32 = lit32;
}
/* Set the C call info fields of the most recent uinsn. */
void VG_(setCCallFields) ( UCodeBlock* cb, Addr fn, UChar argc, UChar
regparms_n, Bool has_ret_val )
void VG_(set_ccall_fields) ( UCodeBlock* cb, Addr fn, UChar argc, UChar
regparms_n, Bool has_ret_val )
{
vg_assert(argc < 4);
vg_assert(regparms_n <= argc);
@ -238,7 +238,7 @@ void VG_(setCCallFields) ( UCodeBlock* cb, Addr fn, UChar argc, UChar
LAST_UINSTR(cb).has_ret_val = has_ret_val;
}
Bool VG_(anyFlagUse) ( UInstr* u )
Bool VG_(any_flag_use) ( UInstr* u )
{
return (u->flags_r != FlagsEmpty
|| u->flags_w != FlagsEmpty);
@ -258,7 +258,7 @@ Bool VG_(anyFlagUse) ( UInstr* u )
a problem, except the generated code will obviously be worse).
*/
__inline__
Int VG_(rankToRealRegNum) ( Int rank )
Int VG_(rank_to_realreg) ( Int rank )
{
switch (rank) {
# ifdef BEST_ALLOC_ORDER
@ -278,15 +278,15 @@ Int VG_(rankToRealRegNum) ( Int rank )
case 1: return R_ESI;
case 0: return R_EDI;
# endif
default: VG_(panic)("VG_(rankToRealRegNum)");
default: VG_(panic)("VG_(rank_to_realreg)");
}
}
/* Convert an Intel register number into a rank in the range 0 ..
VG_MAX_REALREGS-1. See related comments for rankToRealRegNum()
VG_MAX_REALREGS-1. See related comments for rank_to_realreg()
above. */
__inline__
Int VG_(realRegNumToRank) ( Int realReg )
Int VG_(realreg_to_rank) ( Int realReg )
{
switch (realReg) {
# ifdef BEST_ALLOC_ORDER
@ -304,7 +304,7 @@ Int VG_(realRegNumToRank) ( Int realReg )
case R_ESI: return 1;
case R_EDI: return 0;
# endif
default: VG_(panic)("VG_(realRegNumToRank)");
default: VG_(panic)("VG_(realreg_to_rank)");
}
}
@ -523,7 +523,7 @@ Bool VG_(saneUInstr) ( Bool beforeRA, Bool beforeLiveness, UInstr* u )
u->regparms_n <= u->argc && XCCALL;
default:
if (VG_(needs).extended_UCode)
return SK_(saneExtUInstr)(beforeRA, beforeLiveness, u);
return SK_(sane_XUInstr)(beforeRA, beforeLiveness, u);
else {
VG_(printf)("unhandled opcode: %u. Perhaps "
"VG_(needs).extended_UCode should be set?",
@ -592,7 +592,7 @@ void VG_(saneUCodeBlock) ( UCodeBlock* cb )
Bool sane = VG_(saneUInstr)(True, True, &cb->instrs[i]);
if (!sane) {
VG_(printf)("Instruction failed sanity check:\n");
VG_(upUInstr)(i, &cb->instrs[i]);
VG_(up_UInstr)(i, &cb->instrs[i]);
}
vg_assert(sane);
}
@ -735,14 +735,14 @@ static void ppTempReg ( Int tt )
}
void VG_(ppUOperand) ( UInstr* u, Int operandNo, Int sz, Bool parens )
void VG_(pp_UOperand) ( UInstr* u, Int operandNo, Int sz, Bool parens )
{
UInt tag, val;
switch (operandNo) {
case 1: tag = u->tag1; val = u->val1; break;
case 2: tag = u->tag2; val = u->val2; break;
case 3: tag = u->tag3; val = u->val3; break;
default: VG_(panic)("VG_(ppUOperand)(1)");
default: VG_(panic)("VG_(pp_UOperand)(1)");
}
if (tag == Literal) val = u->lit32;
@ -755,13 +755,13 @@ void VG_(ppUOperand) ( UInstr* u, Int operandNo, Int sz, Bool parens )
case NoValue: VG_(printf)("NoValue"); break;
case ArchReg: VG_(printf)("%S",nameIReg(sz,val)); break;
case SpillNo: VG_(printf)("spill%d", val); break;
default: VG_(panic)("VG_(ppUOperand)(2)");
default: VG_(panic)("VG_(pp_UOperand)(2)");
}
if (parens) VG_(printf)(")");
}
Char* VG_(nameUOpcode) ( Bool upper, Opcode opc )
Char* VG_(name_UOpcode) ( Bool upper, Opcode opc )
{
switch (opc) {
case ADD: return (upper ? "ADD" : "add");
@ -785,7 +785,7 @@ Char* VG_(nameUOpcode) ( Bool upper, Opcode opc )
case BSWAP: return (upper ? "BSWAP" : "bswap");
default: break;
}
if (!upper) VG_(panic)("vg_nameUOpcode: invalid !upper");
if (!upper) VG_(panic)("vg_name_UOpcode: invalid !upper");
switch (opc) {
case CALLM_S: return "CALLM_S";
case CALLM_E: return "CALLM_E";
@ -815,20 +815,20 @@ Char* VG_(nameUOpcode) ( Bool upper, Opcode opc )
case FPU: return "FPU" ;
default:
if (VG_(needs).extended_UCode)
return SK_(nameExtUOpcode)(opc);
return SK_(name_XUOpcode)(opc);
else {
VG_(printf)("unhandled opcode: %u. Perhaps "
"VG_(needs).extended_UCode should be set?",
opc);
VG_(panic)("nameUOpcode: unhandled opcode");
VG_(panic)("name_UOpcode: unhandled opcode");
}
}
}
void ppRealRegsLiveness ( UInstr* u )
void pp_realregs_liveness ( UInstr* u )
{
# define PRINT_RREG_LIVENESS(realReg,s) \
VG_(printf)( IS_RREG_LIVE(VG_(realRegNumToRank)(realReg), \
VG_(printf)( IS_RREG_LIVE(VG_(realreg_to_rank)(realReg), \
u->regs_live_after) \
? s : "-");
@ -845,9 +845,9 @@ void ppRealRegsLiveness ( UInstr* u )
}
/* Ugly-print UInstr :) */
void VG_(upUInstr) ( Int i, UInstr* u )
void VG_(up_UInstr) ( Int i, UInstr* u )
{
VG_(ppUInstrWithRegs)(i, u);
VG_(pp_UInstr_regs)(i, u);
VG_(printf)("opcode: %d\n", u->opcode);
VG_(printf)("lit32: %x\n", u->lit32);
@ -863,14 +863,14 @@ void VG_(upUInstr) ( Int i, UInstr* u )
VG_(printf)("argc,regparms_n: %d, %d\n", u->argc, u->regparms_n);
VG_(printf)("has_ret_val: %d\n", u->has_ret_val);
VG_(printf)("regs_live_after: ");
ppRealRegsLiveness(u);
pp_realregs_liveness(u);
VG_(printf)("\n");
}
void ppUInstrWorker ( Int instrNo, UInstr* u, Bool ppRegsLiveness )
void pp_UInstrWorker ( Int instrNo, UInstr* u, Bool ppRegsLiveness )
{
VG_(printf)("\t%4d: %s", instrNo,
VG_(nameUOpcode)(True, u->opcode));
VG_(name_UOpcode)(True, u->opcode));
if (u->opcode == JMP || u->opcode == CC2VAL)
VG_(printf)("%s", VG_(nameCondcode(u->cond)));
@ -894,18 +894,18 @@ void ppUInstrWorker ( Int instrNo, UInstr* u, Bool ppRegsLiveness )
case LEA2:
VG_(printf)("\t%d(" , u->lit32);
VG_(ppUOperand)(u, 1, 4, False);
VG_(pp_UOperand)(u, 1, 4, False);
VG_(printf)(",");
VG_(ppUOperand)(u, 2, 4, False);
VG_(pp_UOperand)(u, 2, 4, False);
VG_(printf)(",%d), ", (Int)u->extra4b);
VG_(ppUOperand)(u, 3, 4, False);
VG_(pp_UOperand)(u, 3, 4, False);
break;
case LEA1:
VG_(printf)("\t%d" , u->lit32);
VG_(ppUOperand)(u, 1, 4, True);
VG_(pp_UOperand)(u, 1, 4, True);
VG_(printf)(", ");
VG_(ppUOperand)(u, 2, 4, False);
VG_(pp_UOperand)(u, 2, 4, False);
break;
case NOP:
@ -914,12 +914,12 @@ void ppUInstrWorker ( Int instrNo, UInstr* u, Bool ppRegsLiveness )
case FPU_W:
VG_(printf)("\t0x%x:0x%x, ",
(u->val1 >> 8) & 0xFF, u->val1 & 0xFF );
VG_(ppUOperand)(u, 2, 4, True);
VG_(pp_UOperand)(u, 2, 4, True);
break;
case FPU_R:
VG_(printf)("\t");
VG_(ppUOperand)(u, 2, 4, True);
VG_(pp_UOperand)(u, 2, 4, True);
VG_(printf)(", 0x%x:0x%x",
(u->val1 >> 8) & 0xFF, u->val1 & 0xFF );
break;
@ -931,9 +931,9 @@ void ppUInstrWorker ( Int instrNo, UInstr* u, Bool ppRegsLiveness )
case GET: case PUT: case MOV: case LOAD: case STORE: case CMOV:
VG_(printf)("\t");
VG_(ppUOperand)(u, 1, u->size, u->opcode==LOAD);
VG_(pp_UOperand)(u, 1, u->size, u->opcode==LOAD);
VG_(printf)(", ");
VG_(ppUOperand)(u, 2, u->size, u->opcode==STORE);
VG_(pp_UOperand)(u, 2, u->size, u->opcode==STORE);
break;
case JMP:
@ -945,7 +945,7 @@ void ppUInstrWorker ( Int instrNo, UInstr* u, Bool ppRegsLiveness )
default: break;
}
VG_(printf)("\t");
VG_(ppUOperand)(u, 1, u->size, False);
VG_(pp_UOperand)(u, 1, u->size, False);
if (CondAlways == u->cond) {
/* Print x86 instruction size if filled in */
if (0 != u->extra4b)
@ -957,31 +957,31 @@ void ppUInstrWorker ( Int instrNo, UInstr* u, Bool ppRegsLiveness )
case CC2VAL: case PUSH: case POP: case CLEAR: case CALLM:
case NOT: case NEG: case INC: case DEC: case BSWAP:
VG_(printf)("\t");
VG_(ppUOperand)(u, 1, u->size, False);
VG_(pp_UOperand)(u, 1, u->size, False);
break;
/* Print a "(s)" after args passed on stack */
case CCALL:
VG_(printf)("\t");
if (u->has_ret_val) {
VG_(ppUOperand)(u, 3, 0, False);
VG_(pp_UOperand)(u, 3, 0, False);
VG_(printf)(" = ");
}
VG_(printf)("%p(", u->lit32);
if (u->argc > 0) {
VG_(ppUOperand)(u, 1, 0, False);
VG_(pp_UOperand)(u, 1, 0, False);
if (u->regparms_n < 1)
VG_(printf)("(s)");
}
if (u->argc > 1) {
VG_(printf)(", ");
VG_(ppUOperand)(u, 2, 0, False);
VG_(pp_UOperand)(u, 2, 0, False);
if (u->regparms_n < 2)
VG_(printf)("(s)");
}
if (u->argc > 2) {
VG_(printf)(", ");
VG_(ppUOperand)(u, 3, 0, False);
VG_(pp_UOperand)(u, 3, 0, False);
if (u->regparms_n < 3)
VG_(printf)("(s)");
}
@ -994,26 +994,26 @@ void ppUInstrWorker ( Int instrNo, UInstr* u, Bool ppRegsLiveness )
case SHL: case SHR: case SAR:
case ROL: case ROR: case RCL: case RCR:
VG_(printf)("\t");
VG_(ppUOperand)(u, 1, u->size, False);
VG_(pp_UOperand)(u, 1, u->size, False);
VG_(printf)(", ");
VG_(ppUOperand)(u, 2, u->size, False);
VG_(pp_UOperand)(u, 2, u->size, False);
break;
case WIDEN:
VG_(printf)("_%c%c", VG_(toupper)(nameISize(u->extra4b)),
u->signed_widen?'s':'z');
VG_(printf)("\t");
VG_(ppUOperand)(u, 1, u->size, False);
VG_(pp_UOperand)(u, 1, u->size, False);
break;
default:
if (VG_(needs).extended_UCode)
SK_(ppExtUInstr)(u);
SK_(pp_XUInstr)(u);
else {
VG_(printf)("unhandled opcode: %u. Perhaps "
"VG_(needs).extended_UCode should be set?",
u->opcode);
VG_(panic)("ppUInstr: unhandled opcode");
VG_(panic)("pp_UInstr: unhandled opcode");
}
}
if (u->flags_r != FlagsEmpty || u->flags_w != FlagsEmpty) {
@ -1027,29 +1027,29 @@ void ppUInstrWorker ( Int instrNo, UInstr* u, Bool ppRegsLiveness )
if (ppRegsLiveness) {
VG_(printf)("\t\t");
ppRealRegsLiveness ( u );
pp_realregs_liveness ( u );
}
VG_(printf)("\n");
}
void VG_(ppUInstr) ( Int instrNo, UInstr* u )
void VG_(pp_UInstr) ( Int instrNo, UInstr* u )
{
ppUInstrWorker ( instrNo, u, /*ppRegsLiveness*/False );
pp_UInstrWorker ( instrNo, u, /*ppRegsLiveness*/False );
}
void VG_(ppUInstrWithRegs) ( Int instrNo, UInstr* u )
void VG_(pp_UInstr_regs) ( Int instrNo, UInstr* u )
{
ppUInstrWorker ( instrNo, u, /*ppRegsLiveness*/True );
pp_UInstrWorker ( instrNo, u, /*ppRegsLiveness*/True );
}
void VG_(ppUCodeBlock) ( UCodeBlock* cb, Char* title )
void VG_(pp_UCodeBlock) ( UCodeBlock* cb, Char* title )
{
Int i;
VG_(printf)("%s\n", title);
for (i = 0; i < cb->used; i++)
if (cb->instrs[i].opcode != NOP)
VG_(ppUInstr) ( i, &cb->instrs[i] );
VG_(pp_UInstr) ( i, &cb->instrs[i] );
VG_(printf)("\n");
}
@ -1068,7 +1068,7 @@ void VG_(ppUCodeBlock) ( UCodeBlock* cb, Char* title )
TempRegs or RealRegs.
*/
__inline__
Int VG_(getRegUsage) ( UInstr* u, Tag tag, RegUse* arr )
Int VG_(get_reg_usage) ( UInstr* u, Tag tag, RegUse* arr )
{
# define RD(ono) VG_UINSTR_READS_REG(ono)
# define WR(ono) VG_UINSTR_WRITES_REG(ono)
@ -1123,12 +1123,12 @@ Int VG_(getRegUsage) ( UInstr* u, Tag tag, RegUse* arr )
default:
if (VG_(needs).extended_UCode)
return SK_(getExtRegUsage)(u, tag, arr);
return SK_(get_Xreg_usage)(u, tag, arr);
else {
VG_(printf)("unhandled opcode: %u. Perhaps "
"VG_(needs).extended_UCode should be set?",
u->opcode);
VG_(panic)("VG_(getRegUsage): unhandled opcode");
VG_(panic)("VG_(get_reg_usage): unhandled opcode");
}
}
return n;
@ -1223,7 +1223,7 @@ Int maybe_uinstrReadsArchReg ( UInstr* u )
return -1;
default:
VG_(ppUInstr)(0,u);
VG_(pp_UInstr)(0,u);
VG_(panic)("maybe_uinstrReadsArchReg: unhandled opcode");
}
}
@ -1233,7 +1233,7 @@ Bool uInstrMentionsTempReg ( UInstr* u, Int tempreg )
{
Int i, k;
RegUse tempUse[3];
k = VG_(getRegUsage) ( u, TempReg, &tempUse[0] );
k = VG_(get_reg_usage) ( u, TempReg, &tempUse[0] );
for (i = 0; i < k; i++)
if (tempUse[i].num == tempreg)
return True;
@ -1284,7 +1284,7 @@ static void vg_improve ( UCodeBlock* cb )
for (i = cb->used-1; i >= 0; i--) {
u = &cb->instrs[i];
k = VG_(getRegUsage)(u, TempReg, &tempUse[0]);
k = VG_(get_reg_usage)(u, TempReg, &tempUse[0]);
/* For each temp usage ... bwds in program order. */
for (j = k-1; j >= 0; j--) {
@ -1325,7 +1325,7 @@ static void vg_improve ( UCodeBlock* cb )
out here. Annul this GET, rename tr to told for the
rest of the block, and extend told's live range to that
of tr. */
VG_(newNOP)(u);
VG_(new_NOP)(u);
n = last_live_before[tr] + 1;
if (n > cb->used) n = cb->used;
last_live_before[told] = last_live_before[tr];
@ -1390,7 +1390,7 @@ static void vg_improve ( UCodeBlock* cb )
}
/* boring insn; invalidate any mappings to temps it writes */
k = VG_(getRegUsage)(u, TempReg, &tempUse[0]);
k = VG_(get_reg_usage)(u, TempReg, &tempUse[0]);
for (j = 0; j < k; j++) {
wr = tempUse[j].isWrite;
@ -1422,7 +1422,7 @@ static void vg_improve ( UCodeBlock* cb )
actual_areg = containingArchRegOf ( 4, u->val2 );
if (annul_put[actual_areg]) {
vg_assert(actual_areg != R_ESP);
VG_(newNOP)(u);
VG_(new_NOP)(u);
if (dis)
VG_(printf)(" at %2d: delete PUT\n", i );
} else {
@ -1453,7 +1453,7 @@ static void vg_improve ( UCodeBlock* cb )
Further modifies the last_live_before map. */
# if 0
VG_(ppUCodeBlock)(cb, "Before MOV elimination" );
VG_(pp_UCodeBlock)(cb, "Before MOV elimination" );
for (i = 0; i < cb->nextTemp; i++)
VG_(printf)("llb[t%d]=%d ", i, last_live_before[i]);
VG_(printf)("\n");
@ -1480,7 +1480,7 @@ static void vg_improve ( UCodeBlock* cb )
}
last_live_before[u->val1] = last_live_before[u->val2];
last_live_before[u->val2] = i-1;
VG_(newNOP)(u);
VG_(new_NOP)(u);
}
}
@ -1541,7 +1541,7 @@ static void vg_improve ( UCodeBlock* cb )
if (dis) {
VG_(printf)("\n");
VG_(ppUCodeBlock) ( cb, "Improved UCode:" );
VG_(pp_UCodeBlock) ( cb, "Improved UCode:" );
}
}
@ -1623,7 +1623,7 @@ UCodeBlock* vg_do_register_allocation ( UCodeBlock* c1 )
/* Scan fwds to establish live ranges. */
for (i = 0; i < c1->used; i++) {
k = VG_(getRegUsage)(&c1->instrs[i], TempReg, &tempUse[0]);
k = VG_(get_reg_usage)(&c1->instrs[i], TempReg, &tempUse[0]);
vg_assert(k >= 0 && k <= 3);
/* For each temp usage ... fwds in program order */
@ -1717,7 +1717,7 @@ UCodeBlock* vg_do_register_allocation ( UCodeBlock* c1 )
/* Resulting code goes here. We generate it all in a forwards
pass. */
c2 = VG_(allocCodeBlock)();
c2 = VG_(alloc_UCodeBlock)();
/* At the start, no TempRegs are assigned to any real register.
Correspondingly, all temps claim to be currently resident in
@ -1752,13 +1752,13 @@ UCodeBlock* vg_do_register_allocation ( UCodeBlock* c1 )
# endif
if (dis)
VG_(ppUInstr)(i, &c1->instrs[i]);
VG_(pp_UInstr)(i, &c1->instrs[i]);
/* First, free up enough real regs for this insn. This may
generate spill stores since we may have to evict some TempRegs
currently in real regs. Also generates spill loads. */
k = VG_(getRegUsage)(&c1->instrs[i], TempReg, &tempUse[0]);
k = VG_(get_reg_usage)(&c1->instrs[i], TempReg, &tempUse[0]);
vg_assert(k >= 0 && k <= 3);
/* For each ***different*** temp mentioned in the insn .... */
@ -1864,12 +1864,12 @@ UCodeBlock* vg_do_register_allocation ( UCodeBlock* c1 )
temp_info[real_to_temp[r]].real_no = VG_NOTHING;
if (temp_info[real_to_temp[r]].dead_before > i) {
uInstr2(c2, PUT, 4,
RealReg, VG_(rankToRealRegNum)(r),
RealReg, VG_(rank_to_realreg)(r),
SpillNo, temp_info[real_to_temp[r]].spill_no);
VG_(uinstrs_spill)++;
spill_reqd = True;
if (dis)
VG_(ppUInstr)(c2->used-1, &LAST_UINSTR(c2));
VG_(pp_UInstr)(c2->used-1, &LAST_UINSTR(c2));
}
/* Decide if tno is read. */
@ -1882,11 +1882,11 @@ UCodeBlock* vg_do_register_allocation ( UCodeBlock* c1 )
if (isRead) {
uInstr2(c2, GET, 4,
SpillNo, temp_info[tno].spill_no,
RealReg, VG_(rankToRealRegNum)(r) );
RealReg, VG_(rank_to_realreg)(r) );
VG_(uinstrs_spill)++;
spill_reqd = True;
if (dis)
VG_(ppUInstr)(c2->used-1, &LAST_UINSTR(c2));
VG_(pp_UInstr)(c2->used-1, &LAST_UINSTR(c2));
}
/* Update the forwards and backwards maps. */
@ -1899,12 +1899,12 @@ UCodeBlock* vg_do_register_allocation ( UCodeBlock* c1 )
and use patchUInstr to convert its rTempRegs into
realregs. */
for (j = 0; j < k; j++)
realUse[j] = VG_(rankToRealRegNum)(temp_info[tempUse[j].num].real_no);
VG_(copyUInstr)(c2, &c1->instrs[i]);
realUse[j] = VG_(rank_to_realreg)(temp_info[tempUse[j].num].real_no);
VG_(copy_UInstr)(c2, &c1->instrs[i]);
patchUInstr(&LAST_UINSTR(c2), &tempUse[0], &realUse[0], k);
if (dis) {
VG_(ppUInstr)(c2->used-1, &LAST_UINSTR(c2));
VG_(pp_UInstr)(c2->used-1, &LAST_UINSTR(c2));
VG_(printf)("\n");
}
}
@ -1912,7 +1912,7 @@ UCodeBlock* vg_do_register_allocation ( UCodeBlock* c1 )
if (temp_info != NULL)
VG_(arena_free)(VG_AR_JITTER, temp_info);
VG_(freeCodeBlock)(c1);
VG_(free_UCodeBlock)(c1);
if (spill_reqd)
VG_(translations_needing_spill)++;
@ -1939,14 +1939,14 @@ static void vg_realreg_liveness_analysis ( UCodeBlock* cb )
u->regs_live_after = rregs_live;
k = VG_(getRegUsage)(u, RealReg, regUse);
k = VG_(get_reg_usage)(u, RealReg, regUse);
/* For each reg usage ... bwds in program order. Variable is live
before this UInstr if it is read by this UInstr.
Note that regUse[j].num holds the Intel reg number, so we must
convert it to our rank number. */
for (j = k-1; j >= 0; j--) {
SET_RREG_LIVENESS ( VG_(realRegNumToRank)(regUse[j].num),
SET_RREG_LIVENESS ( VG_(realreg_to_rank)(regUse[j].num),
rregs_live,
!regUse[j].isWrite );
}
@ -1985,7 +1985,7 @@ void VG_(translate) ( /*IN*/ ThreadState* tst,
if (!debugging_translation)
VG_TRACK( pre_mem_read, Vg_CoreTranslate, tst, "", orig_addr, 1 );
cb = VG_(allocCodeBlock)();
cb = VG_(alloc_UCodeBlock)();
/* If doing any code printing, print a basic block start marker */
if (VG_(clo_trace_codegen)) {
@ -2022,7 +2022,7 @@ void VG_(translate) ( /*IN*/ ThreadState* tst,
VGP_PUSHCC(VgpInstrument);
cb = SK_(instrument) ( cb, orig_addr );
if (VG_(print_codegen))
VG_(ppUCodeBlock) ( cb, "Instrumented UCode:" );
VG_(pp_UCodeBlock) ( cb, "Instrumented UCode:" );
VG_(saneUCodeBlock)( cb );
VGP_POPCC(VgpInstrument);
@ -2044,7 +2044,7 @@ void VG_(translate) ( /*IN*/ ThreadState* tst,
VGP_PUSHCC(VgpFromUcode);
final_code = VG_(emit_code)(cb, &final_code_size );
VGP_POPCC(VgpFromUcode);
VG_(freeCodeBlock)(cb);
VG_(free_UCodeBlock)(cb);
#undef DECIDE_IF_PRINTING_CODEGEN_FOR_PHASE

View File

@ -861,11 +861,11 @@ Bool SK_(expensive_sanity_check)(void)
/*--- Instrumentation ---*/
/*--------------------------------------------------------------*/
#define uInstr1 VG_(newUInstr1)
#define uInstr2 VG_(newUInstr2)
#define uLiteral VG_(setLiteralField)
#define uCCall VG_(setCCallFields)
#define newTemp VG_(getNewTemp)
#define uInstr1 VG_(new_UInstr1)
#define uInstr2 VG_(new_UInstr2)
#define uLiteral VG_(set_lit_field)
#define uCCall VG_(set_ccall_fields)
#define newTemp VG_(get_new_temp)
/* Create and return an instrumented version of cb_in. Free cb_in
before returning. */
@ -876,13 +876,12 @@ UCodeBlock* SK_(instrument) ( UCodeBlock* cb_in, Addr not_used )
UInstr* u_in;
Int t_size = INVALID_TEMPREG;
cb = VG_(allocCodeBlock)();
cb = VG_(alloc_UCodeBlock)();
cb->nextTemp = cb_in->nextTemp;
for (i = 0; i < cb_in->used; i++) {
u_in = &cb_in->instrs[i];
/* VG_(ppUInstr)(0, u_in); */
switch (u_in->opcode) {
case NOP: case CALLM_S: case CALLM_E:
@ -899,7 +898,7 @@ UCodeBlock* SK_(instrument) ( UCodeBlock* cb_in, Addr not_used )
uInstr2(cb, CCALL, 0, TempReg, u_in->val1, TempReg, t_size);
// SSS: make regparms(2) eventually...
uCCall(cb, (Addr) & eraser_mem_read, 2, 0, False);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
t_size = INVALID_TEMPREG;
break;
@ -913,17 +912,17 @@ UCodeBlock* SK_(instrument) ( UCodeBlock* cb_in, Addr not_used )
8 == u_in->size || 10 == u_in->size);
uInstr2(cb, CCALL, 0, TempReg, u_in->val2, TempReg, t_size);
uCCall(cb, (Addr) & eraser_mem_write, 2, 0, False);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
t_size = INVALID_TEMPREG;
break;
default:
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
}
}
VG_(freeCodeBlock)(cb_in);
VG_(free_UCodeBlock)(cb_in);
return cb;
}

View File

@ -60,8 +60,8 @@
them except %esp, %ebp. %ebp permanently points at VG_(baseBlock).
If you change this you'll have to also change at least these:
- VG_(rankToRealRegNum)()
- VG_(realRegNumToRank)()
- VG_(rank_to_realreg)()
- VG_(realreg_to_rank)()
- ppRegsLiveness()
- the RegsLive type (maybe -- RegsLive type must have more than
VG_MAX_REALREGS bits)
@ -339,7 +339,7 @@ extern void VG_(strncpy_safely) ( Char* dest, const Char* src, Int ndest );
/* Mini-regexp function. Searches for 'pat' in 'str'. Supports
* meta-symbols '*' and '?'. '\' escapes meta-symbols. */
extern Bool VG_(stringMatch) ( Char* pat, Char* str );
extern Bool VG_(string_match) ( Char* pat, Char* str );
/* ------------------------------------------------------------------ */
@ -639,8 +639,8 @@ typedef
analysis done. This info is a little bit arch-specific --
VG_MAX_REALREGS can vary on different architectures. Note that
to use this information requires converting between register ranks
and the Intel register numbers, using VG_(realRegNumToRank)()
and/or VG_(rankToRealRegNum)() */
and the Intel register numbers, using VG_(realreg_to_rank)()
and/or VG_(rank_to_realreg)() */
RRegSet regs_live_after:VG_MAX_REALREGS;
}
UInstr;
@ -672,7 +672,7 @@ typedef
/* Find what this instruction does to its regs. Tag indicates whether we're
* considering TempRegs (pre-reg-alloc) or RealRegs (post-reg-alloc).
* Useful for analysis/optimisation passes. */
extern Int VG_(getRegUsage) ( UInstr* u, Tag tag, RegUse* arr );
extern Int VG_(get_reg_usage) ( UInstr* u, Tag tag, RegUse* arr );
/* ------------------------------------------------------------------ */
@ -688,10 +688,10 @@ extern void VG_(register_noncompact_helper) ( Addr a );
/* Virtual register allocation */
/* Get a new virtual register */
extern Int VG_(getNewTemp) ( UCodeBlock* cb );
extern Int VG_(get_new_temp) ( UCodeBlock* cb );
/* Get a new virtual shadow register */
extern Int VG_(getNewShadow) ( UCodeBlock* cb );
extern Int VG_(get_new_shadow) ( UCodeBlock* cb );
/* Get a virtual register's corresponding virtual shadow register */
#define SHADOW(tempreg) ((tempreg)+1)
@ -699,26 +699,26 @@ extern Int VG_(getNewShadow) ( UCodeBlock* cb );
/* ------------------------------------------------------------------ */
/* Low-level UInstr builders */
extern void VG_(newNOP) ( UInstr* u );
extern void VG_(newUInstr0) ( UCodeBlock* cb, Opcode opcode, Int sz );
extern void VG_(newUInstr1) ( UCodeBlock* cb, Opcode opcode, Int sz,
extern void VG_(new_NOP) ( UInstr* u );
extern void VG_(new_UInstr0) ( UCodeBlock* cb, Opcode opcode, Int sz );
extern void VG_(new_UInstr1) ( UCodeBlock* cb, Opcode opcode, Int sz,
Tag tag1, UInt val1 );
extern void VG_(newUInstr2) ( UCodeBlock* cb, Opcode opcode, Int sz,
extern void VG_(new_UInstr2) ( UCodeBlock* cb, Opcode opcode, Int sz,
Tag tag1, UInt val1,
Tag tag2, UInt val2 );
extern void VG_(newUInstr3) ( UCodeBlock* cb, Opcode opcode, Int sz,
extern void VG_(new_UInstr3) ( UCodeBlock* cb, Opcode opcode, Int sz,
Tag tag1, UInt val1,
Tag tag2, UInt val2,
Tag tag3, UInt val3 );
extern void VG_(setFlagRW) ( UInstr* u,
FlagSet fr, FlagSet fw );
extern void VG_(setLiteralField) ( UCodeBlock* cb, UInt lit32 );
extern void VG_(setCCallFields) ( UCodeBlock* cb, Addr fn, UChar argc,
UChar regparms_n, Bool has_ret_val );
extern void VG_(copyUInstr) ( UCodeBlock* cb, UInstr* instr );
extern void VG_(set_flag_RW) ( UInstr* u, FlagSet fr, FlagSet fw );
extern void VG_(set_lit_field) ( UCodeBlock* cb, UInt lit32 );
extern void VG_(set_ccall_fields) ( UCodeBlock* cb, Addr fn, UChar argc,
UChar regparms_n, Bool has_ret_val );
extern Bool VG_(anyFlagUse) ( UInstr* u );
extern void VG_(copy_UInstr) ( UCodeBlock* cb, UInstr* instr );
extern Bool VG_(any_flag_use)( UInstr* u );
/* Refer to `the last instruction stuffed in' (can be lvalue). */
#define LAST_UINSTR(cb) (cb)->instrs[(cb)->used-1]
@ -726,20 +726,20 @@ extern Bool VG_(anyFlagUse) ( UInstr* u );
/* ------------------------------------------------------------------ */
/* Higher-level UInstr sequence builders */
extern void VG_(callHelper_0_0) ( UCodeBlock* cb, Addr f);
extern void VG_(callHelper_1_0) ( UCodeBlock* cb, Addr f, UInt arg1,
UInt regparms_n);
extern void VG_(callHelper_2_0) ( UCodeBlock* cb, Addr f, UInt arg1, UInt arg2,
UInt regparms_n);
extern void VG_(call_helper_0_0) ( UCodeBlock* cb, Addr f);
extern void VG_(call_helper_1_0) ( UCodeBlock* cb, Addr f, UInt arg1,
UInt regparms_n);
extern void VG_(call_helper_2_0) ( UCodeBlock* cb, Addr f, UInt arg1, UInt arg2,
UInt regparms_n);
/* One way around the 3-arg C function limit is to pass args via global
* variables... ugly, but it works. */
void VG_(set_global_var) ( UCodeBlock* cb, Addr globvar_ptr, UInt val);
extern void VG_(set_global_var) ( UCodeBlock* cb, Addr globvar_ptr, UInt val);
/* ------------------------------------------------------------------ */
/* Allocating/freeing basic blocks of UCode */
extern UCodeBlock* VG_(allocCodeBlock) ( void );
extern void VG_(freeCodeBlock) ( UCodeBlock* cb );
extern UCodeBlock* VG_(alloc_UCodeBlock) ( void );
extern void VG_(free_UCodeBlock) ( UCodeBlock* cb );
/* ------------------------------------------------------------------ */
/* UCode pretty/ugly printing. Probably only useful to call from a skin
@ -748,13 +748,14 @@ extern void VG_(freeCodeBlock) ( UCodeBlock* cb );
/* When True, all generated code is/should be printed. */
extern Bool VG_(print_codegen);
extern void VG_(ppUCodeBlock) ( UCodeBlock* cb, Char* title );
extern void VG_(ppUInstr) ( Int instrNo, UInstr* u );
extern void VG_(ppUInstrWithRegs) ( Int instrNo, UInstr* u );
extern void VG_(upUInstr) ( Int instrNo, UInstr* u );
extern Char* VG_(nameUOpcode) ( Bool upper, Opcode opc );
extern void VG_(ppUOperand) ( UInstr* u, Int operandNo,
Int sz, Bool parens );
/* Pretty/ugly printing functions */
extern void VG_(pp_UCodeBlock) ( UCodeBlock* cb, Char* title );
extern void VG_(pp_UInstr) ( Int instrNo, UInstr* u );
extern void VG_(pp_UInstr_regs) ( Int instrNo, UInstr* u );
extern void VG_(up_UInstr) ( Int instrNo, UInstr* u );
extern Char* VG_(name_UOpcode) ( Bool upper, Opcode opc );
extern void VG_(pp_UOperand) ( UInstr* u, Int operandNo,
Int sz, Bool parens );
/*====================================================================*/
@ -783,30 +784,30 @@ extern void VG_(ppUOperand) ( UInstr* u, Int operandNo,
#define R_BH (4+R_EBX)
/* For pretty printing x86 code */
extern Char* VG_(nameOfIntReg) ( Int size, Int reg );
extern Char VG_(nameOfIntSize) ( Int size );
extern Char* VG_(name_of_int_reg) ( Int size, Int reg );
extern Char VG_(name_of_int_size) ( Int size );
/* Randomly useful things */
extern UInt VG_(extend_s_8to32) ( UInt x );
/* Code emitters */
extern void VG_(emitB) ( UInt b );
extern void VG_(emitW) ( UInt w );
extern void VG_(emitL) ( UInt l );
extern void VG_(newEmit)( void );
extern void VG_(emitB) ( UInt b );
extern void VG_(emitW) ( UInt w );
extern void VG_(emitL) ( UInt l );
extern void VG_(new_emit) ( void );
/* Finding offsets */
extern Int VG_(helper_offset) ( Addr a );
extern Int VG_(shadowRegOffset) ( Int arch );
extern Int VG_(shadowFlagsOffset) ( void );
extern Int VG_(helper_offset) ( Addr a );
extern Int VG_(shadow_reg_offset) ( Int arch );
extern Int VG_(shadow_flags_offset) ( void );
/* Convert reg ranks <-> Intel register ordering, for using register
liveness information. */
extern Int VG_(realRegNumToRank) ( Int realReg );
extern Int VG_(rankToRealRegNum) ( Int rank );
extern Int VG_(realreg_to_rank) ( Int realreg );
extern Int VG_(rank_to_realreg) ( Int rank );
/* Call a subroutine. Does no argument passing, stack manipulations, etc. */
void VG_(synth_call) ( Bool ensure_shortform, Int word_offset );
extern void VG_(synth_call) ( Bool ensure_shortform, Int word_offset );
/* For calling C functions -- saves caller save regs, pushes args, calls,
clears the stack, restores caller save regs. `fn' must be registered in
@ -816,49 +817,54 @@ void VG_(synth_call) ( Bool ensure_shortform, Int word_offset );
WARNING: a UInstr should *not* be translated with synth_ccall() followed
by some other x86 assembly code; this will invalidate the results of
vg_realreg_liveness_analysis() and everything will fall over. */
void VG_(synth_ccall) ( Addr fn, Int argc, Int regparms_n, UInt argv[],
Tag tagv[], Int ret_reg,
RRegSet regs_live_before, RRegSet regs_live_after );
extern void VG_(synth_ccall) ( Addr fn, Int argc, Int regparms_n, UInt argv[],
Tag tagv[], Int ret_reg,
RRegSet regs_live_before,
RRegSet regs_live_after );
/* Addressing modes */
void VG_(emit_amode_offregmem_reg) ( Int off, Int regmem, Int reg );
void VG_(emit_amode_ereg_greg) ( Int e_reg, Int g_reg );
extern void VG_(emit_amode_offregmem_reg)( Int off, Int regmem, Int reg );
extern void VG_(emit_amode_ereg_greg) ( Int e_reg, Int g_reg );
/* v-size (4, or 2 with OSO) insn emitters */
void VG_(emit_movv_offregmem_reg) ( Int sz, Int off, Int areg, Int reg );
void VG_(emit_movv_reg_offregmem) ( Int sz, Int reg, Int off, Int areg );
void VG_(emit_movv_reg_reg) ( Int sz, Int reg1, Int reg2 );
void VG_(emit_nonshiftopv_lit_reg)( Int sz, Opcode opc, UInt lit, Int reg );
void VG_(emit_shiftopv_lit_reg) ( Int sz, Opcode opc, UInt lit, Int reg );
void VG_(emit_nonshiftopv_reg_reg)( Int sz, Opcode opc, Int reg1, Int reg2 );
void VG_(emit_movv_lit_reg) ( Int sz, UInt lit, Int reg );
void VG_(emit_unaryopv_reg) ( Int sz, Opcode opc, Int reg );
void VG_(emit_pushv_reg) ( Int sz, Int reg );
void VG_(emit_popv_reg) ( Int sz, Int reg );
extern void VG_(emit_movv_offregmem_reg) ( Int sz, Int off, Int areg, Int reg );
extern void VG_(emit_movv_reg_offregmem) ( Int sz, Int reg, Int off, Int areg );
extern void VG_(emit_movv_reg_reg) ( Int sz, Int reg1, Int reg2 );
extern void VG_(emit_nonshiftopv_lit_reg)( Int sz, Opcode opc, UInt lit,
Int reg );
extern void VG_(emit_shiftopv_lit_reg) ( Int sz, Opcode opc, UInt lit,
Int reg );
extern void VG_(emit_nonshiftopv_reg_reg)( Int sz, Opcode opc,
Int reg1, Int reg2 );
extern void VG_(emit_movv_lit_reg) ( Int sz, UInt lit, Int reg );
extern void VG_(emit_unaryopv_reg) ( Int sz, Opcode opc, Int reg );
extern void VG_(emit_pushv_reg) ( Int sz, Int reg );
extern void VG_(emit_popv_reg) ( Int sz, Int reg );
void VG_(emit_pushl_lit32) ( UInt int32 );
void VG_(emit_pushl_lit8) ( Int lit8 );
void VG_(emit_cmpl_zero_reg) ( Int reg );
void VG_(emit_swapl_reg_EAX) ( Int reg );
void VG_(emit_movv_lit_offregmem) ( Int sz, UInt lit, Int off, Int memreg );
extern void VG_(emit_pushl_lit32) ( UInt int32 );
extern void VG_(emit_pushl_lit8) ( Int lit8 );
extern void VG_(emit_cmpl_zero_reg) ( Int reg );
extern void VG_(emit_swapl_reg_EAX) ( Int reg );
extern void VG_(emit_movv_lit_offregmem) ( Int sz, UInt lit, Int off,
Int memreg );
/* b-size (1 byte) instruction emitters */
void VG_(emit_movb_lit_offregmem) ( UInt lit, Int off, Int memreg );
void VG_(emit_movb_reg_offregmem) ( Int reg, Int off, Int areg );
void VG_(emit_unaryopb_reg) ( Opcode opc, Int reg );
void VG_(emit_testb_lit_reg) ( UInt lit, Int reg );
extern void VG_(emit_movb_lit_offregmem) ( UInt lit, Int off, Int memreg );
extern void VG_(emit_movb_reg_offregmem) ( Int reg, Int off, Int areg );
extern void VG_(emit_unaryopb_reg) ( Opcode opc, Int reg );
extern void VG_(emit_testb_lit_reg) ( UInt lit, Int reg );
/* zero-extended load emitters */
void VG_(emit_movzbl_offregmem_reg) ( Int off, Int regmem, Int reg );
void VG_(emit_movzwl_offregmem_reg) ( Int off, Int areg, Int reg );
extern void VG_(emit_movzbl_offregmem_reg) ( Int off, Int regmem, Int reg );
extern void VG_(emit_movzwl_offregmem_reg) ( Int off, Int areg, Int reg );
/* misc instruction emitters */
void VG_(emit_call_reg) ( Int reg );
void VG_(emit_add_lit_to_esp) ( Int lit );
void VG_(emit_jcondshort_delta) ( Condcode cond, Int delta );
void VG_(emit_pushal) ( void );
void VG_(emit_popal) ( void );
void VG_(emit_AMD_prefetch_reg) ( Int reg );
extern void VG_(emit_call_reg) ( Int reg );
extern void VG_(emit_add_lit_to_esp) ( Int lit );
extern void VG_(emit_jcondshort_delta) ( Condcode cond, Int delta );
extern void VG_(emit_pushal) ( void );
extern void VG_(emit_popal) ( void );
extern void VG_(emit_AMD_prefetch_reg) ( Int reg );
/*====================================================================*/
@ -983,7 +989,7 @@ extern void VG_(maybe_record_error) ( ThreadState* tst, ErrorKind ekind,
Skips leading spaces on the line. Returns True if EOF was hit instead.
Useful for reading in extra skin-specific suppression lines.
*/
extern Bool VG_(getLine) ( Int fd, Char* buf, Int nBuf );
extern Bool VG_(get_line) ( Int fd, Char* buf, Int nBuf );
/*====================================================================*/
@ -1045,7 +1051,7 @@ typedef
/* Use this to free blocks if VG_(needs).alternative_free == True.
It frees the ShadowChunk and the malloc'd block it points to. */
extern void VG_(freeShadowChunk) ( ShadowChunk* sc );
extern void VG_(free_ShadowChunk) ( ShadowChunk* sc );
/* Makes an array of pointers to all the shadow chunks of malloc'd blocks */
extern ShadowChunk** VG_(get_malloc_shadows) ( /*OUT*/ UInt* n_shadows );
@ -1336,7 +1342,7 @@ extern UInt SK_(handle_client_request) ( ThreadState* tst, UInt* arg_block );
/* ------------------------------------------------------------------ */
/* VG_(needs).extends_UCode */
/* Used in VG_(getExtRegUsage)() */
/* Useful to use in VG_(get_Xreg_usage)() */
#define VG_UINSTR_READS_REG(ono) \
{ if (mycat(u->tag,ono) == tag) \
{ arr[n].num = mycat(u->val,ono); \
@ -1352,12 +1358,13 @@ extern UInt SK_(handle_client_request) ( ThreadState* tst, UInt* arg_block );
} \
}
extern Int SK_(getExtRegUsage) ( UInstr* u, Tag tag, RegUse* arr );
extern void SK_(emitExtUInstr) ( UInstr* u, RRegSet regs_live_before );
extern Bool SK_(saneExtUInstr) ( Bool beforeRA, Bool beforeLiveness,
/* 'X' prefix indicates eXtended UCode. */
extern Int SK_(get_Xreg_usage) ( UInstr* u, Tag tag, RegUse* arr );
extern void SK_(emit_XUInstr) ( UInstr* u, RRegSet regs_live_before );
extern Bool SK_(sane_XUInstr) ( Bool beforeRA, Bool beforeLiveness,
UInstr* u );
extern Char* SK_(nameExtUOpcode) ( Opcode opc );
extern void SK_(ppExtUInstr) ( UInstr* u );
extern Char* SK_(name_XUOpcode) ( Opcode opc );
extern void SK_(pp_XUInstr) ( UInstr* u );
/* ------------------------------------------------------------------ */

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@ -30,8 +30,8 @@
#include "vg_skin.h"
//#define uInstr0 VG_(newUInstr0)
//#define uLiteral VG_(setLiteralField)
//#define uInstr0 VG_(new_UInstr0)
//#define uLiteral VG_(set_lit_field)
/* Nb: use ULongs because the numbers can get very big */
static ULong n_dlrr_calls = 0;
@ -140,18 +140,18 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
UInstr* u;
Char fnname[100];
cb = VG_(allocCodeBlock)();
cb = VG_(alloc_UCodeBlock)();
cb->nextTemp = cb_in->nextTemp;
/* Count call to dlrr(), if this BB is dlrr()'s entry point */
if (VG_(get_fnname_if_entry)(orig_addr, fnname, 100) &&
0 == VG_(strcmp)(fnname, "_dl_runtime_resolve"))
{
VG_(callHelper_0_0)(cb, (Addr) & add_one_dlrr_call);
VG_(call_helper_0_0)(cb, (Addr) & add_one_dlrr_call);
}
/* Count basic block */
VG_(callHelper_0_0)(cb, (Addr) & add_one_BB);
VG_(call_helper_0_0)(cb, (Addr) & add_one_BB);
for (i = 0; i < cb_in->used; i++) {
u = &cb_in->instrs[i];
@ -162,31 +162,31 @@ UCodeBlock* SK_(instrument)(UCodeBlock* cb_in, Addr orig_addr)
case INCEIP:
/* Count x86 instr */
VG_(callHelper_0_0)(cb, (Addr) & add_one_x86_instr);
VG_(copyUInstr)(cb, u);
VG_(call_helper_0_0)(cb, (Addr) & add_one_x86_instr);
VG_(copy_UInstr)(cb, u);
break;
case JMP:
if (u->cond != CondAlways) {
/* Count Jcc */
VG_(callHelper_0_0)(cb, (Addr) & add_one_Jcc);
VG_(copyUInstr)(cb, u);
VG_(call_helper_0_0)(cb, (Addr) & add_one_Jcc);
VG_(copy_UInstr)(cb, u);
/* Count non-taken Jcc */
VG_(callHelper_0_0)(cb, (Addr) & add_one_Jcc_untaken);
VG_(call_helper_0_0)(cb, (Addr) & add_one_Jcc_untaken);
} else {
VG_(copyUInstr)(cb, u);
VG_(copy_UInstr)(cb, u);
}
break;
default:
/* Count UInstr */
VG_(callHelper_0_0)(cb, (Addr) & add_one_UInstr);
VG_(copyUInstr)(cb, u);
VG_(call_helper_0_0)(cb, (Addr) & add_one_UInstr);
VG_(copy_UInstr)(cb, u);
break;
}
}
VG_(freeCodeBlock)(cb_in);
VG_(free_UCodeBlock)(cb_in);
return cb;
}

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@ -558,7 +558,7 @@ Bool SK_(read_extra_suppression_info) ( Int fd, Char* buf, Int nBuf,
Bool eof;
if (s->skind == ParamSupp) {
eof = VG_(getLine) ( fd, buf, nBuf );
eof = VG_(get_line) ( fd, buf, nBuf );
if (eof) return False;
s->string = VG_(strdup)(buf);
}

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@ -35,8 +35,8 @@
/*--- Renamings of frequently-used global functions. ---*/
/*------------------------------------------------------------*/
#define nameIReg VG_(nameOfIntReg)
#define nameISize VG_(nameOfIntSize)
#define nameIReg VG_(name_of_int_reg)
#define nameISize VG_(name_of_int_size)
#define dis VG_(print_codegen)
@ -54,7 +54,7 @@
static void emit_testv_lit_reg ( Int sz, UInt lit, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) {
VG_(emitB) ( 0x66 );
} else {
@ -70,7 +70,7 @@ static void emit_testv_lit_reg ( Int sz, UInt lit, Int reg )
static void emit_testv_lit_offregmem ( Int sz, UInt lit, Int off, Int reg )
{
VG_(newEmit)();
VG_(new_emit)();
if (sz == 2) {
VG_(emitB) ( 0x66 );
} else {
@ -174,19 +174,19 @@ static void synth_TESTV ( Int sz, Int tag, Int val )
switch (sz) {
case 4:
emit_testv_lit_offregmem (
4, 0xFFFFFFFF, VG_(shadowRegOffset)(val), R_EBP );
4, 0xFFFFFFFF, VG_(shadow_reg_offset)(val), R_EBP );
break;
case 2:
emit_testv_lit_offregmem (
4, 0x0000FFFF, VG_(shadowRegOffset)(val), R_EBP );
4, 0x0000FFFF, VG_(shadow_reg_offset)(val), R_EBP );
break;
case 1:
if (val < 4) {
emit_testv_lit_offregmem (
4, 0x000000FF, VG_(shadowRegOffset)(val), R_EBP );
4, 0x000000FF, VG_(shadow_reg_offset)(val), R_EBP );
} else {
emit_testv_lit_offregmem (
4, 0x0000FF00, VG_(shadowRegOffset)(val-4), R_EBP );
4, 0x0000FF00, VG_(shadow_reg_offset)(val-4), R_EBP );
}
break;
case 0:
@ -237,20 +237,20 @@ static void synth_GETV ( Int sz, Int arch, Int reg )
/* VG_(printf)("synth_GETV %d of Arch %s\n", sz, nameIReg(sz, arch)); */
switch (sz) {
case 4:
VG_(emit_movv_offregmem_reg) ( 4, VG_(shadowRegOffset)(arch),
VG_(emit_movv_offregmem_reg) ( 4, VG_(shadow_reg_offset)(arch),
R_EBP, reg );
break;
case 2:
VG_(emit_movzwl_offregmem_reg) ( VG_(shadowRegOffset)(arch),
VG_(emit_movzwl_offregmem_reg) ( VG_(shadow_reg_offset)(arch),
R_EBP, reg );
VG_(emit_nonshiftopv_lit_reg) ( 4, OR, 0xFFFF0000, reg );
break;
case 1:
if (arch < 4) {
VG_(emit_movzbl_offregmem_reg) ( VG_(shadowRegOffset)(arch),
VG_(emit_movzbl_offregmem_reg) ( VG_(shadow_reg_offset)(arch),
R_EBP, reg );
} else {
VG_(emit_movzbl_offregmem_reg) ( VG_(shadowRegOffset)(arch-4)+1,
VG_(emit_movzbl_offregmem_reg) ( VG_(shadow_reg_offset)(arch-4)+1,
R_EBP, reg );
}
VG_(emit_nonshiftopv_lit_reg) ( 4, OR, 0xFFFFFF00, reg );
@ -271,21 +271,21 @@ static void synth_PUTV ( Int sz, Int srcTag, UInt lit_or_reg, Int arch )
case 4:
vg_assert(lit == 0x00000000);
VG_(emit_movv_lit_offregmem) ( 4, 0x00000000,
VG_(shadowRegOffset)(arch), R_EBP );
VG_(shadow_reg_offset)(arch), R_EBP );
break;
case 2:
vg_assert(lit == 0xFFFF0000);
VG_(emit_movv_lit_offregmem) ( 2, 0x0000,
VG_(shadowRegOffset)(arch), R_EBP );
VG_(shadow_reg_offset)(arch), R_EBP );
break;
case 1:
vg_assert(lit == 0xFFFFFF00);
if (arch < 4) {
VG_(emit_movb_lit_offregmem) ( 0x00,
VG_(shadowRegOffset)(arch), R_EBP );
VG_(shadow_reg_offset)(arch), R_EBP );
} else {
VG_(emit_movb_lit_offregmem) ( 0x00,
VG_(shadowRegOffset)(arch-4)+1,
VG_(shadow_reg_offset)(arch-4)+1,
R_EBP );
}
break;
@ -310,19 +310,19 @@ static void synth_PUTV ( Int sz, Int srcTag, UInt lit_or_reg, Int arch )
switch (sz) {
case 4:
VG_(emit_movv_reg_offregmem) ( 4, reg,
VG_(shadowRegOffset)(arch), R_EBP );
VG_(shadow_reg_offset)(arch), R_EBP );
break;
case 2:
VG_(emit_movv_reg_offregmem) ( 2, reg,
VG_(shadowRegOffset)(arch), R_EBP );
VG_(shadow_reg_offset)(arch), R_EBP );
break;
case 1:
if (arch < 4) {
VG_(emit_movb_reg_offregmem) ( reg,
VG_(shadowRegOffset)(arch), R_EBP );
VG_(shadow_reg_offset)(arch), R_EBP );
} else {
VG_(emit_movb_reg_offregmem) ( reg,
VG_(shadowRegOffset)(arch-4)+1, R_EBP );
VG_(shadow_reg_offset)(arch-4)+1, R_EBP );
}
break;
default:
@ -338,7 +338,7 @@ static void synth_PUTV ( Int sz, Int srcTag, UInt lit_or_reg, Int arch )
static void synth_GETVF ( Int reg )
{
VG_(emit_movv_offregmem_reg) ( 4, VG_(shadowFlagsOffset)(), R_EBP, reg );
VG_(emit_movv_offregmem_reg) ( 4, VG_(shadow_flags_offset)(), R_EBP, reg );
/* paranoia only; should be unnecessary ... */
/* VG_(emit_nonshiftopv_lit_reg) ( 4, OR, 0xFFFFFFFE, reg ); */
}
@ -346,7 +346,7 @@ static void synth_GETVF ( Int reg )
static void synth_PUTVF ( UInt reg )
{
VG_(emit_movv_reg_offregmem) ( 4, reg, VG_(shadowFlagsOffset)(), R_EBP );
VG_(emit_movv_reg_offregmem) ( 4, reg, VG_(shadow_flags_offset)(), R_EBP );
}
@ -444,7 +444,7 @@ static void synth_TAG1_op ( TagOp op, Int reg, RRegSet regs_live_after )
for (i = 0; i < VG_MAX_REALREGS; i++) {
if (! IS_RREG_LIVE(i, regs_live_after)) {
reg_of_i = VG_(rankToRealRegNum)(i);
reg_of_i = VG_(rank_to_realreg)(i);
if (reg != reg_of_i) {
dead_reg = reg_of_i;
break;
@ -564,7 +564,7 @@ static void synth_TAG2_op ( TagOp op, Int regs, Int regd )
/*--- Generate code for a single UInstr. ---*/
/*----------------------------------------------------*/
void SK_(emitExtUInstr) ( UInstr* u, RRegSet regs_live_before )
void SK_(emit_XUInstr) ( UInstr* u, RRegSet regs_live_before )
{
switch (u->opcode) {
@ -631,9 +631,9 @@ void SK_(emitExtUInstr) ( UInstr* u, RRegSet regs_live_before )
break;
default:
VG_(printf)("emitExtUInstr: unhandled extension insn:\n");
VG_(ppUInstr)(0,u);
VG_(panic)("emitExtUInstr: unhandled extension opcode");
VG_(printf)("emit_XUInstr: unhandled extension insn:\n");
VG_(pp_UInstr)(0,u);
VG_(panic)("emit_XUInstr: unhandled extension opcode");
}
}

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@ -1601,7 +1601,7 @@ static void add_to_freed_queue ( ShadowChunk* sc )
vg_freed_list_start = sc1->next;
}
sc1->next = NULL; /* just paranoia */
VG_(freeShadowChunk) ( sc1 );
VG_(free_ShadowChunk) ( sc1 );
}
}

View File

@ -38,7 +38,7 @@
vg_translate.c:VG_(saneUInstr)(). Everything general said there applies
here too.
*/
Bool SK_(saneExtUInstr)(Bool beforeRA, Bool beforeLiveness, UInstr* u)
Bool SK_(sane_XUInstr)(Bool beforeRA, Bool beforeLiveness, UInstr* u)
{
// SSS: duplicating these macros really sucks
# define LIT0 (u->lit32 == 0)
@ -93,7 +93,7 @@ Bool SK_(saneExtUInstr)(Bool beforeRA, Bool beforeLiveness, UInstr* u)
case TAG2: return LIT0 && SZ0 && CC0 && TR1 && TR2 && Ls3 && XOTHER;
default:
VG_(printf)("unhandled opcode: %u\n", u->opcode);
VG_(panic)("SK_(saneExtUInstr): unhandled opcode");
VG_(panic)("SK_(sane_XUInstr): unhandled opcode");
}
# undef LIT0
# undef LIT1
@ -160,7 +160,7 @@ static Char* nameOfTagOp ( TagOp h )
}
Char* SK_(nameExtUOpcode)(Opcode opc)
Char* SK_(name_XUOpcode)(Opcode opc)
{
switch (opc) {
case GETVF: return "GETVF";
@ -175,7 +175,7 @@ Char* SK_(nameExtUOpcode)(Opcode opc)
case SETV: return "SETV";
default:
VG_(printf)("unhandled opcode: %u\n", opc);
VG_(panic)("SK_(nameExtUOpcode): unhandled case");
VG_(panic)("SK_(name_XUOpcode): unhandled case");
}
}
@ -183,60 +183,60 @@ Char* SK_(nameExtUOpcode)(Opcode opc)
Debugging stuff.
------------------------------------------------------------------ */
void SK_(ppExtUInstr)(UInstr* u)
void SK_(pp_XUInstr)(UInstr* u)
{
switch (u->opcode) {
case TAG1:
VG_(printf)("\t");
VG_(ppUOperand)(u, 1, 4, False);
VG_(pp_UOperand)(u, 1, 4, False);
VG_(printf)(" = %s ( ", nameOfTagOp( u->val3 ));
VG_(ppUOperand)(u, 1, 4, False);
VG_(pp_UOperand)(u, 1, 4, False);
VG_(printf)(" )");
break;
case TAG2:
VG_(printf)("\t");
VG_(ppUOperand)(u, 2, 4, False);
VG_(pp_UOperand)(u, 2, 4, False);
VG_(printf)(" = %s ( ", nameOfTagOp( u->val3 ));
VG_(ppUOperand)(u, 1, 4, False);
VG_(pp_UOperand)(u, 1, 4, False);
VG_(printf)(", ");
VG_(ppUOperand)(u, 2, 4, False);
VG_(pp_UOperand)(u, 2, 4, False);
VG_(printf)(" )");
break;
case STOREV: case LOADV:
VG_(printf)("\t");
VG_(ppUOperand)(u, 1, u->size, u->opcode==LOADV);
VG_(pp_UOperand)(u, 1, u->size, u->opcode==LOADV);
VG_(printf)(", ");
VG_(ppUOperand)(u, 2, u->size, u->opcode==STOREV);
VG_(pp_UOperand)(u, 2, u->size, u->opcode==STOREV);
break;
case PUTVF: case GETVF:
VG_(printf)("\t");
VG_(ppUOperand)(u, 1, 0, False);
VG_(pp_UOperand)(u, 1, 0, False);
break;
case GETV: case PUTV:
VG_(printf)("\t");
VG_(ppUOperand)(u, 1, u->opcode==PUTV ? 4 : u->size, False);
VG_(pp_UOperand)(u, 1, u->opcode==PUTV ? 4 : u->size, False);
VG_(printf)(", ");
VG_(ppUOperand)(u, 2, u->opcode==GETV ? 4 : u->size, False);
VG_(pp_UOperand)(u, 2, u->opcode==GETV ? 4 : u->size, False);
break;
case TESTV: case SETV:
VG_(printf)("\t");
VG_(ppUOperand)(u, 1, u->size, False);
VG_(pp_UOperand)(u, 1, u->size, False);
break;
default:
VG_(printf)("unhandled opcode: %u\n", u->opcode);
VG_(panic)("SK_(ppExtUInstr): unhandled opcode");
VG_(panic)("SK_(pp_XUInstr): unhandled opcode");
}
}
Int SK_(getExtRegUsage)(UInstr* u, Tag tag, RegUse* arr)
Int SK_(get_Xreg_usage)(UInstr* u, Tag tag, RegUse* arr)
{
# define RD(ono) VG_UINSTR_READS_REG(ono)
# define WR(ono) VG_UINSTR_WRITES_REG(ono)
@ -263,7 +263,7 @@ Int SK_(getExtRegUsage)(UInstr* u, Tag tag, RegUse* arr)
default:
VG_(printf)("unhandled opcode: %u\n", u->opcode);
VG_(panic)("SK_(getExtRegUsage): unhandled opcode");
VG_(panic)("SK_(get_Xreg_usage): unhandled opcode");
}
return n;
@ -275,13 +275,13 @@ Int SK_(getExtRegUsage)(UInstr* u, Tag tag, RegUse* arr)
/*--- New instrumentation machinery. ---*/
/*------------------------------------------------------------*/
#define uInstr1 VG_(newUInstr1)
#define uInstr2 VG_(newUInstr2)
#define uInstr3 VG_(newUInstr3)
#define uLiteral VG_(setLiteralField)
#define uCCall VG_(setCCallFields)
#define newTemp VG_(getNewTemp)
#define newShadow VG_(getNewShadow)
#define uInstr1 VG_(new_UInstr1)
#define uInstr2 VG_(new_UInstr2)
#define uInstr3 VG_(new_UInstr3)
#define uLiteral VG_(set_lit_field)
#define uCCall VG_(set_ccall_fields)
#define newTemp VG_(get_new_temp)
#define newShadow VG_(get_new_shadow)
static
TagOp get_Tag_ImproveOR_TQ ( Int sz )
@ -511,7 +511,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
Int i, j;
UInstr* u_in;
Int qs, qd, qt, qtt;
cb = VG_(allocCodeBlock)();
cb = VG_(alloc_UCodeBlock)();
cb->nextTemp = cb_in->nextTemp;
for (i = 0; i < cb_in->used; i++) {
@ -524,7 +524,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
break;
case INCEIP:
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* Loads and stores. Test the V bits for the address. 24
@ -545,7 +545,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
uInstr2(cb, LOADV, u_in->size,
TempReg, u_in->val1,
TempReg, SHADOW(u_in->val2));
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
case STORE:
@ -556,7 +556,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
uInstr2(cb, STOREV, u_in->size,
TempReg, SHADOW(u_in->val1),
TempReg, u_in->val2);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* Moving stuff around. Make the V bits follow accordingly,
@ -566,26 +566,26 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
uInstr2(cb, GETV, u_in->size,
ArchReg, u_in->val1,
TempReg, SHADOW(u_in->val2));
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
case PUT:
uInstr2(cb, PUTV, u_in->size,
TempReg, SHADOW(u_in->val1),
ArchReg, u_in->val2);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
case GETF:
/* This is not the smartest way to do it, but should work. */
qd = create_GETVF(cb, u_in->size);
uInstr2(cb, MOV, 4, TempReg, qd, TempReg, SHADOW(u_in->val1));
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
case PUTF:
create_PUTVF(cb, u_in->size, SHADOW(u_in->val1));
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
case MOV:
@ -602,7 +602,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
default:
VG_(panic)("memcheck_instrument: MOV");
}
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* Special case of add, where one of the operands is a literal.
@ -610,12 +610,12 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
Therefore: lea1#(qa) = left(qa)
*/
case LEA1:
vg_assert(u_in->size == 4 && !VG_(anyFlagUse)(u_in));
vg_assert(u_in->size == 4 && !VG_(any_flag_use)(u_in));
qs = SHADOW(u_in->val1);
qd = SHADOW(u_in->val2);
uInstr2(cb, MOV, 4, TempReg, qs, TempReg, qd);
create_Left(cb, u_in->size, qd);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* Another form of add.
@ -628,7 +628,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
*/
case LEA2: {
Int shift;
vg_assert(u_in->size == 4 && !VG_(anyFlagUse)(u_in));
vg_assert(u_in->size == 4 && !VG_(any_flag_use)(u_in));
switch (u_in->extra4b) {
case 1: shift = 0; break;
case 2: shift = 1; break;
@ -646,7 +646,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
}
create_UifU(cb, 4, qs, qd);
create_Left(cb, u_in->size, qd);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
}
@ -656,7 +656,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
create_Left(cb, u_in->size, qd);
if (u_in->flags_w != FlagsEmpty)
create_PUTVF(cb, u_in->size, qd);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* This is a HACK (approximation :-) */
@ -691,7 +691,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
create_UifU(cb, 0, qs, qd);
create_PUTVF(cb, 0, qd);
create_PCast(cb, 0, u_in->size, qd);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* for OP in shl shr sar rol ror
@ -741,7 +741,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
uInstr2(cb, MOV, 4, TempReg, qs, TempReg, qt);
create_PCast(cb, 1, u_in->size, qt);
create_UifU(cb, u_in->size, qt, qd);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
}
@ -750,20 +750,20 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
vg_assert(u_in->tag1 == TempReg);
create_Widen(cb, u_in->signed_widen, u_in->extra4b, u_in->size,
SHADOW(u_in->val1));
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* not#(x) = x (since bitwise independent) */
case NOT:
vg_assert(u_in->tag1 == TempReg);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* neg#(x) = left(x) (derivable from case for SUB) */
case NEG:
vg_assert(u_in->tag1 == TempReg);
create_Left(cb, u_in->size, SHADOW(u_in->val1));
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* bswap#(x) = bswap(x) */
@ -772,7 +772,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
vg_assert(u_in->size == 4);
qd = SHADOW(u_in->val1);
uInstr1(cb, BSWAP, 4, TempReg, qd);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* cc2val#(qd) = pcast-0-to-size(eflags#) */
@ -781,7 +781,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
vg_assert(u_in->flags_r != FlagsEmpty);
qt = create_GETVF(cb, u_in->size);
uInstr2(cb, MOV, 4, TempReg, qt, TempReg, SHADOW(u_in->val1));
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* cmov#(qs,qd) = cmov(qs,qd)
@ -807,7 +807,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
LAST_UINSTR(cb).cond = u_in->cond;
LAST_UINSTR(cb).flags_r = u_in->flags_r;
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* add#/sub#(qs,qd)
@ -833,7 +833,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
if (u_in->flags_w != FlagsEmpty) {
create_PUTVF(cb, u_in->size, qd);
}
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* xor#(qs,qd) = qs `UifU` qd */
@ -844,7 +844,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
if (u_in->flags_w != FlagsEmpty) {
create_PUTVF(cb, u_in->size, qd);
}
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* and#/or#(qs,qd)
@ -888,7 +888,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
if (u_in->flags_w != FlagsEmpty) {
create_PUTVF(cb, u_in->size, qd);
}
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* Machinery to do with supporting CALLM. Copy the start and
@ -896,7 +896,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
(debug); they generate no code and have no effect.
*/
case CALLM_S: case CALLM_E:
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* Copy PUSH and POP verbatim. Arg/result absval
@ -905,7 +905,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
needs to be copied.
*/
case PUSH: case POP: case CLEAR:
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* In short:
@ -974,7 +974,7 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
... */
uInstr1(cb, SETV, 0, TempReg, qt);
}
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
}
/* Whew ... */
@ -994,13 +994,13 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
... */
uInstr1(cb, SETV, 0, TempReg, qt);
}
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
case JIFZ:
uInstr1(cb, TESTV, 4, TempReg, SHADOW(u_in->val1));
uInstr1(cb, SETV, 4, TempReg, SHADOW(u_in->val1));
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
/* Emit a check on the address used. The value loaded into the
@ -1021,24 +1021,24 @@ static UCodeBlock* memcheck_instrument ( UCodeBlock* cb_in )
: (Addr) & SK_(fpu_write_check),
2, 2, False);
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
}
/* For FPU insns not referencing memory, just copy thru. */
case FPU:
VG_(copyUInstr)(cb, u_in);
VG_(copy_UInstr)(cb, u_in);
break;
default:
VG_(ppUInstr)(0, u_in);
VG_(pp_UInstr)(0, u_in);
VG_(panic)( "memcheck_instrument: unhandled case");
} /* end of switch (u_in->opcode) */
} /* end of for loop */
VG_(freeCodeBlock)(cb_in);
VG_(free_UCodeBlock)(cb_in);
return cb;
}
@ -1056,10 +1056,10 @@ Bool VG_(clo_memcheck_codegen) = False;
#define VGC_VALUE ((UChar)101)
#define NOP_no_msg(uu) \
do { VG_(newNOP)(uu); } while (False)
do { VG_(new_NOP)(uu); } while (False)
#define NOP_tag1_op(uu) \
do { VG_(newNOP)(uu); \
do { VG_(new_NOP)(uu); \
if (dis) \
VG_(printf)(" at %2d: delete %s due to defd arg\n", \
i, nameOfTagOp(u->val3)); \
@ -1106,7 +1106,7 @@ static void vg_delete_redundant_SETVs ( UCodeBlock* cb )
if (u->opcode == GETV && VGC_IS_SHADOW(u->val2)
&& next_is_write[u->val2]
&& !SK_(clo_check_addrVs)) {
VG_(newNOP)(u);
VG_(new_NOP)(u);
if (dis)
VG_(printf)(" at %2d: delete GETV\n", i);
} else
@ -1114,7 +1114,7 @@ static void vg_delete_redundant_SETVs ( UCodeBlock* cb )
if (u->opcode == TAG1 && VGC_IS_SHADOW(u->val1)
&& next_is_write[u->val1]
&& !SK_(clo_check_addrVs)) {
VG_(newNOP)(u);
VG_(new_NOP)(u);
if (dis)
VG_(printf)(" at %2d: delete TAG1\n", i);
} else
@ -1122,7 +1122,7 @@ static void vg_delete_redundant_SETVs ( UCodeBlock* cb )
if (u->opcode == TAG2 && VGC_IS_SHADOW(u->val2)
&& next_is_write[u->val2]
&& !SK_(clo_check_addrVs)) {
VG_(newNOP)(u);
VG_(new_NOP)(u);
if (dis)
VG_(printf)(" at %2d: delete TAG2\n", i);
} else
@ -1134,7 +1134,7 @@ static void vg_delete_redundant_SETVs ( UCodeBlock* cb )
&& next_is_write[u->val2]) {
/* This MOV is pointless because the target is dead at this
point. Delete it. */
VG_(newNOP)(u);
VG_(new_NOP)(u);
if (dis)
VG_(printf)(" at %2d: delete MOV\n", i);
} else
@ -1144,7 +1144,7 @@ static void vg_delete_redundant_SETVs ( UCodeBlock* cb )
vg_assert(VGC_IS_SHADOW(u->val1));
if (next_is_write[u->val1]) {
/* This write is pointless, so annul it. */
VG_(newNOP)(u);
VG_(new_NOP)(u);
if (dis)
VG_(printf)(" at %2d: delete SETV\n", i);
} else {
@ -1157,7 +1157,7 @@ static void vg_delete_redundant_SETVs ( UCodeBlock* cb )
} else {
/* Find out what this insn does to the temps. */
k = VG_(getRegUsage)(u, TempReg, &tempUse[0]);
k = VG_(get_reg_usage)(u, TempReg, &tempUse[0]);
vg_assert(k <= 3);
for (j = k-1; j >= 0; j--) {
next_is_write[ tempUse[j].num ]
@ -1172,7 +1172,7 @@ static void vg_delete_redundant_SETVs ( UCodeBlock* cb )
property. This removes a lot of redundant tag-munging code.
Unfortunately it requires intimate knowledge of how each uinstr and
tagop modifies its arguments. This duplicates knowledge of uinstr
tempreg uses embodied in VG_(getRegUsage)(), which is unfortunate.
tempreg uses embodied in VG_(get_reg_usage)(), which is unfortunate.
The supplied UCodeBlock* is modified in-place.
For each value temp, def[] should hold VGC_VALUE.
@ -1415,7 +1415,7 @@ static void vg_propagate_definedness ( UCodeBlock* cb )
unhandled:
/* We don't know how to handle this uinstr. Be safe, and
set to VGC_VALUE or VGC_UNDEF all temps written by it. */
k = VG_(getRegUsage)(u, TempReg, &tempUse[0]);
k = VG_(get_reg_usage)(u, TempReg, &tempUse[0]);
vg_assert(k <= 3);
for (j = 0; j < k; j++) {
t = tempUse[j].num;
@ -1425,7 +1425,7 @@ static void vg_propagate_definedness ( UCodeBlock* cb )
if (0&& VGC_IS_SHADOW(t) && def[t] <= 4)
VG_(printf)("ignoring def %d at %s %s\n",
def[t],
VG_(nameUOpcode)(True, u->opcode),
VG_(name_UOpcode)(True, u->opcode),
(u->opcode == TAG1 || u->opcode == TAG2)
? nameOfTagOp(u->val3)
: (Char*)"");
@ -1454,7 +1454,7 @@ UCodeBlock* SK_(instrument) ( UCodeBlock* cb, Addr not_used )
cb = memcheck_instrument ( cb );
if (SK_(clo_cleanup)) {
if (dis) {
VG_(ppUCodeBlock) ( cb, "Unimproved instrumented UCode:" );
VG_(pp_UCodeBlock) ( cb, "Unimproved instrumented UCode:" );
VG_(printf)("Instrumentation improvements:\n");
}
vg_cleanup(cb);

View File

@ -35,6 +35,11 @@
# --all: run tests in all subdirs
# --valgrind: valgrind to use. Default is one built from this source tree.
#
# The easiest way is to run all tests in valgrind/ with (assuming you installed
# in $PREFIX):
#
# $PREFIX/bin/vg_regtest --all
#
# You can specify individual files to test, or whole directories, or both.
# The stable-branch/dev-branch distinction allows slight differences in stderr
# results.