mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-04 10:21:20 +00:00
4ef4aabbd0
as requested by Greg Parker. (The ppc32/Darwin dispatch loop is different to the ppc32/Linux one, for example.) git-svn-id: svn://svn.valgrind.org/valgrind/trunk@4843
218 lines
5.6 KiB
ArmAsm
218 lines
5.6 KiB
ArmAsm
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##--------------------------------------------------------------------##
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##--- The core dispatch loop, for jumping to a code address. ---##
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##--- dispatch-amd64.S ---##
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##--------------------------------------------------------------------##
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/*
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This file is part of Valgrind, a dynamic binary instrumentation
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framework.
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Copyright (C) 2000-2005 Julian Seward
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jseward@acm.org
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307, USA.
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The GNU General Public License is contained in the file COPYING.
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*/
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#include "pub_core_basics_asm.h"
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#include "pub_core_dispatch_asm.h"
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#include "pub_core_transtab_asm.h"
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#include "libvex_guest_offsets.h" /* for OFFSET_amd64_RIP */
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/*------------------------------------------------------------*/
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/*--- The dispatch loop. ---*/
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/*------------------------------------------------------------*/
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/* signature: UWord VG_(run_innerloop) ( void* guest_state ) */
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.globl VG_(run_innerloop)
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VG_(run_innerloop):
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/* %rdi holds guest_state */
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/* ----- entry point to VG_(run_innerloop) ----- */
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pushq %rbx
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pushq %rcx
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pushq %rdx
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pushq %rsi
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pushq %rbp
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pushq %r8
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pushq %r9
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pushq %r10
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pushq %r11
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pushq %r12
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pushq %r13
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pushq %r14
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pushq %r15
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pushq %rdi
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movq VG_(dispatch_ctr)@GOTPCREL(%rip), %rsi
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pushq (%rsi)
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/* 8(%rsp) holds cached copy of guest_state */
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/* 0(%rsp) holds cached copy of VG_(dispatch_ctr) */
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/* Set up the guest state pointer */
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movq %rdi, %rbp
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/* fetch %RIP into %rax */
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movq OFFSET_amd64_RIP(%rbp), %rax
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/* set host FPU control word to the default mode expected
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by VEX-generated code. See comments in libvex.h for
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more info. */
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finit
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pushq $0x027F
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fldcw (%rsp)
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addq $8, %rsp
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/* set host SSE control word to the default mode expected
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by VEX-generated code. */
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pushq $0x1F80
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ldmxcsr (%rsp)
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addq $8, %rsp
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/* set dir flag to known value */
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cld
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/* fall into main loop */
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/* Here, %rax is the only live (real) register. The entire
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simulated state is saved in the ThreadState. */
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dispatch_boring:
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/* save the jump address in the guest state */
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movq %rax, OFFSET_amd64_RIP(%rbp)
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/* Are we out of timeslice? If yes, defer to scheduler. */
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subl $1, 0(%rsp)
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jz counter_is_zero
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/* try a fast lookup in the translation cache */
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movq %rax, %rbx
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andq $VG_TT_FAST_MASK, %rbx
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movq VG_(tt_fast)@GOTPCREL(%rip), %rcx
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movq (%rcx,%rbx,8), %rcx
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cmpq %rax, (%rcx)
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jnz fast_lookup_failed
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/* increment bb profile counter */
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movq VG_(tt_fastN)@GOTPCREL(%rip), %rdx
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movq (%rdx,%rbx,8), %rdx
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incl (%rdx)
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/* Found a match. Call tce[1], which is 8 bytes along, since
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each tce element is a 64-bit int. */
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addq $8, %rcx
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call *%rcx
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/*
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%rax holds destination (original) address.
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%rbp indicates further details of the control transfer
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requested to the address in %rax.
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If rbp is unchanged (== * 8(%rsp)), just jump next to %rax.
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Otherwise fall out, back to the scheduler, and let it
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figure out what to do next.
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*/
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cmpq 8(%rsp), %rbp
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jz dispatch_boring
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jmp dispatch_exceptional
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/* All exits from the dispatcher go through here. %rax holds
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the return value.
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*/
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run_innerloop_exit:
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/* We're leaving. Check that nobody messed with
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%mxcsr or %fpucw. We can't mess with %rax here as it
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holds the tentative return value, but any other is OK. */
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pushq $0
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fstcw (%rsp)
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cmpl $0x027F, (%rsp)
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popq %r11 /* get rid of the word without trashing %eflags */
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jnz invariant_violation
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pushq $0
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stmxcsr (%rsp)
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andl $0xFFFFFFC0, (%rsp) /* mask out status flags */
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cmpl $0x1F80, (%rsp)
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popq %r11
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jnz invariant_violation
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/* otherwise we're OK */
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jmp run_innerloop_exit_REALLY
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invariant_violation:
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movq $VG_TRC_INVARIANT_FAILED, %rax
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jmp run_innerloop_exit_REALLY
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run_innerloop_exit_REALLY:
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movq VG_(dispatch_ctr)@GOTPCREL(%rip), %rsi
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popq (%rsi)
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popq %rdi
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popq %r15
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popq %r14
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popq %r13
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popq %r12
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popq %r11
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popq %r10
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popq %r9
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popq %r8
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popq %rbp
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popq %rsi
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popq %rdx
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popq %rcx
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popq %rbx
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ret
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/* Other ways of getting out of the inner loop. Placed out-of-line to
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make it look cleaner.
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*/
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dispatch_exceptional:
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/* this is jumped to only, not fallen-through from above */
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/* save %rax in %RIP and defer to sched */
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movq 8(%rsp), %rdi
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movq %rax, OFFSET_amd64_RIP(%rdi)
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movq %rbp, %rax
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jmp run_innerloop_exit
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fast_lookup_failed:
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/* %RIP is up to date here since dispatch_boring dominates */
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addl $1, 0(%rsp)
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movq $VG_TRC_INNER_FASTMISS, %rax
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jmp run_innerloop_exit
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counter_is_zero:
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/* %RIP is up to date here since dispatch_boring dominates */
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addl $1, 0(%rsp)
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movq $VG_TRC_INNER_COUNTERZERO, %rax
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jmp run_innerloop_exit
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/* Let the linker know we don't need an executable stack */
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.section .note.GNU-stack,"",@progbits
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##--------------------------------------------------------------------##
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##--- end ---##
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##--------------------------------------------------------------------##
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