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https://github.com/Zenithsiz/ftmemsim-valgrind.git
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5f6905953b
There are two copies of the round test in none/tests/ppc32/round.c and none/tests/ppc64/round.c. The two source files should be identical. The LE functional test commit updated the round.c test for ppc64 but was missing the ppc32 round updates. The round.c test was updated to fix an issue where we were getting different outputs depending on the compiler. The output is now consistent for the compilers allowing the removal of the additional expect files for ppc32 and ppc64. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14278
154 lines
5.4 KiB
Makefile
154 lines
5.4 KiB
Makefile
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include $(top_srcdir)/Makefile.tool-tests.am
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dist_noinst_SCRIPTS = filter_stderr
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EXTRA_DIST = \
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bug129390-ppc32.stdout.exp bug129390-ppc32.stderr.exp \
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bug129390-ppc32.vgtest \
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bug139050-ppc32.stdout.exp bug139050-ppc32.stderr.exp \
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bug139050-ppc32.vgtest \
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ldstrev.stderr.exp ldstrev.stdout.exp ldstrev.vgtest \
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lsw.stderr.exp lsw.stdout.exp lsw.vgtest \
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jm-int.stderr.exp jm-int.stdout.exp jm-int.vgtest \
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jm-fp.stderr.exp jm-fp.stdout.exp jm-fp.vgtest jm-fp.stdout.exp-BE2 \
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jm-vmx.stderr.exp jm-vmx.stdout.exp jm-vmx.stdout.exp_Minus_nan \
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jm-vmx.vgtest \
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jm-misc.stderr.exp jm-misc.stdout.exp jm-misc.vgtest \
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mftocrf.stderr.exp mftocrf.stdout.exp mftocrf.vgtest \
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mcrfs.stderr.exp mcrfs.stdout.exp mcrfs.vgtest \
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round.stderr.exp round.stdout.exp round.vgtest \
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test_fx.stderr.exp test_fx.stdout.exp test_fx.stdout.exp_Minus_nan \
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test_fx.vgtest \
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test_gx.stderr.exp test_gx.stdout.exp test_gx.stdout.exp_Minus_nan \
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test_gx.vgtest \
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testVMX.stderr.exp testVMX.stdout.exp testVMX.vgtest \
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twi.stderr.exp twi.stdout.exp twi.vgtest \
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tw.stderr.exp tw.stdout.exp tw.vgtest \
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xlc_dbl_u32.stderr.exp xlc_dbl_u32.stdout.exp xlc_dbl_u32.vgtest \
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opcodes.h \
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power5+_round.stderr.exp power5+_round.stdout.exp power5+_round.vgtest \
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power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \
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test_isa_2_06_part1.stderr.exp test_isa_2_06_part1.stdout.exp test_isa_2_06_part1.vgtest \
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test_isa_2_06_part2.stderr.exp test_isa_2_06_part2.stdout.exp test_isa_2_06_part2.vgtest \
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test_isa_2_06_part3.stderr.exp test_isa_2_06_part3.stdout.exp test_isa_2_06_part3.vgtest \
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test_dfp1.stderr.exp test_dfp1.stdout.exp test_dfp1.vgtest \
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test_dfp2.stderr.exp test_dfp2.stdout.exp test_dfp2.vgtest \
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test_dfp2.stdout.exp_Without_dcffix \
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test_dfp3.stderr.exp test_dfp3.stdout.exp test_dfp3.vgtest \
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test_dfp4.stderr.exp test_dfp4.stdout.exp test_dfp4.vgtest \
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test_dfp5.stderr.exp test_dfp5.stdout.exp test_dfp5.vgtest \
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jm_vec_isa_2_07.stderr.exp jm_vec_isa_2_07.stdout.exp jm_vec_isa_2_07.vgtest \
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jm_fp_isa_2_07.stderr.exp jm_fp_isa_2_07.stdout.exp jm_fp_isa_2_07.vgtest \
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jm_int_isa_2_07.stderr.exp jm_int_isa_2_07.stdout.exp jm_int_isa_2_07.vgtest \
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test_isa_2_07_part2.stderr.exp test_isa_2_07_part2.stdout.exp test_isa_2_07_part2.vgtest \
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test_tm.stderr.exp test_tm.stdout.exp test_tm.vgtest \
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test_touch_tm.stderr.exp test_touch_tm.stdout.exp test_touch_tm.vgtest \
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ldst_multiple.stderr.exp ldst_multiple.stdout.exp ldst_multiple.vgtest \
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data-cache-instructions.stderr.exp data-cache-instructions.stdout.exp data-cache-instructions.vgtest
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check_PROGRAMS = \
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allexec \
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bug129390-ppc32 \
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bug139050-ppc32 \
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ldstrev lsw jm-insns mftocrf mcrfs round test_fx test_gx \
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testVMX twi tw xlc_dbl_u32 power5+_round power6_bcmp \
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test_isa_2_06_part1 \
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test_isa_2_06_part2 \
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test_isa_2_06_part3 \
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test_dfp1 test_dfp2 test_dfp3 test_dfp4 test_dfp5 \
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test_isa_2_07_part1 \
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test_isa_2_07_part2 \
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test_tm \
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test_touch_tm \
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ldst_multiple \
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data-cache-instructions
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AM_CFLAGS += @FLAG_M32@
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AM_CXXFLAGS += @FLAG_M32@
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AM_CCASFLAGS += @FLAG_M32@
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allexec_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_NONNULL@
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if HAS_ALTIVEC
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ALTIVEC_FLAG = -DHAS_ALTIVEC
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else
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ALTIVEC_FLAG =
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endif
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if HAS_VSX
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BUILD_FLAG_VSX = -mvsx
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VSX_FLAG = -DHAS_VSX
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else
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BUILD_FLAG_VSX =
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VSX_FLAG =
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endif
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if HAS_DFP
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BUILD_FLAGS_DFP = -mhard-dfp -mcpu=power6
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DFP_FLAG = -DHAS_DFP
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else
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BUILD_FLAGS_DFP =
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DFP_FLAG =
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endif
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if HAS_ISA_2_07
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BUILD_FLAGS_ISA_2_07 = -mhtm -mcpu=power8
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ISA_2_07_FLAG = -DHAS_ISA_2_07
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else
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BUILD_FLAGS_ISA_2_07 =
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ISA_2_07_FLAG =
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endif
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jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames -maltivec \
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@FLAG_M32@ $(ALTIVEC_FLAG)
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testVMX_CFLAGS = $(AM_CFLAGS) -O -g -Wall -maltivec -mabi=altivec -DALTIVEC \
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-DGCC_COMPILER @FLAG_M32@
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test_isa_2_06_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
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@FLAG_M32@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
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test_isa_2_06_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
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@FLAG_M32@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
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test_isa_2_06_part3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
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@FLAG_M32@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
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test_dfp1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_DFP)
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test_dfp2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_DFP)
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test_dfp3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_DFP)
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test_dfp4_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_DFP)
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test_dfp5_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_DFP)
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test_isa_2_07_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
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test_isa_2_07_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
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test_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
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test_touch_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
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test_isa_2_06_part3_LDADD = -lm
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test_dfp1_LDADD = -lm
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test_dfp2_LDADD = -lm
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test_dfp3_LDADD = -lm
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test_dfp4_LDADD = -lm
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test_dfp5_LDADD = -lm
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test_isa_2_07_part1_LDADD = -lm
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test_isa_2_07_part2_LDADD = -lm
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test_tm_LDADD = -lm
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test_touch_tm_LDADD = -lm
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