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https://github.com/Zenithsiz/ftmemsim-valgrind.git
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6107fd666c
side components. (Florian Krohm <britzel@acm.org> and Christian Borntraeger <borntraeger@de.ibm.com>). Fixes #243404. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11604
66 lines
2.0 KiB
C
66 lines
2.0 KiB
C
#include <stdio.h>
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#define DIV_REG_MEM(insn, d1_1, d1_2, d2) \
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({ \
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unsigned long tmp1 = d1_1; \
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unsigned long tmp2 = d1_2; \
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asm volatile( "lgr 2, %0\n" \
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"lgr 3, %1\n" \
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#insn " 2, %2\n" \
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"lgr %0,2\n" \
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"lgr %1,3\n" \
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: "+d" (tmp1), "+d" (tmp2) \
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: "Q" (d2) \
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: "2","3"); \
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printf(#insn " %16.16lX%16.16lX / %16.16lX = %16.16lX (rem %16.16lX)\n", d1_1, d1_2, d2, tmp2, tmp1); \
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})
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#define DIV_REG_REG(insn, d1_1, d1_2, d2) \
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({ \
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unsigned long tmp1 = d1_1; \
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unsigned long tmp2 = d1_2; \
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asm volatile( "lgr 2, %0\n" \
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"lgr 3, %1\n" \
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#insn " 2, %2\n" \
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"lgr %0,2\n" \
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"lgr %1,3\n" \
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: "+d" (tmp1), "+d" (tmp2) \
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: "d" (d2) \
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: "2","3"); \
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printf(#insn " %16.16lX%16.16lX / %16.16lX = %16.16lX (rem %16.16lX)\n", d1_1, d1_2, d2, tmp2, tmp1); \
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})
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#define memsweep(i, d2) \
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({ \
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DIV_REG_MEM(i, 0x0ul, 0ul, d2); \
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DIV_REG_MEM(i, 0x0ul, 1ul, d2); \
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DIV_REG_MEM(i, 0x0ul, 0xfffful, d2); \
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DIV_REG_MEM(i, 0x0ul, 0x7ffful, d2); \
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DIV_REG_MEM(i, 0x0ul, 0x8000ul, d2); \
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DIV_REG_MEM(i, 0x0ul, 0xfffffffful, d2); \
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DIV_REG_MEM(i, 0x0ul, 0x80000000ul, d2); \
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DIV_REG_MEM(i, 0x0ul, 0x7ffffffful, d2); \
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DIV_REG_MEM(i, 0x0ul, 0xfffffffffffffffful, d2); \
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DIV_REG_MEM(i, 0x0ul, 0x8000000000000000ul, d2); \
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DIV_REG_MEM(i, 0x0ul, 0x7ffffffffffffffful, d2); \
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DIV_REG_MEM(i, 0x1ul, 0xaffffffful, d2); \
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})
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#define regsweep(i, d2) \
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({ \
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DIV_REG_REG(i, 0x0ul, 0ul, d2); \
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DIV_REG_REG(i, 0x0ul, 1ul, d2); \
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DIV_REG_REG(i, 0x0ul, 0xfffful, d2); \
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DIV_REG_REG(i, 0x0ul, 0x7ffful, d2); \
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DIV_REG_REG(i, 0x0ul, 0x8000ul, d2); \
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DIV_REG_REG(i, 0x0ul, 0xfffffffful, d2); \
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DIV_REG_REG(i, 0x0ul, 0x80000000ul, d2); \
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DIV_REG_REG(i, 0x0ul, 0x7ffffffful, d2); \
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DIV_REG_REG(i, 0x0ul, 0xfffffffffffffffful, d2); \
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DIV_REG_REG(i, 0x0ul, 0x8000000000000000ul, d2); \
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DIV_REG_REG(i, 0x0ul, 0x7ffffffffffffffful, d2); \
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DIV_REG_REG(i, 0x1ul, 0xaffffffful, d2); \
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})
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