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https://github.com/Zenithsiz/ftmemsim-valgrind.git
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Patch by Philippe Waroquiers, slightly changed. This actually was a regression from 3.6.1, but the patch also improves on printed messages, and refactors common code between cachegrind and callgrind. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12013
209 lines
6.8 KiB
C
209 lines
6.8 KiB
C
/*--------------------------------------------------------------------*/
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/*--- Cachegrind: cache configuration. ---*/
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/*--- The architecture specific void VG_(configure_caches) are ---*/
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/*--- located in the cg-<architecture>.c files. ---*/
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/*--- cg-arch.c ---*/
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/*--------------------------------------------------------------------*/
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/*
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This file is part of Cachegrind, a Valgrind tool for cache
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profiling programs.
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Copyright (C) 2011-2011 Nicholas Nethercote
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njn@valgrind.org
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307, USA.
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The GNU General Public License is contained in the file COPYING.
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*/
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#include "pub_tool_basics.h"
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#include "pub_tool_libcassert.h"
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#include "pub_tool_libcbase.h"
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#include "pub_tool_libcprint.h"
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#include "pub_tool_options.h"
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#include "cg_arch.h"
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// Checks cache config is ok. Returns NULL if ok, or a pointer to an error
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// string otherwise.
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static Char* check_cache(cache_t* cache)
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{
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// Simulator requires set count to be a power of two.
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if ((cache->size % (cache->line_size * cache->assoc) != 0) ||
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(-1 == VG_(log2)(cache->size/cache->line_size/cache->assoc)))
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{
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return "Cache set count is not a power of two.\n";
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}
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// Simulator requires line size to be a power of two.
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if (-1 == VG_(log2)(cache->line_size)) {
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return "Cache line size is not a power of two.\n";
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}
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// Then check line size >= 16 -- any smaller and a single instruction could
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// straddle three cache lines, which breaks a simulation assertion and is
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// stupid anyway.
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if (cache->line_size < MIN_LINE_SIZE) {
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return "Cache line size is too small.\n";
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}
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/* Then check cache size > line size (causes seg faults if not). */
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if (cache->size <= cache->line_size) {
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return "Cache size <= line size.\n";
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}
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/* Then check assoc <= (size / line size) (seg faults otherwise). */
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if (cache->assoc > (cache->size / cache->line_size)) {
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return "Cache associativity > (size / line size).\n";
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}
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return NULL;
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}
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static void parse_cache_opt ( cache_t* cache, Char* opt, Char* optval )
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{
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Long i1, i2, i3;
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Char* endptr;
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Char* checkRes;
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// Option argument looks like "65536,2,64". Extract them.
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i1 = VG_(strtoll10)(optval, &endptr); if (*endptr != ',') goto bad;
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i2 = VG_(strtoll10)(endptr+1, &endptr); if (*endptr != ',') goto bad;
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i3 = VG_(strtoll10)(endptr+1, &endptr); if (*endptr != '\0') goto bad;
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// Check for overflow.
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cache->size = (Int)i1;
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cache->assoc = (Int)i2;
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cache->line_size = (Int)i3;
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if (cache->size != i1) goto overflow;
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if (cache->assoc != i2) goto overflow;
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if (cache->line_size != i3) goto overflow;
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checkRes = check_cache(cache);
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if (checkRes) {
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VG_(fmsg)("%s", checkRes);
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goto bad;
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}
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return;
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bad:
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VG_(fmsg_bad_option)(opt, "");
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overflow:
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VG_(fmsg_bad_option)(opt,
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"One of the cache parameters was too large and overflowed.\n");
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}
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Bool VG_(str_clo_cache_opt)(Char *arg,
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cache_t* clo_I1c,
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cache_t* clo_D1c,
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cache_t* clo_LLc)
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{
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Char* tmp_str;
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if VG_STR_CLO(arg, "--I1", tmp_str) {
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parse_cache_opt(clo_I1c, arg, tmp_str);
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return True;
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} else if VG_STR_CLO(arg, "--D1", tmp_str) {
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parse_cache_opt(clo_D1c, arg, tmp_str);
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return True;
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} else if (VG_STR_CLO(arg, "--L2", tmp_str) || // for backwards compatibility
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VG_STR_CLO(arg, "--LL", tmp_str)) {
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parse_cache_opt(clo_LLc, arg, tmp_str);
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return True;
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} else
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return False;
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}
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static void umsg_cache_img(Char* desc, cache_t* c)
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{
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VG_(umsg)(" %s: %'d B, %d-way, %d B lines\n", desc,
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c->size, c->assoc, c->line_size);
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}
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// Verifies if c is a valid cache.
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// An invalid value causes an assert, unless clo_redefined is True.
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static void check_cache_or_override(Char* desc, cache_t* c, Bool clo_redefined)
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{
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Char* checkRes;
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checkRes = check_cache(c);
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if (checkRes) {
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VG_(umsg)("Auto-detected %s cache configuration not supported: %s",
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desc, checkRes);
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umsg_cache_img(desc, c);
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if (!clo_redefined) {
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VG_(umsg)("As it probably should be supported, please report a bug!\n");
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VG_(umsg)("Bypass this message by using option --%s=...\n", desc);
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tl_assert(0);
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}
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}
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}
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void VG_(post_clo_init_configure_caches)(cache_t* I1c,
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cache_t* D1c,
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cache_t* LLc,
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cache_t* clo_I1c,
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cache_t* clo_D1c,
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cache_t* clo_LLc)
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{
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#define DEFINED(L) (-1 != L->size || -1 != L->assoc || -1 != L->line_size)
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// Count how many were defined on the command line.
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Bool all_caches_clo_defined =
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(DEFINED(clo_I1c) &&
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DEFINED(clo_D1c) &&
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DEFINED(clo_LLc));
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// Set the cache config (using auto-detection, if supported by the
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// architecture).
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VG_(configure_caches)( I1c, D1c, LLc, all_caches_clo_defined );
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// Check the default/auto-detected values.
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// Allow the user to override invalid auto-detected caches
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// with command line.
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check_cache_or_override ("I1", I1c, DEFINED(clo_I1c));
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check_cache_or_override ("D1", D1c, DEFINED(clo_D1c));
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check_cache_or_override ("LL", LLc, DEFINED(clo_LLc));
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// Then replace with any defined on the command line. (Already checked in
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// VG(parse_clo_cache_opt)().)
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if (DEFINED(clo_I1c)) { *I1c = *clo_I1c; }
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if (DEFINED(clo_D1c)) { *D1c = *clo_D1c; }
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if (DEFINED(clo_LLc)) { *LLc = *clo_LLc; }
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if (VG_(clo_verbosity) >= 2) {
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VG_(umsg)("Cache configuration used:\n");
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umsg_cache_img ("I1", I1c);
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umsg_cache_img ("D1", D1c);
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umsg_cache_img ("LL", LLc);
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}
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#undef DEFINED
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}
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void VG_(print_cache_clo_opts)()
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{
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VG_(printf)(
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" --I1=<size>,<assoc>,<line_size> set I1 cache manually\n"
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" --D1=<size>,<assoc>,<line_size> set D1 cache manually\n"
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" --LL=<size>,<assoc>,<line_size> set LL cache manually\n"
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);
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}
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