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https://github.com/Zenithsiz/ftmemsim-valgrind.git
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3d1369a6e0
Tests for 64bit FPU instructions on MIPS32 platforms. Some mips instructions can cause SIGILL (Illegal instruction), so we need to add SIGILL signal and a proper handler for that signal. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13817
280 lines
9.0 KiB
C
280 lines
9.0 KiB
C
#include <stdio.h>
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typedef enum {
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CEILWS=0, CEILWD,
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FLOORWS, FLOORWD,
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ROUNDWS, ROUNDWD,
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TRUNCWS, TRUNCWD
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} flt_dir_op_t;
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typedef enum {
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CVTDS, CVTDW,
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CVTSD, CVTSW,
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CVTWS, CVTWD
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} flt_round_op_t;
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typedef enum {
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TO_NEAREST=0, TO_ZERO, TO_PLUS_INFINITY, TO_MINUS_INFINITY } round_mode_t;
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char *round_mode_name[] = { "near", "zero", "+inf", "-inf" };
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const char *flt_dir_op_names[] = {
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"ceil.w.s", "ceil.w.d",
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"floor.w.s", "floor.w.d",
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"round.w.s", "round.w.d",
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"trunc.w.s", "trunc.w.d"
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};
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const char *flt_round_op_names[] = {
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"cvt.d.s", "cvt.d.w",
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"cvt.s.d", "cvt.s.w",
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"cvt.w.s", "cvt.w.d"
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};
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const double fs_d[] = {
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0, 456.25, 3, -1,
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1384.5, -7.25, 1000000000, -5786.25,
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1752, 0.015625, 0.03125, -248562.75,
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-45786.5, 456, 34.03125, 45786.75,
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1752065, 107, -45667.25, -7,
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-347856.5, 356047, -1.25, 23.0625
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};
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const float fs_f[] = {
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0, 456.25, 3, -1,
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1384.5, -7.25, 1000000000, -5786.25,
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1752, 0.015625, 0.03125, -248562.75,
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-45786.5, 456, 34.03125, 45786.75,
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1752065, 107, -45667.25, -7,
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-347856.5, 356047, -1.25, 23.0625
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};
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const int fs_w[] = {
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0, 456, 3, -1,
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0xffffffff, 356, 1000000000, -5786,
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1752, 24575, 10, -248562,
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-45786, 456, 34, 45786,
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1752065, 107, -45667, -7,
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-347856, 0x80000000, 0xFFFFFFF, 23
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};
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#define BINOP(op) \
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__asm__ volatile(op" %1, %2, %3" "\n\t" \
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"cfc1 %0, $31" "\n\t" \
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: "=r" (fcsr), "=f"(fd) \
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: "f"(f) , "f"(fB));
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#define UNOPdd(op) \
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fd_d = 0; \
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__asm__ volatile(op" %1, %2" "\n\t" \
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"cfc1 %0, $31" "\n\t" \
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: "=r" (fcsr), "=f"(fd_d) \
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: "f"(fs_d[i]));
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#define UNOPff(op) \
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fd_f = 0; \
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__asm__ volatile(op" %1, %2" "\n\t" \
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"cfc1 %0, $31" "\n\t" \
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: "=r" (fcsr), "=f"(fd_f) \
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: "f"(fs_f[i]));
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#define UNOPfd(op) \
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fd_d = 0; \
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__asm__ volatile(op" %1, %2" "\n\t" \
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"cfc1 %0, $31" "\n\t" \
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: "=r" (fcsr), "=f"(fd_d) \
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: "f"(fs_f[i]));
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#define UNOPdf(op) \
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fd_f = 0; \
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__asm__ volatile(op" %1, %2" "\n\t" \
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"cfc1 %0, $31" "\n\t" \
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: "=r" (fcsr), "=f"(fd_f) \
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: "f"(fs_d[i]));
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#define UNOPfw(op) \
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fd_w = 0; \
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__asm__ volatile(op" $f0, %2" "\n\t" \
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"mfc1 %1, $f0" "\n\t" \
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"cfc1 %0, $31" "\n\t" \
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: "=r" (fcsr), "=r"(fd_w) \
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: "f"(fs_f[i]) \
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: "$f0");
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#define UNOPdw(op) \
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fd_w = 0; \
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__asm__ volatile(op" $f0, %2" "\n\t" \
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"mfc1 %1, $f0" "\n\t" \
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"cfc1 %0, $31" "\n\t" \
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: "=r" (fcsr), "=r"(fd_w) \
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: "f"(fs_d[i]) \
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: "$f0");
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#define UNOPwd(op) \
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fd_d = 0; \
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__asm__ volatile("mtc1 %2, $f0" "\n\t" \
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op" %1, $f0" "\n\t" \
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"cfc1 %0, $31" "\n\t" \
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: "=r" (fcsr), "=f"(fd_d) \
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: "r"(fs_w[i]) \
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: "$f0", "$f1");
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#define UNOPwf(op) \
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fd_f = 0; \
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__asm__ volatile("mtc1 %2, $f0" "\n\t" \
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op" %1, $f0" "\n\t" \
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"cfc1 %0, $31" "\n\t" \
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: "=r" (fcsr), "=f"(fd_f) \
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: "r"(fs_w[i]) \
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: "$f0");
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void set_rounding_mode(round_mode_t mode)
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{
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switch(mode) {
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case TO_NEAREST:
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__asm__ volatile("ctc1 $zero, $31" "\n\t");
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break;
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case TO_ZERO:
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__asm__ volatile("li $t0, 0x1" "\n\t"
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"ctc1 $t0, $31" "\n\t");
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break;
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case TO_PLUS_INFINITY:
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__asm__ volatile("li $t0, 0x2" "\n\t"
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"ctc1 $t0, $31" "\n\t");
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break;
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case TO_MINUS_INFINITY:
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__asm__ volatile("li $t0, 0x3" "\n\t"
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"ctc1 $t0, $31" "\n\t");
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break;
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}
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}
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int directedRoundingMode(flt_dir_op_t op) {
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int fd_w = 0;
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int i;
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int fcsr = 0;
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round_mode_t rm = TO_NEAREST;
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for (i = 0; i < 24; i++) {
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set_rounding_mode(rm);
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switch(op) {
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case CEILWS:
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UNOPfw("ceil.w.s");
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printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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case CEILWD:
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UNOPdw("ceil.w.d");
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printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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case FLOORWS:
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UNOPfw("floor.w.s");
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printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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case FLOORWD:
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UNOPdw("floor.w.d");
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printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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case ROUNDWS:
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UNOPfw("round.w.s");
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printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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case ROUNDWD:
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UNOPdw("round.w.d");
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printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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case TRUNCWS:
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UNOPfw("trunc.w.s");
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printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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case TRUNCWD:
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UNOPdw("trunc.w.d");
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printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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default:
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printf("error\n");
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break;
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}
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}
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return 0;
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}
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int FCSRRoundingMode(flt_round_op_t op1)
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{
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double fd_d = 0;
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float fd_f = 0;
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int fd_w = 0;
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int i;
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int fcsr = 0;
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round_mode_t rm;
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for (rm = TO_NEAREST; rm <= TO_MINUS_INFINITY; rm ++) {
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set_rounding_mode(rm);
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printf("roundig mode: %s\n", round_mode_name[rm]);
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for (i = 0; i < 24; i++) {
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set_rounding_mode(rm);
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switch(op1) {
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case CVTDS:
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UNOPfd("cvt.d.s");
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printf("%s %lf %lf\n", flt_round_op_names[op1], fd_d, fs_f[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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case CVTDW:
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UNOPwd("cvt.d.w");
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printf("%s %lf %d\n", flt_round_op_names[op1], fd_d, fs_w[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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case CVTSD:
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UNOPdf("cvt.s.d");
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printf("%s %f %lf\n", flt_round_op_names[op1], fd_f, fs_d[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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case CVTSW:
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UNOPwf("cvt.s.w");
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printf("%s %f %d\n", flt_round_op_names[op1], fd_f, fs_w[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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case CVTWS:
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UNOPfw("cvt.w.s");
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printf("%s %d %f\n", flt_round_op_names[op1], fd_w, fs_f[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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case CVTWD:
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UNOPdw("cvt.w.d");
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printf("%s %d %lf\n", flt_round_op_names[op1], fd_w, fs_d[i]);
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printf("fcsr: 0x%x\n", fcsr);
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break;
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default:
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printf("error\n");
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break;
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}
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}
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}
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return 0;
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}
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int main()
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{
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flt_dir_op_t op;
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flt_round_op_t op1;
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printf("-------------------------- %s --------------------------\n",
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"test FPU Conversion Operations Using a Directed Rounding Mode");
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for (op = CEILWS; op <= TRUNCWD; op++) {
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directedRoundingMode(op);
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}
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printf("-------------------------- %s --------------------------\n",
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"test FPU Conversion Operations Using the FCSR Rounding Mode");
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for (op1 = CVTDS; op1 <= CVTWD; op1++) {
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FCSRRoundingMode(op1);
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}
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return 0;
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}
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