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https://github.com/Zenithsiz/ftmemsim-valgrind.git
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ed74dc8a27
Force "hardfloat" mode for inline assembly that uses FPU instructions, but pop original mode at the end of the assembly. Unhandled FPU instructions will be handled by the signal handler (env_unsup_insn). Skip MIPS specific tests for FPU if the code gets compiled for soft- float. This should allow Valgrind to be compiled as a soft-float binary, but that executable should be used for soft-float systems only. Related VEX change - r3261. Related issue - BZ#351282. Patch by Aleksandar Rikalo. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16039
33 lines
1.1 KiB
C
33 lines
1.1 KiB
C
#if defined(__mips_hard_float)
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#include <stdio.h>
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int main ()
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{
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int out [] = {0, 0};
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unsigned long long in [] = {0x405EE0A3D70A3D71ULL, 0x3FF0000000000000ULL};
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__asm__ volatile("cfc1 $a1, $31" "\n\t"
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"ldc1 $f0, 0(%0)" "\n\t"
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"ctc1 $zero, $31" "\n\t"
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"round.w.d $f0, $f0" "\n\t"
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"cfc1 $a2, $31" "\n\t"
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"sw $a2, 0(%1)" "\n\t"
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"ldc1 $f0, 8(%0)" "\n\t"
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"ctc1 $zero, $31" "\n\t"
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"round.w.d $f0, $f0" "\n\t"
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"cfc1 $a2, $31" "\n\t"
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"sw $a2, 4(%1)" "\n\t"
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"ctc1 $a1, $31" "\n\t"
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:
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: "r" (in), "r" (out)
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: "a1", "a2", "t0", "$f0", "$f1"
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);
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printf("FCSR::1: 0x%x, 2: 0x%x\n", out[0], out[1]);
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return 0;
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}
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#else
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int main() {
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return 0;
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}
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#endif
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