mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-10 05:37:06 +00:00
9ba2c09188
code from cpuid.S to be pulled in so that tools can use it. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@3505
240 lines
7.6 KiB
C
240 lines
7.6 KiB
C
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/*--------------------------------------------------------------------*/
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/*--- Arch-specific registers, etc. amd64/state.c ---*/
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/*--------------------------------------------------------------------*/
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/*
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This file is part of Valgrind, a dynamic binary instrumentation
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framework.
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Copyright (C) 2000-2005 Nicholas Nethercote
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njn25@cam.ac.uk
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307, USA.
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The GNU General Public License is contained in the file COPYING.
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*/
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#include "core.h"
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#include "amd64_private.h"
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#include <sys/ptrace.h>
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#include "libvex_guest_amd64.h"
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/*------------------------------------------------------------*/
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/*--- Determining arch/subarch. ---*/
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/*------------------------------------------------------------*/
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// Returns the architecture and subarchitecture, or indicates
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// that this subarchitecture is unable to run Valgrind
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// Returns False to indicate we cannot proceed further.
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Bool VGA_(getArchAndSubArch)( /*OUT*/VexArch* vex_arch,
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/*OUT*/VexSubArch* vex_subarch )
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{
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vg_assert(VG_(has_cpuid)());
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*vex_arch = VexArchAMD64;
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*vex_subarch = VexSubArch_NONE;
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return True;
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}
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/*------------------------------------------------------------*/
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/*--- Initialising the first thread ---*/
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/*------------------------------------------------------------*/
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/* Given a pointer to the ThreadArchState for thread 1 (the root
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thread), initialise the VEX guest state, and copy in essential
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starting values.
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*/
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void VGA_(init_thread1state) ( Addr client_rip,
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Addr rsp_at_startup,
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/*MOD*/ ThreadArchState* arch )
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{
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vg_assert(0 == sizeof(VexGuestAMD64State) % 8);
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/* Zero out the initial state, and set up the simulated FPU in a
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sane way. */
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LibVEX_GuestAMD64_initialise(&arch->vex);
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/* Zero out the shadow area. */
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VG_(memset)(&arch->vex_shadow, 0, sizeof(VexGuestAMD64State));
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/* Put essential stuff into the new state. */
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if (0)
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VG_(printf)("startup rsp 0x%llx rip 0x%llx\n",
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rsp_at_startup, client_rip);
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arch->vex.guest_RSP = rsp_at_startup;
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arch->vex.guest_RIP = client_rip;
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}
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/*------------------------------------------------------------*/
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/*--- Thread stuff ---*/
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/*------------------------------------------------------------*/
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void VGA_(cleanup_thread) ( ThreadArchState *arch )
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{
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/* TODO: deallocate the thread's LDT / GDT ? */
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}
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void VGA_(setup_child) ( /*OUT*/ ThreadArchState *child,
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/*IN*/ ThreadArchState *parent )
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{
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/* We inherit our parent's guest state. */
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child->vex = parent->vex;
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child->vex_shadow = parent->vex_shadow;
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#if 0
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/* TODO: inherit the thread's LDT / GDT ? */
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/* We inherit our parent's LDT. */
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if (parent->vex.guest_LDT == (HWord)NULL) {
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/* We hope this is the common case. */
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child->vex.guest_LDT = (HWord)NULL;
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} else {
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/* No luck .. we have to take a copy of the parent's. */
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child->vex.guest_LDT = (HWord)VG_(alloc_zeroed_x86_LDT)();
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copy_LDT_from_to( (VexGuestX86SegDescr*)parent->vex.guest_LDT,
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(VexGuestX86SegDescr*)child->vex.guest_LDT );
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}
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/* We need an empty GDT. */
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child->vex.guest_GDT = (HWord)NULL;
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#endif
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}
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void VGA_(mark_from_registers)(ThreadId tid, void (*marker)(Addr))
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{
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ThreadState *tst = VG_(get_ThreadState)(tid);
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ThreadArchState *arch = &tst->arch;
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/* XXX ask tool about validity? */
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(*marker)(arch->vex.guest_RAX);
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(*marker)(arch->vex.guest_RCX);
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(*marker)(arch->vex.guest_RDX);
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(*marker)(arch->vex.guest_RBX);
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(*marker)(arch->vex.guest_RSI);
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(*marker)(arch->vex.guest_RDI);
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(*marker)(arch->vex.guest_RSP);
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(*marker)(arch->vex.guest_RBP);
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(*marker)(arch->vex.guest_R8);
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(*marker)(arch->vex.guest_R9);
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(*marker)(arch->vex.guest_R10);
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(*marker)(arch->vex.guest_R11);
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(*marker)(arch->vex.guest_R12);
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(*marker)(arch->vex.guest_R13);
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(*marker)(arch->vex.guest_R14);
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(*marker)(arch->vex.guest_R15);
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}
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/*------------------------------------------------------------*/
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/*--- Symtab stuff ---*/
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/*------------------------------------------------------------*/
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#if 0
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/* This is the Intel register encoding -- integer regs. */
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#define R_EAX 0
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#define R_ECX 1
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#define R_EDX 2
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#define R_EBX 3
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#define R_ESP 4
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#define R_EBP 5
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#define R_ESI 6
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#define R_EDI 7
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#define R_E8 8
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#define R_E9 9
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#define R_E10 10
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#define R_E11 11
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#define R_E12 12
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#define R_E13 13
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#define R_E14 14
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#define R_E15 15
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#endif
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UInt *VGA_(reg_addr_from_tst)(Int regno, ThreadArchState *arch)
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{
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I_die_here;
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#if 0
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switch (regno) {
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case R_RAX: return &arch->vex.guest_RAX;
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case R_RCX: return &arch->vex.guest_RCX;
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case R_RDX: return &arch->vex.guest_RDX;
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case R_RBX: return &arch->vex.guest_RBX;
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case R_RSP: return &arch->vex.guest_RSP;
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case R_RBP: return &arch->vex.guest_RBP;
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case R_RSI: return &arch->vex.guest_RSI;
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case R_RDI: return &arch->vex.guest_RDI;
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case R_R8 : return &arch->vex.guest_R8 ;
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case R_R9 : return &arch->vex.guest_R9 ;
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case R_R10: return &arch->vex.guest_R10;
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case R_R11: return &arch->vex.guest_R11;
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case R_R12: return &arch->vex.guest_R12;
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case R_R13: return &arch->vex.guest_R13;
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case R_R14: return &arch->vex.guest_R14;
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case R_R15: return &arch->vex.guest_R15;
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default: return NULL;
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}
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#endif
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}
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/*------------------------------------------------------------*/
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/*--- pointercheck ---*/
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/*------------------------------------------------------------*/
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Bool VGA_(setup_pointercheck)(void)
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{
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if (0)
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VG_(message)(Vg_DebugMsg, "ignoring --pointercheck (unimplemented)");
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return True;
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}
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/*------------------------------------------------------------*/
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/*--- Debugger-related operations ---*/
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/*------------------------------------------------------------*/
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Int VGA_(ptrace_setregs_from_tst)(Int pid, ThreadArchState* arch)
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{
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I_die_here;
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#if 0
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struct vki_user_regs_struct regs;
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regs.cs = arch->vex.guest_CS;
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regs.ss = arch->vex.guest_SS;
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regs.ds = arch->vex.guest_DS;
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regs.es = arch->vex.guest_ES;
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regs.fs = arch->vex.guest_FS;
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regs.gs = arch->vex.guest_GS;
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regs.eax = arch->vex.guest_EAX;
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regs.ebx = arch->vex.guest_EBX;
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regs.ecx = arch->vex.guest_ECX;
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regs.edx = arch->vex.guest_EDX;
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regs.esi = arch->vex.guest_ESI;
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regs.edi = arch->vex.guest_EDI;
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regs.ebp = arch->vex.guest_EBP;
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regs.esp = arch->vex.guest_ESP;
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regs.eflags = LibVEX_GuestX86_get_eflags(&arch->vex);
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regs.eip = arch->vex.guest_EIP;
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return ptrace(PTRACE_SETREGS, pid, NULL, ®s);
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#endif
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}
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/*--------------------------------------------------------------------*/
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/*--- end ---*/
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/*--------------------------------------------------------------------*/
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