mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-12 06:11:37 +00:00
c523185b76
rev 12001 has introduced a regression in VG_(env_remove_valgrind_env_stuff): to avoid modifying a possibly read-only env string, the string is duplicated, and the copy is modified. However, mash_env_column modifies the string "in-place". The modified string was not put back in the env (and could not, because the src string is only partially copied). This means that the valgrind preload strings were not cleaned up and when a 32 bit executable execs a 64 bits (or vice versa: 64 bit execs 32 bits), LD_PRELOAD contains both the 32 bits and 64 bits versions of Valgrind vgpreload.... => ld.so then gives an error msg, as it can't preload either the 32 or the 64 bits version. The patch fixes this by duplicating the whole env string, and passing to mash_colon_env a pointer to the correct offset in the whole env string. The duplicated string is replacing the original entry in envp. This patch adds two regression tests : none/tests/allexec32 and none/tests/allexec64. On a bi-arch valgrind, these will be 32bits and 64 bits executables, exec-ing each other. On a single arch, one will be a symlink to the other (to avoid different .exp files, and still test exec). git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12287
141 lines
4.2 KiB
Makefile
141 lines
4.2 KiB
Makefile
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include $(top_srcdir)/Makefile.tool-tests.am
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dist_noinst_SCRIPTS = filter_cpuid filter_stderr gen_insn_test.pl
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CLEANFILES = $(addsuffix .c,$(INSN_TESTS))
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INSN_TESTS = insn_basic insn_mmx insn_sse insn_sse2 insn_fpu
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if BUILD_SSE3_TESTS
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INSN_TESTS += insn_sse3
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endif
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if BUILD_SSSE3_TESTS
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INSN_TESTS += insn_ssse3
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endif
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if BUILD_PCLMULQDQ_TESTS
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INSN_TESTS += insn_pclmulqdq
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endif
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# Explicitly include insn_sse3 even if ! BUILD_SSE3_TESTS,
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# to avoid packaging screwups if 'make dist' is run on a machine
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# which failed the BUILD_SSE3_TESTS test in configure.in.
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EXTRA_DIST = \
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amd64locked.vgtest amd64locked.stdout.exp amd64locked.stderr.exp \
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asorep.stderr.exp asorep.stdout.exp asorep.vgtest \
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bug127521-64.vgtest bug127521-64.stdout.exp bug127521-64.stderr.exp \
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bug132813-amd64.vgtest bug132813-amd64.stdout.exp \
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bug132813-amd64.stderr.exp \
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bug137714-amd64.vgtest bug137714-amd64.stdout.exp \
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bug137714-amd64.stderr.exp \
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bug132918.vgtest bug132918.stderr.exp bug132918.stdout.exp \
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bug132918.stdout.exp-older-glibc \
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bug156404-amd64.vgtest bug156404-amd64.stdout.exp \
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bug156404-amd64.stderr.exp \
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clc.vgtest clc.stdout.exp clc.stderr.exp \
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crc32.vgtest crc32.stdout.exp crc32.stderr.exp \
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cmpxchg.vgtest cmpxchg.stdout.exp cmpxchg.stderr.exp \
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faultstatus.disabled faultstatus.stderr.exp \
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fcmovnu.vgtest fcmovnu.stderr.exp fcmovnu.stdout.exp \
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fxtract.vgtest fxtract.stderr.exp fxtract.stdout.exp \
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fxtract.stdout.exp-older-glibc \
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$(addsuffix .stderr.exp,$(INSN_TESTS)) \
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$(addsuffix .stdout.exp,$(INSN_TESTS)) \
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$(addsuffix .vgtest,$(INSN_TESTS)) \
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insn_pclmulqdq.vgtest insn_pclmulqdq.stdout.exp \
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insn_pclmulqdq.stderr.exp \
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insn_sse3.stdout.exp insn_sse3.stderr.exp insn_sse3.vgtest \
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insn_ssse3.stdout.exp insn_ssse3.stderr.exp insn_ssse3.vgtest \
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jrcxz.stderr.exp jrcxz.stdout.exp jrcxz.vgtest \
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looper.stderr.exp looper.stdout.exp looper.vgtest \
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loopnel.stderr.exp loopnel.stdout.exp loopnel.vgtest \
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lzcnt64.stderr.exp lzcnt64.stdout.exp lzcnt64.vgtest \
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nibz_bennee_mmap.stderr.exp nibz_bennee_mmap.stdout.exp \
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nibz_bennee_mmap.vgtest \
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pcmpstr64.stderr.exp pcmpstr64.stdout.exp \
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pcmpstr64.vgtest \
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pcmpxstrx64.stderr.exp pcmpxstrx64.stdout.exp \
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pcmpxstrx64.vgtest \
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rcl-amd64.vgtest rcl-amd64.stdout.exp rcl-amd64.stderr.exp \
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redundantRexW.vgtest redundantRexW.stdout.exp \
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redundantRexW.stderr.exp \
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smc1.stderr.exp smc1.stdout.exp smc1.vgtest \
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sbbmisc.stderr.exp sbbmisc.stdout.exp sbbmisc.vgtest \
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shrld.stderr.exp shrld.stdout.exp shrld.vgtest \
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ssse3_misaligned.stderr.exp ssse3_misaligned.stdout.exp \
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ssse3_misaligned.vgtest \
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sse4-64.stderr.exp sse4-64.stdout.exp sse4-64.vgtest \
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sse4-64.stdout.exp-older-glibc \
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slahf-amd64.stderr.exp slahf-amd64.stdout.exp \
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slahf-amd64.vgtest \
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xadd.stderr.exp xadd.stdout.exp xadd.vgtest
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check_PROGRAMS = \
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allexec \
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amd64locked \
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asorep \
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bug127521-64 bug132813-amd64 bug132918 \
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clc \
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cmpxchg \
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$(INSN_TESTS) \
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rcl-amd64 \
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redundantRexW \
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smc1 \
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sbbmisc \
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nibz_bennee_mmap \
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xadd
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if BUILD_SSSE3_TESTS
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check_PROGRAMS += ssse3_misaligned
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endif
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if BUILD_LZCNT_TESTS
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check_PROGRAMS += lzcnt64
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endif
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if BUILD_SSE42_TESTS
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check_PROGRAMS += pcmpstr64 pcmpxstrx64 sse4-64 crc32
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endif
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# DDD: these need to be made to work on Darwin like the x86/ ones were.
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if ! VGCONF_OS_IS_DARWIN
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check_PROGRAMS += \
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bug137714-amd64 \
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bug156404-amd64 \
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faultstatus \
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fcmovnu \
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fxtract \
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looper \
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loopnel \
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jrcxz \
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shrld \
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slahf-amd64
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endif
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AM_CFLAGS += @FLAG_M64@
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AM_CXXFLAGS += @FLAG_M64@
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AM_CCASFLAGS += @FLAG_M64@
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allexec_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_NONNULL@
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# generic C ones
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amd64locked_CFLAGS = $(AM_CFLAGS) -O
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bug132918_LDADD = -lm
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fxtract_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_OVERFLOW@
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insn_basic_SOURCES = insn_basic.def
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insn_basic_LDADD = -lm
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insn_mmx_SOURCES = insn_mmx.def
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insn_mmx_LDADD = -lm
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insn_sse_SOURCES = insn_sse.def
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insn_sse_LDADD = -lm
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insn_sse2_SOURCES = insn_sse2.def
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insn_sse2_LDADD = -lm
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insn_sse3_SOURCES = insn_sse3.def
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insn_sse3_LDADD = -lm
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insn_ssse3_SOURCES = insn_ssse3.def
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insn_ssse3_LDADD = -lm
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insn_fpu_SOURCES = insn_fpu.def
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insn_fpu_LDADD = -lm
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insn_pclmulqdq_SOURCES = insn_pclmulqdq.def
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fxtract_LDADD = -lm
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.def.c: $(srcdir)/gen_insn_test.pl
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$(PERL) $(srcdir)/gen_insn_test.pl < $< > $@
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