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https://github.com/Zenithsiz/ftmemsim-valgrind.git
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3235d88de8
(When generating 64-bit code, ensure that any addresses used in 4 or 8 byte loads or stores of the form reg+imm have the lowest 2 bits of imm set to zero, so that they can safely be used in ld/ldu/lda/std/stdu instructions.) git-svn-id: svn://svn.valgrind.org/valgrind/trunk@6645
80 lines
1.7 KiB
C
80 lines
1.7 KiB
C
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/*
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This is a regression test for the following problem, noticed by
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Greg Parker:
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vex ppc64 generates bad code for instruction sequences like this:
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li r0, 2
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stdx r3, r1, r0
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gcc emits code like this when manipulating packed structures
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with 8-byte fields on 2-byte boundaries.
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First, vex's optimizer substitutes a constant 0x2 for r0:
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------ IMark(0x100000F34, 4) ------
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PUT(1024) = 0x100000F34:I64
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t3 = GET:I64(24)
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t14 = GET:I64(8)
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t13 = Add64(t14,0x2:I64)
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STbe(t13) = t3
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Then instruction selection chooses `std` with an index not divisible by 4:
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-- STbe(Add64(GET:I64(8),0x2:I64)) = GET:I64(24)
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ldz %vR22,8(%r31)
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ldz %vR23,24(%r31)
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std %vR23,2(%vR22)
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Finally, the assembler silently strips the index&3 part,
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because `std` can't encode that:
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std %r6,2(%r5)
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F8 C5 00 00
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...but 0xF8C50000 is `std r6, 0(r5)`, which writes to the wrong address.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <assert.h>
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typedef
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struct __attribute__ ((__packed__)) {
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char before[2];
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unsigned long long int w64;
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char after[6];
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}
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T;
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void foo (T* t, unsigned long long int w)
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{
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__asm__ __volatile__(
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"stdx %0,%1,%2"
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: : "b"(w), "b"(t), "b"(2) : "memory"
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);
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}
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int main ( void )
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{
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T* t;
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unsigned char* p;
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int i;
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assert(sizeof(T) == 16);
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t = calloc(sizeof(T),1);
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assert(t);
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/* check t is 8-aligned. This causes the write done by 'foo' to be
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misaligned by 2 as desired, triggering the bug. */
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assert(0 == (((unsigned long)t) & 7));
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foo(t, 0x1122334455667788);
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p = (unsigned char*)t;
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for (i = 0; i < 16; i++)
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if (p[i] == 0)
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printf("..");
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else
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printf("%02x", (int)p[i]);
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printf("\n");
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return 0;
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}
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