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https://github.com/Zenithsiz/ftmemsim-valgrind.git
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95038d380d
Bits 18 (NAN2008) and 19 (ABS2008) in FCSR are preset by hardware and can differ between platforms. Hence, we should clear these bits before printing FCSR value in order to have the same output on different platforms. This fixes several failures (tests modified by this change) that occur on MIPS P5600 board. The P5600 is a core that implements MIPS32 Release 5 arch.
40 lines
1.6 KiB
C
40 lines
1.6 KiB
C
#include <stdio.h>
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/*
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* Bits 18 (NAN2008) and 19 (ABS2008) are preset by hardware and may differ
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* between platforms. Hence a macro to clear them before printing FCSR
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* values.
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*/
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#define FCSR_NAN2008 1 << 18
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#define FCSR_ABS2008 1 << 19
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#define FLAGS_RM_MASK 0xFFFFFFFF & ~(FCSR_ABS2008 | FCSR_NAN2008)
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#define CLEAR_PRESETBITS_FCSR(fcsr) (fcsr & FLAGS_RM_MASK)
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int main ()
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{
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#if defined(__mips_hard_float)
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long out [] = {0, 0};
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__asm__ volatile("cfc1 $a1, $31" "\n\t"
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"dli $t0, 0x405ee0a3d70a3d71" "\n\t"
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"dmtc1 $t0, $f0" "\n\t"
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"ctc1 $zero, $31" "\n\t"
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"round.w.d $f0, $f0" "\n\t"
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"cfc1 $a2, $31" "\n\t"
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"sd $a2, 0(%0)" "\n\t"
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"dli $t0, 0x3ff0000000000000" "\n\t"
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"dmtc1 $t0, $f0" "\n\t"
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"ctc1 $zero, $31" "\n\t"
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"round.w.d $f0, $f0" "\n\t"
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"cfc1 $a2, $31" "\n\t"
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"sd $a2, 8(%0)" "\n\t"
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"ctc1 $a1, $31" "\n\t"
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:
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: "r" (out)
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: "a1", "a2", "t0", "$f0"
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);
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printf("FCSR::1: 0x%lx, 2: 0x%lx\n", CLEAR_PRESETBITS_FCSR(out[0]),
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CLEAR_PRESETBITS_FCSR(out[1]));
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#endif
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return 0;
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}
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