mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-03 10:05:29 +00:00
453 lines
13 KiB
C
453 lines
13 KiB
C
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/* This is an example of a program which does atomic memory operations
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between two processes which share a page. Valgrind 3.4.1 and
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earlier produce incorrect answers because it does not preserve
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atomicity of the relevant instructions in the generated code; but
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the post-DCAS-merge versions of Valgrind do behave correctly. */
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/* On ARM, this can be compiled into either ARM or Thumb code, so as
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to test both A and T encodings of LDREX/STREX et al. Also on ARM,
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it tests doubleword atomics (LDREXD, STREXD) which I don't think it
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does on any other platform. */
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <assert.h>
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#include <unistd.h>
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#include <sys/wait.h>
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#include "tests/sys_mman.h"
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#define NNN 3456987
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#define IS_8_ALIGNED(_ptr) (0 == (((unsigned long)(_ptr)) & 7))
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__attribute__((noinline)) void atomic_add_8bit ( char* p, int n )
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{
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#if defined(VGA_x86)
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unsigned long block[2];
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block[0] = (unsigned long)p;
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block[1] = n;
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__asm__ __volatile__(
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"movl 0(%%esi),%%eax" "\n\t"
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"movl 4(%%esi),%%ebx" "\n\t"
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"lock; addb %%bl,(%%eax)" "\n"
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: : "S"(&block[0])/* S means "esi only" */ : "memory","cc","eax","ebx"
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);
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#elif defined(VGA_amd64)
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unsigned long block[2];
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block[0] = (unsigned long)p;
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block[1] = n;
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__asm__ __volatile__(
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"movq 0(%%rsi),%%rax" "\n\t"
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"movq 8(%%rsi),%%rbx" "\n\t"
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"lock; addb %%bl,(%%rax)" "\n"
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: : "S"(&block[0])/* S means "rsi only" */ : "memory","cc","rax","rbx"
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);
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#elif defined(VGA_ppc32)
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/* Nasty hack. Does correctly atomically do *p += n, but only if p
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is 4-aligned -- guaranteed by caller. */
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unsigned long success;
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do {
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__asm__ __volatile__(
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"lwarx 15,0,%1" "\n\t"
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"add 15,15,%2" "\n\t"
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"stwcx. 15,0,%1" "\n\t"
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"mfcr %0" "\n\t"
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"srwi %0,%0,29" "\n\t"
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"andi. %0,%0,1" "\n"
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: /*out*/"=b"(success)
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: /*in*/ "b"(p), "b"(((unsigned long)n) << 24)
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: /*trash*/ "memory", "cc", "r15"
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);
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} while (success != 1);
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#elif defined(VGA_ppc64)
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/* Nasty hack. Does correctly atomically do *p += n, but only if p
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is 8-aligned -- guaranteed by caller. */
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unsigned long success;
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do {
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__asm__ __volatile__(
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"ldarx 15,0,%1" "\n\t"
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"add 15,15,%2" "\n\t"
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"stdcx. 15,0,%1" "\n\t"
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"mfcr %0" "\n\t"
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"srwi %0,%0,29" "\n\t"
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"andi. %0,%0,1" "\n"
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: /*out*/"=b"(success)
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: /*in*/ "b"(p), "b"(((unsigned long)n) << 56)
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: /*trash*/ "memory", "cc", "r15"
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);
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} while (success != 1);
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#elif defined(VGA_arm)
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unsigned int block[3]
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= { (unsigned int)p, (unsigned int)n, 0xFFFFFFFF };
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do {
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__asm__ __volatile__(
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"mov r5, %0" "\n\t"
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"ldr r9, [r5, #0]" "\n\t" // p
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"ldr r10, [r5, #4]" "\n\t" // n
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"ldrexb r8, [r9]" "\n\t"
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"add r8, r8, r10" "\n\t"
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"strexb r4, r8, [r9]" "\n\t"
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"str r4, [r5, #8]" "\n\t"
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: /*out*/
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: /*in*/ "r"(&block[0])
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: /*trash*/ "memory", "cc", "r5", "r8", "r9", "r10", "r4"
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);
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} while (block[2] != 0);
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#elif defined(VGA_s390x)
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int dummy;
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__asm__ __volatile__(
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" l 0,%0\n\t"
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"0: st 0,%1\n\t"
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" icm 1,1,%1\n\t"
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" ar 1,%2\n\t"
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" stcm 1,1,%1\n\t"
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" l 1,%1\n\t"
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" cs 0,1,%0\n\t"
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" jl 0b\n\t"
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: "+m" (*p), "+m" (dummy)
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: "d" (n)
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: "cc", "memory", "0", "1");
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#else
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# error "Unsupported arch"
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#endif
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}
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__attribute__((noinline)) void atomic_add_16bit ( short* p, int n )
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{
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#if defined(VGA_x86)
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unsigned long block[2];
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block[0] = (unsigned long)p;
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block[1] = n;
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__asm__ __volatile__(
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"movl 0(%%esi),%%eax" "\n\t"
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"movl 4(%%esi),%%ebx" "\n\t"
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"lock; addw %%bx,(%%eax)" "\n"
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: : "S"(&block[0])/* S means "esi only" */ : "memory","cc","eax","ebx"
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);
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#elif defined(VGA_amd64)
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unsigned long block[2];
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block[0] = (unsigned long)p;
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block[1] = n;
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__asm__ __volatile__(
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"movq 0(%%rsi),%%rax" "\n\t"
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"movq 8(%%rsi),%%rbx" "\n\t"
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"lock; addw %%bx,(%%rax)" "\n"
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: : "S"(&block[0])/* S means "rsi only" */ : "memory","cc","rax","rbx"
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);
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#elif defined(VGA_ppc32)
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/* Nasty hack. Does correctly atomically do *p += n, but only if p
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is 8-aligned -- guaranteed by caller. */
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unsigned long success;
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do {
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__asm__ __volatile__(
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"lwarx 15,0,%1" "\n\t"
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"add 15,15,%2" "\n\t"
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"stwcx. 15,0,%1" "\n\t"
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"mfcr %0" "\n\t"
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"srwi %0,%0,29" "\n\t"
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"andi. %0,%0,1" "\n"
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: /*out*/"=b"(success)
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: /*in*/ "b"(p), "b"(((unsigned long)n) << 16)
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: /*trash*/ "memory", "cc", "r15"
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);
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} while (success != 1);
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#elif defined(VGA_ppc64)
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/* Nasty hack. Does correctly atomically do *p += n, but only if p
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is 8-aligned -- guaranteed by caller. */
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unsigned long success;
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do {
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__asm__ __volatile__(
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"ldarx 15,0,%1" "\n\t"
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"add 15,15,%2" "\n\t"
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"stdcx. 15,0,%1" "\n\t"
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"mfcr %0" "\n\t"
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"srwi %0,%0,29" "\n\t"
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"andi. %0,%0,1" "\n"
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: /*out*/"=b"(success)
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: /*in*/ "b"(p), "b"(((unsigned long)n) << 48)
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: /*trash*/ "memory", "cc", "r15"
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);
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} while (success != 1);
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#elif defined(VGA_arm)
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unsigned int block[3]
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= { (unsigned int)p, (unsigned int)n, 0xFFFFFFFF };
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do {
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__asm__ __volatile__(
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"mov r5, %0" "\n\t"
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"ldr r9, [r5, #0]" "\n\t" // p
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"ldr r10, [r5, #4]" "\n\t" // n
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"ldrexh r8, [r9]" "\n\t"
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"add r8, r8, r10" "\n\t"
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"strexh r4, r8, [r9]" "\n\t"
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"str r4, [r5, #8]" "\n\t"
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: /*out*/
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: /*in*/ "r"(&block[0])
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: /*trash*/ "memory", "cc", "r5", "r8", "r9", "r10", "r4"
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);
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} while (block[2] != 0);
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#elif defined(VGA_s390x)
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int dummy;
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__asm__ __volatile__(
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" l 0,%0\n\t"
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"0: st 0,%1\n\t"
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" icm 1,3,%1\n\t"
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" ar 1,%2\n\t"
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" stcm 1,3,%1\n\t"
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" l 1,%1\n\t"
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" cs 0,1,%0\n\t"
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" jl 0b\n\t"
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: "+m" (*p), "+m" (dummy)
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: "d" (n)
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: "cc", "memory", "0", "1");
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#else
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# error "Unsupported arch"
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#endif
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}
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__attribute__((noinline)) void atomic_add_32bit ( int* p, int n )
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{
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#if defined(VGA_x86)
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unsigned long block[2];
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block[0] = (unsigned long)p;
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block[1] = n;
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__asm__ __volatile__(
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"movl 0(%%esi),%%eax" "\n\t"
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"movl 4(%%esi),%%ebx" "\n\t"
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"lock; addl %%ebx,(%%eax)" "\n"
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: : "S"(&block[0])/* S means "esi only" */ : "memory","cc","eax","ebx"
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);
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#elif defined(VGA_amd64)
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unsigned long block[2];
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block[0] = (unsigned long)p;
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block[1] = n;
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__asm__ __volatile__(
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"movq 0(%%rsi),%%rax" "\n\t"
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"movq 8(%%rsi),%%rbx" "\n\t"
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"lock; addl %%ebx,(%%rax)" "\n"
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: : "S"(&block[0])/* S means "rsi only" */ : "memory","cc","rax","rbx"
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);
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#elif defined(VGA_ppc32)
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unsigned long success;
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do {
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__asm__ __volatile__(
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"lwarx 15,0,%1" "\n\t"
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"add 15,15,%2" "\n\t"
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"stwcx. 15,0,%1" "\n\t"
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"mfcr %0" "\n\t"
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"srwi %0,%0,29" "\n\t"
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"andi. %0,%0,1" "\n"
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: /*out*/"=b"(success)
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: /*in*/ "b"(p), "b"(n)
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: /*trash*/ "memory", "cc", "r15"
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);
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} while (success != 1);
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#elif defined(VGA_ppc64)
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/* Nasty hack. Does correctly atomically do *p += n, but only if p
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is 8-aligned -- guaranteed by caller. */
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unsigned long success;
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do {
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__asm__ __volatile__(
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"ldarx 15,0,%1" "\n\t"
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"add 15,15,%2" "\n\t"
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"stdcx. 15,0,%1" "\n\t"
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"mfcr %0" "\n\t"
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"srwi %0,%0,29" "\n\t"
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"andi. %0,%0,1" "\n"
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: /*out*/"=b"(success)
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: /*in*/ "b"(p), "b"(((unsigned long)n) << 32)
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: /*trash*/ "memory", "cc", "r15"
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);
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} while (success != 1);
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#elif defined(VGA_arm)
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unsigned int block[3]
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= { (unsigned int)p, (unsigned int)n, 0xFFFFFFFF };
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do {
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__asm__ __volatile__(
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"mov r5, %0" "\n\t"
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"ldr r9, [r5, #0]" "\n\t" // p
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"ldr r10, [r5, #4]" "\n\t" // n
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"ldrex r8, [r9]" "\n\t"
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"add r8, r8, r10" "\n\t"
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"strex r4, r8, [r9]" "\n\t"
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"str r4, [r5, #8]" "\n\t"
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: /*out*/
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: /*in*/ "r"(&block[0])
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: /*trash*/ "memory", "cc", "r5", "r8", "r9", "r10", "r4"
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);
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} while (block[2] != 0);
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#elif defined(VGA_s390x)
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__asm__ __volatile__(
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" l 0,%0\n\t"
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"0: lr 1,0\n\t"
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" ar 1,%1\n\t"
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" cs 0,1,%0\n\t"
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" jl 0b\n\t"
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: "+m" (*p)
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: "d" (n)
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: "cc", "memory", "0", "1");
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#else
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# error "Unsupported arch"
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#endif
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}
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__attribute__((noinline)) void atomic_add_64bit ( long long int* p, int n )
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{
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#if defined(VGA_x86) || defined(VGA_ppc32)
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/* do nothing; is not supported */
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#elif defined(VGA_amd64)
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// this is a bit subtle. It relies on the fact that, on a 64-bit platform,
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// sizeof(unsigned long long int) == sizeof(unsigned long) == sizeof(void*)
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unsigned long long int block[2];
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block[0] = (unsigned long long int)(unsigned long)p;
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block[1] = n;
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__asm__ __volatile__(
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"movq 0(%%rsi),%%rax" "\n\t"
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"movq 8(%%rsi),%%rbx" "\n\t"
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"lock; addq %%rbx,(%%rax)" "\n"
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: : "S"(&block[0])/* S means "rsi only" */ : "memory","cc","rax","rbx"
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);
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#elif defined(VGA_ppc64)
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unsigned long success;
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do {
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__asm__ __volatile__(
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"ldarx 15,0,%1" "\n\t"
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"add 15,15,%2" "\n\t"
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"stdcx. 15,0,%1" "\n\t"
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"mfcr %0" "\n\t"
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"srwi %0,%0,29" "\n\t"
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"andi. %0,%0,1" "\n"
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: /*out*/"=b"(success)
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: /*in*/ "b"(p), "b"(n)
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: /*trash*/ "memory", "cc", "r15"
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);
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} while (success != 1);
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#elif defined(VGA_arm)
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unsigned long long int block[3]
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= { (unsigned long long int)(unsigned long)p,
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(unsigned long long int)n,
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0xFFFFFFFFFFFFFFFFULL };
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do {
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__asm__ __volatile__(
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"mov r5, %0" "\n\t"
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"ldr r8, [r5, #0]" "\n\t" // p
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"ldrd r2, r3, [r5, #8]" "\n\t" // n
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"ldrexd r0, r1, [r8]" "\n\t"
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"adds r2, r2, r0" "\n\t"
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"adc r3, r3, r1" "\n\t"
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"strexd r1, r2, r3, [r8]" "\n\t"
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"str r1, [r5, #16]" "\n\t"
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: /*out*/
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: /*in*/ "r"(&block[0])
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: /*trash*/ "memory", "cc", "r5", "r0", "r1", "r8", "r2", "r3"
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);
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} while (block[2] != 0xFFFFFFFF00000000ULL);
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#elif defined(VGA_s390x)
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__asm__ __volatile__(
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" lg 0,%0\n\t"
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"0: lgr 1,0\n\t"
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" agr 1,%1\n\t"
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" csg 0,1,%0\n\t"
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" jl 0b\n\t"
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: "+m" (*p)
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: "d" (n)
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: "cc", "memory", "0", "1");
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#else
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# error "Unsupported arch"
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#endif
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}
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int main ( int argc, char** argv )
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{
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int i, status;
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char* page;
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char* p8;
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short* p16;
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int* p32;
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long long int* p64;
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pid_t child, p2;
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printf("parent, pre-fork\n");
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page = mmap( 0, sysconf(_SC_PAGESIZE),
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PROT_READ|PROT_WRITE,
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MAP_ANONYMOUS|MAP_SHARED, -1, 0 );
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if (page == MAP_FAILED) {
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perror("mmap failed");
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exit(1);
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}
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p8 = (char*)(page+0);
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p16 = (short*)(page+256);
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p32 = (int*)(page+512);
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p64 = (long long int*)(page+768);
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assert( IS_8_ALIGNED(p8) );
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assert( IS_8_ALIGNED(p16) );
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assert( IS_8_ALIGNED(p32) );
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assert( IS_8_ALIGNED(p64) );
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memset(page, 0, 1024);
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*p8 = 0;
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*p16 = 0;
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*p32 = 0;
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*p64 = 0;
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child = fork();
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if (child == -1) {
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perror("fork() failed\n");
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return 1;
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}
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if (child == 0) {
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/* --- CHILD --- */
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printf("child\n");
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for (i = 0; i < NNN; i++) {
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atomic_add_8bit(p8, 1);
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atomic_add_16bit(p16, 1);
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atomic_add_32bit(p32, 1);
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atomic_add_64bit(p64, 98765 ); /* ensure we hit the upper 32 bits */
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}
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return 1;
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/* NOTREACHED */
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}
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/* --- PARENT --- */
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printf("parent\n");
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for (i = 0; i < NNN; i++) {
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atomic_add_8bit(p8, 1);
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atomic_add_16bit(p16, 1);
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atomic_add_32bit(p32, 1);
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atomic_add_64bit(p64, 98765 ); /* ensure we hit the upper 32 bits */
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}
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p2 = waitpid(child, &status, 0);
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assert(p2 == child);
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/* assert that child finished normally */
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assert(WIFEXITED(status));
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printf("FINAL VALUES: 8 bit %d, 16 bit %d, 32 bit %d, 64 bit %lld\n",
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(int)(*(signed char*)p8), (int)(*p16), *p32, *p64 );
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if (-74 == (int)(*(signed char*)p8)
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&& 32694 == (int)(*p16)
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&& 6913974 == *p32
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&& (0LL == *p64 || 682858642110LL == *p64)) {
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printf("PASS\n");
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} else {
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printf("FAIL -- see source code for expected values\n");
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}
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printf("parent exits\n");
|
|
|
|
return 0;
|
|
}
|