Files
ftmemsim-valgrind/none/tests/mips64/test_fcsr.c
Petar Jovanovic 7449ebb921 mips64: enable soft-float build of the tests
Cavium toolchain defaults to soft-float, so it is important to enable full
build of the test suite to work in that case as well.

This boils down to protecting FPU-specific code segments with

#if defined(__mips_hard_float)
#endif


git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14572
2014-09-27 05:40:33 +00:00

29 lines
1.2 KiB
C

#include <stdio.h>
int main ()
{
#if defined(__mips_hard_float)
long out [] = {0, 0};
__asm__ volatile("cfc1 $a1, $31" "\n\t"
"dli $t0, 0x405ee0a3d70a3d71" "\n\t"
"dmtc1 $t0, $f0" "\n\t"
"ctc1 $zero, $31" "\n\t"
"round.w.d $f0, $f0" "\n\t"
"cfc1 $a2, $31" "\n\t"
"sd $a2, 0(%0)" "\n\t"
"dli $t0, 0x3ff0000000000000" "\n\t"
"dmtc1 $t0, $f0" "\n\t"
"ctc1 $zero, $31" "\n\t"
"round.w.d $f0, $f0" "\n\t"
"cfc1 $a2, $31" "\n\t"
"sd $a2, 8(%0)" "\n\t"
"ctc1 $a1, $31" "\n\t"
:
: "r" (out)
: "a1", "a2", "t0", "$f0"
);
printf("FCSR::1: 0x%lx, 2: 0x%lx\n", out[0], out[1]);
#endif
return 0;
}