Julian Seward 3235d88de8 Add a test for vex ppc64 code generation bug fixed by vex r1739 ...

(When generating 64-bit code, ensure that any addresses used in 4 or 8
byte loads or stores of the form reg+imm have the lowest 2 bits of imm
set to zero, so that they can safely be used in ld/ldu/lda/std/stdu
instructions.)



git-svn-id: svn://svn.valgrind.org/valgrind/trunk@6645

2007-03-12 02:10:23 +00:00

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