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The 32-bit testsuite executes the 64-bit class instruction prtyd. This instruction should not be tested in 32-bit mode. The change also updates the expected output for the test. Note, 32-bit HW will generate a SIGILL when the prtyd instruction is executed. However, the 64-bit HW executing a 32-bit application does execute the instruction but only the lower 32-bits of the result are valid. In general, the 64-bit class instructions should not be executed in 32-bit binaries. This fix accompanies the VEX fix in revision 2558 to add the 64-bit mode test to make sure the 64-bit class instructions are only executed in 64-bit mode. The VEX bugzilla is: Bug 308573 - Internal Valgrind error on 64-bit instruction executed in 32-bit mode Carl Love cel@us.ibm.com git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13091
73 lines
2.2 KiB
Plaintext
73 lines
2.2 KiB
Plaintext
lwarx => bad0beef
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fcpsgn sign=10.101010, base=11.111111 => 11.111111
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fcpsgn sign=10.101010, base=-0.000000 => 0.000000
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fcpsgn sign=10.101010, base=0.000000 => 0.000000
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fcpsgn sign=10.101010, base=-11.111111 => 11.111111
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fcpsgn sign=-0.000000, base=11.111111 => -11.111111
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fcpsgn sign=-0.000000, base=-0.000000 => -0.000000
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fcpsgn sign=-0.000000, base=0.000000 => -0.000000
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fcpsgn sign=-0.000000, base=-11.111111 => -11.111111
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fcpsgn sign=0.000000, base=11.111111 => 11.111111
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fcpsgn sign=0.000000, base=-0.000000 => 0.000000
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fcpsgn sign=0.000000, base=0.000000 => 0.000000
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fcpsgn sign=0.000000, base=-11.111111 => 11.111111
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fcpsgn sign=-10.101010, base=11.111111 => -11.111111
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fcpsgn sign=-10.101010, base=-0.000000 => -0.000000
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fcpsgn sign=-10.101010, base=0.000000 => -0.000000
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fcpsgn sign=-10.101010, base=-11.111111 => -11.111111
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lfdp (-1024.000000, 1025.000000) => F_hi=-1024.000000, F_lo=1025.000000
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stfdp (2.204800, -4.102400) => F_hi=2.204800, F_lo=-4.102400
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lfdpx (2.204800, -4.102400) => F_hi=2.204800, F_lo=-4.102400
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stfdpx (2.204800, 2.204800) => F_hi=2.204800, F_lo=2.204800
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lfiwax (-1024.000000) => FRT=(ffffffff, c0900000)
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prtyw (0) => parity=0
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prtyw (1) => parity=1
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prtyw (2) => parity=0
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prtyw (3) => parity=1
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prtyw (4) => parity=0
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prtyw (5) => parity=1
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prtyw (6) => parity=0
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prtyw (7) => parity=1
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prtyw (8) => parity=0
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prtyw (9) => parity=1
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prtyw (a) => parity=0
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prtyw (b) => parity=1
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prtyw (c) => parity=0
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prtyw (d) => parity=1
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prtyw (e) => parity=0
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prtyw (f) => parity=1
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prtyw (10) => parity=0
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prtyw (11) => parity=1
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prtyw (12) => parity=0
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prtyw (13) => parity=1
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prtyw (14) => parity=0
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prtyw (15) => parity=1
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prtyw (16) => parity=0
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prtyw (17) => parity=1
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prtyw (18) => parity=0
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prtyw (19) => parity=1
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prtyw (1a) => parity=0
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prtyw (1b) => parity=1
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prtyw (1c) => parity=0
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prtyw (1d) => parity=1
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prtyw (1e) => parity=0
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prtyw (1f) => parity=1
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prtyw (20) => parity=0
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prtyw (21) => parity=1
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prtyw (22) => parity=0
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prtyw (23) => parity=1
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prtyw (24) => parity=0
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prtyw (25) => parity=1
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prtyw (26) => parity=0
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prtyw (27) => parity=1
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prtyw (28) => parity=0
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prtyw (29) => parity=1
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prtyw (2a) => parity=0
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prtyw (2b) => parity=1
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prtyw (2c) => parity=0
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prtyw (2d) => parity=1
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prtyw (2e) => parity=0
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prtyw (2f) => parity=1
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prtyw (30) => parity=0
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prtyw (31) => parity=1
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