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https://github.com/Zenithsiz/ftmemsim-valgrind.git
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ed74dc8a27
Force "hardfloat" mode for inline assembly that uses FPU instructions, but pop original mode at the end of the assembly. Unhandled FPU instructions will be handled by the signal handler (env_unsup_insn). Skip MIPS specific tests for FPU if the code gets compiled for soft- float. This should allow Valgrind to be compiled as a soft-float binary, but that executable should be used for soft-float systems only. Related VEX change - r3261. Related issue - BZ#351282. Patch by Aleksandar Rikalo. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16039
245 lines
7.1 KiB
C
245 lines
7.1 KiB
C
#if defined(__mips_hard_float)
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#include <stdio.h>
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#include <stdlib.h>
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typedef enum {
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ABSS=0, ABSD,
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ADDS, ADDD,
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DIVS, DIVD,
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MULS, MULD,
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NEGS, NEGD,
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SQRTS, SQRTD,
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SUBS, SUBD,
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RECIPS, RECIPD,
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RSQRTS, RSQRTD
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} flt_art_op_t;
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const char *flt_art_op_names[] = {
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"abs.s", "abs.d",
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"add.s", "add.d",
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"div.s", "div.d",
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"mul.s", "mul.d",
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"neg.s", "neg.d",
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"sqrt.s", "sqrt.d",
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"sub.s", "sub.d",
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"recip.s", "recip.d",
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"rsqrt.s", "rsqrt.d"
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};
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typedef enum {
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TO_NEAREST=0, TO_ZERO, TO_PLUS_INFINITY, TO_MINUS_INFINITY } round_mode_t;
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char *round_mode_name[] = { "near", "zero", "+inf", "-inf" };
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const double fs_d[] = {
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0, 456.25, 3, -1,
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1384.5, -7.25, 1000000000, -5786.5,
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1752, 0.015625, 0.03125, -248562.75,
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456, -45786.5, 34.03125, 45786.75,
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1752065, 107, -45667.25, -7,
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-347856.5, 356047.5, -1.0, 23.0625
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};
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const double ft_d[] = {
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-456.25, -45786.5, 34.03125, 45786.75,
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1752065, 107, -45667.25, -7.25,
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-347856.5, 356047.5, -1.0, 23.0625,
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0, 456.25, 3, -1,
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1384.5, -7, 1000000000, -5786.5,
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1752, 0.015625, 0.03125, -248562.75
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};
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const float fs_f[] = {
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0, 456.25, 3, -1,
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1384.5, -7.25, 1000000000, -5786.5,
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1752, 0.015625, 0.03125, -248562.75,
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456, -45786.5, 34.03125, 45786.75,
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1752065, 107, -45667.25, -7,
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-347856.5, 356047.5, -1.0, 23.0625
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};
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const float ft_f[] = {
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-456.25, -4578.5, 34.03125, 4578.75,
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175, 107, -456.25, -7.25,
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-3478.5, 356.5, -1.0, 23.0625,
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0, 456.25, 3, -1,
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1384.5, -7, 100, -5786.5,
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1752, 0.015625, 0.03125, -248562.75
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};
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#define UNOPdd(op) \
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fd_d = 0; \
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__asm__ volatile( \
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op" %0, %1\n\t" \
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: "=f"(fd_d) : "f"(fs_d[i]));
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#define UNOPff(op) \
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fd_f = 0; \
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__asm__ volatile( \
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op" %0, %1\n\t" \
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: "=f"(fd_f) : "f"(fs_f[i]));
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#define BINOPf(op) \
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fd_f = 0; \
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__asm__ volatile( \
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op" %0, %1, %2\n\t" \
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: "=f"(fd_f) : "f"(fs_f[i]) , "f"(ft_f[i]));
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#define BINOPd(op) \
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fd_d = 0; \
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__asm__ volatile( \
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op" %0, %1, %2\n\t" \
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: "=f"(fd_d) : "f"(fs_d[i]) , "f"(ft_d[i]));
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void set_rounding_mode(round_mode_t mode)
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{
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switch(mode) {
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case TO_NEAREST:
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__asm__ volatile("cfc1 $t0, $31\n\t"
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"srl $t0, 2\n\t"
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"sll $t0, 2\n\t"
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"ctc1 $t0, $31\n\t");
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break;
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case TO_ZERO:
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__asm__ volatile("cfc1 $t0, $31\n\t"
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"srl $t0, 2\n\t"
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"sll $t0, 2\n\t"
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"addiu $t0, 1\n\t"
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"ctc1 $t0, $31\n\t");
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break;
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case TO_PLUS_INFINITY:
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__asm__ volatile("cfc1 $t0, $31\n\t"
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"srl $t0, 2\n\t"
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"sll $t0, 2\n\t"
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"addiu $t0, 2\n\t"
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"ctc1 $t0, $31\n\t");
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break;
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case TO_MINUS_INFINITY:
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__asm__ volatile("cfc1 $t0, $31\n\t"
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"srl $t0, 2\n\t"
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"sll $t0, 2\n\t"
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"addiu $t0, 3\n\t"
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"ctc1 $t0, $31\n\t");
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break;
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}
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}
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int arithmeticOperations(flt_art_op_t op)
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{
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double fd_d = 0;
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float fd_f = 0;
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int i = 0;
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round_mode_t rm;
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for (rm = TO_NEAREST; rm <= TO_MINUS_INFINITY; rm ++) {
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set_rounding_mode(rm);
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printf("rounding mode: %s\n", round_mode_name[rm]);
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for (i = 0; i < 24; i++)
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{
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switch(op) {
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case ABSS:
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UNOPff("abs.s");
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printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
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break;
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case ABSD:
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UNOPdd("abs.d");
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printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
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break;
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case ADDS:
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BINOPf("add.s");
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printf("%s %f %f %f\n", flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]);
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break;
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case ADDD:
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BINOPd("add.d");
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printf("%s %lf %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]);
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break;
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case DIVS:
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BINOPf("div.s");
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printf("%s %f %f %f\n", flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]);
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break;
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case DIVD:
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BINOPd("div.d");
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printf("%s %lf %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]);
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break;
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case MULS:
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BINOPf("mul.s");
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printf("%s %f %f %f\n", flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]);
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break;
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case MULD:
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BINOPd("mul.d");
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printf("%s %lf %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]);
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break;
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case NEGS:
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UNOPff("neg.s");
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printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
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break;
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case NEGD:
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UNOPdd("neg.d");
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printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
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break;
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case SQRTS:
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UNOPff("sqrt.s");
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printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
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break;
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case SQRTD:
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UNOPdd("sqrt.d");
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printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
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break;
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case SUBS:
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BINOPf("sub.s");
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printf("%s %f %f %f\n", flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]);
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break;
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case SUBD:
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BINOPd("sub.d");
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printf("%s %lf %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]);
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break;
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case RECIPS:
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#if (__mips==32) && (__mips_isa_rev>=2)
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UNOPff("recip.s");
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printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
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#endif
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break;
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case RECIPD:
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#if (__mips==32) && (__mips_isa_rev>=2)
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UNOPdd("recip.d");
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printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
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#endif
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break;
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case RSQRTS:
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#if (__mips==32) && (__mips_isa_rev>=2)
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UNOPff("rsqrt.s");
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printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
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#endif
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break;
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case RSQRTD:
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#if (__mips==32) && (__mips_isa_rev>=2)
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UNOPdd("rsqrt.d");
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printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
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#endif
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break;
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default:
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printf("error\n");
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break;
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}
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}
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}
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return 0;
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}
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int main()
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{
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flt_art_op_t op;
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printf("-------------------------- %s --------------------------\n",
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"test FPU Arithmetic Operations");
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for (op = ABSS; op <= RECIPD; op++) {
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arithmeticOperations(op);
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}
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return 0;
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}
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#else
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int main() {
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return 0;
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}
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#endif
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