mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-04 10:21:20 +00:00
Explanation by Matthias Schwarzott:
The linker will request an executable stack as soon as at least one
object file, that is linked in, wants an executable stack.
And the absence of the
.section .note.GNU-stack."",@progbits
is enough to tell the linker that an executable stack is needed.
So even an empty asm-file must at least contain this statement to not
force executable stacks on the whole executable.
* Define a helper macro MARK_STACK_NO_EXEC that disables the
executable stack.
* Instantiate this macro unconditionally at the end of each asm file.
Patch by Matthias Schwarzott <zzam@gentoo.org>.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15692
246 lines
7.7 KiB
ArmAsm
246 lines
7.7 KiB
ArmAsm
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/*--------------------------------------------------------------------*/
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/*--- The core dispatch loop, for jumping to a code address. ---*/
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/*--- dispatch-mips64-linux.S ---*/
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/*--------------------------------------------------------------------*/
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/*
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This file is part of Valgrind, a dynamic binary instrumentation
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framework.
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Copyright (C) 2000-2015 RT-RK
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mips-valgrind@rt-rk.com
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307, USA.
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The GNU General Public License is contained in the file COPYING.
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*/
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#include "pub_core_basics_asm.h"
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#if defined(VGP_mips64_linux)
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#include "pub_core_dispatch_asm.h"
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#include "pub_core_transtab_asm.h"
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#include "libvex_guest_offsets.h" /* for OFFSET_mips_PC */
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/*------------------------------------------------------------*/
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/*--- ---*/
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/*--- The dispatch loop. VG_(disp_run_translations) is ---*/
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/*--- used to run all translations, ---*/
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/*--- including no-redir ones. ---*/
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/*--- ---*/
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/*------------------------------------------------------------*/
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/*----------------------------------------------------*/
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/*--- Entry and preamble (set everything up) ---*/
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/*----------------------------------------------------*/
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/* signature:
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void VG_(disp_run_translations)( UWord* two_words,
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void* guest_state,
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Addr host_addr );
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*/
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.text
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.globl VG_(disp_run_translations)
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VG_(disp_run_translations):
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/* a0 ($4) holds two_words */
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/* a1 ($5) holds guest_state */
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/* a2 ($6) holds host_addr */
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/* New stack frame. Stack must remain 16 aligned (at least) */
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daddiu $29, -176
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/* Save ra */
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sd $31, 72($29)
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/* ... and s0 - s7 */
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sd $16, 80($29)
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sd $17, 88($29)
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sd $18, 96($29)
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sd $19, 104($29)
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sd $20, 112($29)
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sd $21, 120($29)
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sd $22, 128($29)
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sd $23, 136($29)
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/* ... and gp, fp/s8 */
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sd $28, 144($29)
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sd $30, 152($29)
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/* Save a0 ($4) on stack. In postamble it will be restored such that the
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return values can be written */
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sd $4, 160($29)
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/* Load address of guest state into guest state register ($23) */
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move $23, $5
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/* and jump into the code cache. Chained translations in
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the code cache run, until for whatever reason, they can't
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continue. When that happens, the translation in question
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will jump (or call) to one of the continuation points
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VG_(cp_...) below. */
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jr $6
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/*NOTREACHED*/
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/*----------------------------------------------------*/
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/*--- Postamble and exit. ---*/
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/*----------------------------------------------------*/
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postamble:
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/* At this point, $2 and $3 contain two
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words to be returned to the caller. $2
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holds a TRC value, and $3 optionally may
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hold another word (for CHAIN_ME exits, the
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address of the place to patch.) */
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/* Restore $4 from stack; holds address of two_words */
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ld $4, 160($29)
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sd $2, 0($4) /* Store $2 to two_words[0] */
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sd $3, 8($4) /* Store $3 to two_words[1] */
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/* Restore callee-saved registers... */
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/* Restore ra */
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ld $31, 72($29)
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/* ... and s0 - s7 */
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ld $16, 80($29)
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ld $17, 88($29)
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ld $18, 96($29)
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ld $19, 104($29)
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ld $20, 112($29)
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ld $21, 120($29)
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ld $22, 128($29)
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ld $23, 136($29)
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/* ... and gp, fp/s8 */
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ld $28, 144($29)
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ld $30, 152($29)
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daddiu $29, 176 /* stack_size */
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jr $31
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nop
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/*----------------------------------------------------*/
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/*--- Continuation points ---*/
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/*----------------------------------------------------*/
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/* ------ Chain me to slow entry point ------ */
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.global VG_(disp_cp_chain_me_to_slowEP)
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VG_(disp_cp_chain_me_to_slowEP):
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/* We got called. The return address indicates
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where the patching needs to happen. Collect
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the return address and, exit back to C land,
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handing the caller the pair (Chain_me_S, RA) */
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li $2, VG_TRC_CHAIN_ME_TO_SLOW_EP
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move $3, $31
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/* 8 = mkLoadImm_EXACTLY2or6
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4 = jalr $9
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4 = nop */
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daddiu $3, $3, -32
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b postamble
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/* ------ Chain me to slow entry point ------ */
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.global VG_(disp_cp_chain_me_to_fastEP)
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VG_(disp_cp_chain_me_to_fastEP):
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/* We got called. The return address indicates
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where the patching needs to happen. Collect
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the return address and, exit back to C land,
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handing the caller the pair (Chain_me_S, RA) */
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li $2, VG_TRC_CHAIN_ME_TO_FAST_EP
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move $3, $31
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/* 8 = mkLoadImm_EXACTLY2or6
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4 = jalr $9
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4 = nop */
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daddiu $3, $3, -32
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b postamble
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/* ------ Indirect but boring jump ------ */
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.global VG_(disp_cp_xindir)
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VG_(disp_cp_xindir):
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/* Where are we going? */
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ld $11, OFFSET_mips64_PC($23)
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lw $13, vgPlain_stats__n_xindirs_32
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addiu $13, $13, 0x1
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sw $13, vgPlain_stats__n_xindirs_32
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/* try a fast lookup in the translation cache */
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/* t1 = VG_TT_FAST_HASH(addr) * sizeof(ULong*)
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= (t8 >> 2 & VG_TT_FAST_MASK) << 3 */
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move $14, $11
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li $12, VG_TT_FAST_MASK
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srl $14, $14, 2
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and $14, $14, $12
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sll $14, $14, 3
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/* t2 = (addr of VG_(tt_fast)) + t1 */
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dla $13, VG_(tt_fast)
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daddu $13, $13, $14
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ld $12, 0($13) /* t3 = VG_(tt_fast)[hash] :: ULong* */
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daddi $13, $13, 8
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ld $25, 0($13) /* little-endian, so comparing 1st 32bit word */
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nop
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check:
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bne $12, $11, fast_lookup_failed
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/* run the translation */
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jr $25
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.long 0x0 /* persuade insn decoders not to speculate past here */
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fast_lookup_failed:
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/* %PC is up to date */
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/* back out decrement of the dispatch counter */
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/* hold dispatch_ctr in t0 (r8) */
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lw $13, vgPlain_stats__n_xindirs_32
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addiu $13, $13, 0x1
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sw $13, vgPlain_stats__n_xindirs_32
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li $2, VG_TRC_INNER_FASTMISS
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li $3, 0
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b postamble
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/* ------ Assisted jump ------ */
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.global VG_(disp_cp_xassisted)
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VG_(disp_cp_xassisted):
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/* guest-state-pointer contains the TRC. Put the value into the
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return register */
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move $2, $23
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move $3, $0
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b postamble
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/* ------ Event check failed ------ */
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.global VG_(disp_cp_evcheck_fail)
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VG_(disp_cp_evcheck_fail):
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li $2, VG_TRC_INNER_COUNTERZERO
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move $3, $0
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b postamble
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.size VG_(disp_run_translations), .-VG_(disp_run_translations)
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#endif // defined(VGP_mips64_linux)
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/* Let the linker know we don't need an executable stack */
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MARK_STACK_NO_EXEC
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/*--------------------------------------------------------------------*/
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/*--- end ---*/
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/*--------------------------------------------------------------------*/
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