more cache friendly. This changes the mechanism from being a table of
pointers to (guest address, translated code pairs) to being a table of
pairs (guest address, pointer to translated code). The effect ranges
from zero up to about 20% performance improvement on memcheck, the
biggest effects being seen for programs which jump around a large
number of blocks of code and whose data set does not fit in L2.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@6582
Use 'ctr' rather than 'lr' for indirect jumps, so as not to trash the
branch predictor(s) for returns from generated code. Makes a big
difference on ppc970 (and POWER4).
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@6291
with self hosting. Without this, the symbol has
size 0 and type NOT, and is ignored by the symbol loader.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5872
branch hereby becomes inactive. This currently breaks everything
except x86; fixes for amd64/ppc32 to follow.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5520
to translations and back to dispatcher, and also different arg
passing conventions to LibVEX_Translate).
- Rewrite x86 dispatcher to not increment the profiling counters
unless requested by the user. This dramatically reduces the
D1 miss rate and gives considerable performance improvement
on x86. Also, restructure and add comments to dispatch-x86-linux.S
to make it much easier to follow (imo).
amd64/ppc32/ppc64 fixes to follow.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5345
as requested by Greg Parker. (The ppc32/Darwin dispatch loop is
different to the ppc32/Linux one, for example.)
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@4843
