- Can now handle file sizes > 65536 lines, despite the stabs format only
storing line numbers in a short. Do this heuristically, by looking for
line number sequences that go from 65000-odd to 0-odd within the same
file.
This required changing the RiLoc.lineno field to 20 bytes, which gives a
maximum file length of 1,000,000-odd lines, whichs seems reasonable.
In order to keep RiLoc at 12 bytes (important because there are lots of
them) this required stealing four bits from the RiLoc.size field,
reducing it to 12 bits. This isn't too bad because the size is unlikely
to be larger than 4096 bytes -- we were already ignoring any ones larger
than 10,000 bytes because they were suspicious anyway (and see next
point).
- Tightened up the sanity checking on line address ranges. Previously any
range that looked suspicious (eg. > 10000 bytes, or not within the bound
of the segment info) was simply ignored(!) Now it prints a warning when
this happens and truncates the size to 1 to be safe; also there are some
extra assertions for totally space-cadet numbers.
(At first these checks were all assertions, but I tried a version of GNU
gas that produces a small handful of dodgy stabs entries; warnings
seemed a reasonable compromise.)
vg_cachesim.c:
- Removed the requirement that both types of cost centre (iCC, idCC) have
instr_addr as their second word. Less fragile -- now the only
requirement is that they both have their type tag as their first byte.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@197
Discovered sometimes a SLINE stabs entry is the last one (which broke an
assertion). In such a case, we must guess the line's instruction address
range -- I've guessed 4, arbitrarily.
vg_cachegen.in, vg_cachesim_{I1,D1,L2}.c:
Discovered a bad bug in the cache simulation: when determining if a
references straddles two memory blocks, to find the end of the range I was
adding 'size' to the base address, rather than 'size - 1'. This was
causing way too many straddled references, which would inflate the miss
counts.
vg_cachesim.c:
Minor stuff
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@176
(compute_BBCC_array_size): Assertion `!is_STORE && !is_FPU_R &&
!is_FPU_W' failed.
I don't know if this is correct, but I can run kate having done so.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@171
- vg_cachesim.c
- vg_cachesim_{I1,D1,L2}.c
- vg_annotate.in
- vg_cachegen.in
Changes to existing files:
- valgrind/valgrind.in, added option:
--cachesim=no|yes [no]
- Makefile/Makefile.am:
* added vg_cachesim.c to valgrind_so_SOURCES var
* added vg_cachesim_I1.c, vg_cachesim_D1.c, vg_cachesim_L2.c to
noinst_HEADERS var
* added vg_annotate, vg_cachegen to 'bin_SCRIPTS' var, and added empty
targets for them
- vg_main.c:
* added two offsets for cache sim functions (put in positions 17a,17b)
* added option handling (detection of --cachesim=yes which turns off of
--instrument);
* added calls to cachesim initialisation/finalisation functions
- vg_mylibc: added some system call wrappers (for chmod, open_write, etc) for
file writing
- vg_symtab2.c:
* allow it to read symbols if either of --instrument or --cachesim is
used
* made vg_symtab2.c:vg_what_{line,fn}_is_this extern, renaming it as
VG_(what_line_is_this) (and added to vg_include.h)
* completely rewrote the read loop in vg_read_lib_symbols, fixing
several bugs. Much better now, although probably not perfect. It's
also relatively fragile -- I'm using the "die immediately if anything
unexpected happens" approach.
- vg_to_ucode.c:
* in VG_(disBB), patching in x86 instruction size into extra4b field of
JMP instructions at the end of basic blocks if --cachesim=yes.
Shifted things around to do this; also had to fiddle around with
single-step stuff to get this to work, by not sticking extra JMPs on
the end of the single-instruction block if there was already one
there (to avoid breaking an assertion in vg_cachesim.c). Did a
similar thing to avoid an extra JMP on huge basic blocks that are
split.
- vg_translate.c:
* if --cachesim=yes call the cachesim instrumentation phase
* made some functions extern and renamed:
allocCodeBlock() --> VG_(allocCodeBlock)()
freeCodeBlock() --> VG_(freeCodeBlock)()
copyUInstr() --> VG_(copyUInstr)()
(added to vg_include.h too)
- vg_include.c: declared
* cachesim offsets
* exports of vg_cachesim.c
* added four new profiling events (increasing VGP_M_CCS to 24 -- I kept
the spare ones)
* added comment about UInstr.extra4b field being used for instr size in
JMPs for cache simulation
- docs/manual.html:
* Added --cachesim option to section 2.5.
* Added cache profiling stuff as section 7.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@168
