The test suite support for the Power PC ISA 3.0 instructions added in
VEX commit 3244 is added in this commit.
bugzilla 364948
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15938
The original code was using the bcdadd / bcdsub instruction on the operand
shadow bits to calculate the shadow bits for the result. This introduced
non-zero bits shadow bits in the result. The shadow bits for these
instructions should be set to all valid or all invalid. If one of the
argument shadow bits was one, then all of the shadow bits of the result should
be one. Otherwise the result shadow bits should be zero.
This patch fixes the above bug in memcheck/mc_translate.c
Fixing the above bug broke the v-bit test. The issue is the v-bit tester
assumes the shadow bits for the operands of a given Iop can be set to one
for testing purposes. The implementation of the bcdadd and bcdsub was passing
a constant value for the variable ps. The ps value is an argument to the
instruction that specifies how to set the sign code of the result. The
implementation of the instructions was changed to issue the instruction with
ps=0. Then the result of the instruction is updated in the VEX code if ps=1.
This changed also results in cleaning up the vbit test code.
This patch also fixes the issues with the v-bit test program.
Valgrind commit 3218
Bugzilla 360035
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15871
Add "memory" to the clobber arguments of VALGRIND_DO_CLIENT_REQUEST_EXPR.
This fixes memcheck/tests/vbit-test/vbit-test.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15740
Power 8 instructions.
The patch for bug 354797 moved the declaration for rc outside of the
architecture #ifdef. This results in an message about rc being unused
on architectures other then s390 and powerpc. This commit eliminates
the issue by:
powerpc: move rc declaration into #ifdef for powerpc.
Remove tab, put in missing break.
s390: remove rc declaration from inside case statement. Put rc declaration
before the switch statement but within the #ifdef for s390 so it will
be declared for use in both case clauses.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15738
The ISA 2.07 support adds new Iops as well as support for some existing
Iops. None of these Iops have been enabled in the vbit tester. This commit
adds the needed support to the files in memcheck/tests/vbit-test.
These changes add support for additional immediate operands and additional
undefined bit checking functions.
There are additional changes to files VEX/priv/ir_inject.c and VEX/pub/libvex.h
that are in VEX commit 3202
Bugzilla 354797 was created for this issue.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15720
The support for the Valgrind Iops is dependent on the Power processor
support for various instructions. The instructions supported by a
given Power processor is based on the version of the ISA. The patch
add a check to the vbit-test to ensure it does not try to test an Iop
that generates an instruction on the host that is not supported.
This patch fixes bugzilla 352765.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15653
s390: Add testcase for fixbr.
Patch by Andreas Arnez <arnez@linux.vnet.ibm.com>.
Part of fixing BZ #350290.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15629
Valgrind aspects, to match vex r3124.
See bug 339778 - Linux/TileGx platform support to Valgrind
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15080
- add configure option --enable-ubsan
- add __ubsan helpers (by Julian)
This requires gcc 4.9.2 or later. Not all platforms are supported, though.
With this change and VEX r3099 regression tests pass on amd64
with a valgrind compiled with -fsanitize=undefined.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14995
This was not as straight forward as expected. Specifically, adding the
new flag to CFLAGS in configure.ac did not work and was causing
compiler warnings. For instance, compiling memcheck/tests/execve2.c will
generate a -Wnonnull warning even though the testcase is explicitly
compiled with -Wno-nonnull. The reason is that (a) -Wformat is implied by
-Wnonnull and (b) the list of compiler flags gets assembled in the wrong
order. The culprit appears to be that we modify CFLAGS in configure.ac and
that really is not the right place. Conceptually, configure should determine
tool-chain capabilities and not assemble compiler flags. That should be done
in Makefiles. This patch entangles all this.
So, whatever was added to CFLAGS in configure.ac has now been moved to
Makefile.all.am and Makefile.tool-tests.am. Those are:
-Wno-long-long
-Wwrite-strings
-Wcast-qual
-fno-stack-protector
Note, that this change allows us to simplify Makefile.tool-tests.am which
in the past was disabling some of those flags (e.g. by adding -Wno-cast-qual
again).
In case of the clang compiler, extra command line options are needed. I've
moved those into a separate 'if COMPILER_IS_CLANG' section and not merge
them into baseline flags.
Related to BZ 334727.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14798
vaddcuq, vadduqm, vaddecuq, vaddeuqm,
vsubcuq, vsubuqm, vsubecuq, vsubeuqm,
vbpermq and vgbbd.
The completes adding the Power ISA 2.07 support.
Bugzilla 325816
VEX commit id 2790
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13653
This commit adds the testcases for the following instructions:
vpmsumb, vpmsumh, vpmsumw, vpmsumd, vpermxor, vcipher, vcipherlast,
vncipher, vncipherlast, vsbox,
vclzb, vclzw, vclzh, vclzd,
vpopcntb, vpopcnth, vpopcntw, vpopcntd,
vnand, vorc, veqv,
vshasigmaw, vshasigmad,
bcdadd, bcdsub
The VEX commit that added the support for the above instructions was
commit 2789.
The patch is for Bugzilla 325628
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13646
This patch adds testcases to an existing testcase
source file to test the new instructions which were
added to VEX support in the phase 3 ISA 2.07 code patch.
The patch also makes a small change to memcheck's
vbit tester code to allow successful execution.
Signed-off-by: Maynard Johnson <maynardj@us.ibm.com>
Bugzilla 324894. Corresponding VEX commit 2779
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13594
The IBM Power ISA 2.07 has been published on power.org, and IBM's new POWER8
processor is under development to implement that ISA. This patch provides
initial runtime and testsuite support for running Valgrind on POWER8 systems
running a soon-to-be released Linux distribution. This Linux distro will
include a POWER8-tuned libc that uses a subset of the new instructions from
ISA 2.07. Since virtually all applications link with libc, it would be
impossible to run an application under Valgrind on this distro without adding
support for these new instructions to Valgrind, so that's the intent of this
patch. Note that applications built on this distro will *not* employ new POWER8
instructions by default. There are roughly 150 new instructions in the Power
ISA 2.07, including hardware transaction management (HTM). Support for these
new instructions (modulo the subset included in this bug) will be added to
Valgrind in a phased approach, similar to what we did for Power ISA 2.06.
Bugzilla 322294, VEX commit 2740
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13494
in VEX r2727 (conversion ops between binary floating point and
decimal floating point).
Patch by Maran Pakkirisamy (maranp@linux.vnet.ibm.com).
Part of fixing BZ 307113.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13428
