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Tool-side support for the new primops required by SSSE3 instructions.

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I think this is all that is required on the tools side.



git-svn-id: svn://svn.valgrind.org/valgrind/trunk@7384
This commit is contained in:
Julian Seward 2008-02-09 01:49:32 +00:00
parent 2e55cfac69
commit f377dbbba8
1 changed files with 14 additions and 0 deletions
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14
memcheck/mc_translate.c
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@ -1924,6 +1924,7 @@ IRAtom* expr2vbits_Binop ( MCEnv* mce,
case Iop_SarN32x2:
case Iop_ShlN16x4:
case Iop_ShlN32x2:
case Iop_ShlN8x8:
/* Same scheme as with all other shifts. */
complainIfUndefined(mce, atom2);
return assignNew(mce, Ity_I64, binop(op, vatom1, atom2));
@ -1963,6 +1964,7 @@ IRAtom* expr2vbits_Binop ( MCEnv* mce,
return binary16Ix4(mce, vatom1, vatom2);
case Iop_Sub32x2:
case Iop_Mul32x2:
case Iop_CmpGT32Sx2:
case Iop_CmpEQ32x2:
case Iop_Add32x2:
@ -1975,8 +1977,20 @@ IRAtom* expr2vbits_Binop ( MCEnv* mce,
case Iop_InterleaveHI32x2:
case Iop_InterleaveHI16x4:
case Iop_InterleaveHI8x8:
case Iop_CatOddLanes16x4:
case Iop_CatEvenLanes16x4:
return assignNew(mce, Ity_I64, binop(op, vatom1, vatom2));
/* Perm8x8: rearrange values in left arg using steering values
from right arg. So rearrange the vbits in the same way but
pessimise wrt steering values. */
case Iop_Perm8x8:
return mkUifU64(
mce,
assignNew(mce, Ity_I64, binop(op, vatom1, atom2)),
mkPCast8x8(mce, vatom2)
);
/* V128-bit SIMD */
case Iop_ShrN16x8: