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https://github.com/Zenithsiz/ftmemsim-valgrind.git
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Set fpscr back to a known state after running generated code (64-bit mode).
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5615
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@@ -432,19 +432,15 @@ VG_(run_innerloop__dispatch_profiled):
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/* We're leaving. Check that nobody messed with
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VSCR or FPSCR. */
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/* This check avoidance may be removable if stfiwx is
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implemented. */
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# if 0 //!defined(ENABLE_INNER)
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/* Check FPSCR & 0xFF == 0 (lowest 8bits are controls) */
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mffs 4 /* fpscr -> fpr */
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li 5,144 /* => 96(parent_sp) */
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stfiwx 4,5,1 /* fpr to stack */
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lwzx 6,5,1 /* load to gpr */
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andi. 6,6,0xFF /* mask wanted bits */
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cmplwi 6,0x0 /* cmp with zero */
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bne .invariant_violation /* branch if not zero */
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# endif
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/* Set fpscr back to a known state, since vex-generated code
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may have messed with fpscr[rm]. */
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li 5,0
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addi 1,1,-16
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stw 5,0(1)
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lfs 3,0(1)
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addi 1,1,16
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mtfsf 0xFF,3 /* fpscr = f3 */
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/* Using r11 - value used again further on, so don't trash! */
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ld 11,.tocent__vgPlain_machine_ppc64_has_VMX@toc(2)
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ld 11,0(11)
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