mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-03 18:13:01 +00:00
Teach DRD about IRLoadG and IRStoreG. Includes small bug fix from
trunk r13209. git-svn-id: svn://svn.valgrind.org/valgrind/branches/COMEM@13210
This commit is contained in:
Julian Seward
parent
701d76bca9
commit
eca44c4855
@ -312,7 +312,7 @@ static Bool is_stack_access(IRSB* const bb, IRExpr* const addr_expr)
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if (addr_expr->tag == Iex_RdTmp)
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{
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int i;
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for (i = 0; i < bb->stmts_size; i++)
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for (i = 0; i < bb->stmts_used; i++)
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{
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if (bb->stmts[i]
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&& bb->stmts[i]->tag == Ist_WrTmp
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@ -344,21 +344,22 @@ static const IROp u_widen_irop[5][9] = {
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* Instrument the client code to trace a memory load (--trace-addr).
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*/
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static IRExpr* instr_trace_mem_load(IRSB* const bb, IRExpr* addr_expr,
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const HWord size)
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const HWord size,
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IRExpr* const guard/* NULL => True */)
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{
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IRTemp tmp;
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tmp = newIRTemp(bb->tyenv, typeOfIRExpr(bb->tyenv, addr_expr));
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addStmtToIRSB(bb, IRStmt_WrTmp(tmp, addr_expr));
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addr_expr = IRExpr_RdTmp(tmp);
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addStmtToIRSB(bb,
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IRStmt_Dirty(
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unsafeIRDirty_0_N(/*regparms*/2,
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"drd_trace_mem_load",
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VG_(fnptr_to_fnentry)
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(drd_trace_mem_load),
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mkIRExprVec_2(addr_expr, mkIRExpr_HWord(size)))));
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IRDirty* di
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= unsafeIRDirty_0_N(/*regparms*/2,
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"drd_trace_mem_load",
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VG_(fnptr_to_fnentry)
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(drd_trace_mem_load),
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mkIRExprVec_2(addr_expr, mkIRExpr_HWord(size)));
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if (guard) di->guard = guard;
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addStmtToIRSB(bb, IRStmt_Dirty(di));
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return addr_expr;
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}
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@ -367,7 +368,8 @@ static IRExpr* instr_trace_mem_load(IRSB* const bb, IRExpr* addr_expr,
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* Instrument the client code to trace a memory store (--trace-addr).
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*/
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static void instr_trace_mem_store(IRSB* const bb, IRExpr* const addr_expr,
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IRExpr* data_expr_hi, IRExpr* data_expr_lo)
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IRExpr* data_expr_hi, IRExpr* data_expr_lo,
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IRExpr* const guard/* NULL => True */)
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{
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IRType ty_data_expr;
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HWord size;
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@ -453,18 +455,20 @@ static void instr_trace_mem_store(IRSB* const bb, IRExpr* const addr_expr,
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data_expr_lo = mkIRExpr_HWord(0);
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}
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}
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addStmtToIRSB(bb,
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IRStmt_Dirty(
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unsafeIRDirty_0_N(/*regparms*/3,
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"drd_trace_mem_store",
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VG_(fnptr_to_fnentry)(drd_trace_mem_store),
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mkIRExprVec_4(addr_expr, mkIRExpr_HWord(size),
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data_expr_hi ? data_expr_hi
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: mkIRExpr_HWord(0), data_expr_lo))));
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IRDirty* di
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= unsafeIRDirty_0_N(/*regparms*/3,
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"drd_trace_mem_store",
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VG_(fnptr_to_fnentry)(drd_trace_mem_store),
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mkIRExprVec_4(addr_expr, mkIRExpr_HWord(size),
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data_expr_hi ? data_expr_hi
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: mkIRExpr_HWord(0), data_expr_lo));
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if (guard) di->guard = guard;
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addStmtToIRSB(bb, IRStmt_Dirty(di) );
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}
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static void instrument_load(IRSB* const bb, IRExpr* const addr_expr,
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const HWord size)
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const HWord size,
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IRExpr* const guard/* NULL => True */)
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{
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IRExpr* size_expr;
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IRExpr** argv;
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@ -512,11 +516,13 @@ static void instrument_load(IRSB* const bb, IRExpr* const addr_expr,
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argv);
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break;
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}
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if (guard) di->guard = guard;
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addStmtToIRSB(bb, IRStmt_Dirty(di));
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}
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static void instrument_store(IRSB* const bb, IRExpr* addr_expr,
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IRExpr* const data_expr)
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IRExpr* const data_expr,
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IRExpr* const guard_expr/* NULL => True */)
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{
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IRExpr* size_expr;
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IRExpr** argv;
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@ -529,7 +535,7 @@ static void instrument_store(IRSB* const bb, IRExpr* addr_expr,
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IRTemp tmp = newIRTemp(bb->tyenv, typeOfIRExpr(bb->tyenv, addr_expr));
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addStmtToIRSB(bb, IRStmt_WrTmp(tmp, addr_expr));
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addr_expr = IRExpr_RdTmp(tmp);
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instr_trace_mem_store(bb, addr_expr, NULL, data_expr);
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instr_trace_mem_store(bb, addr_expr, NULL, data_expr, guard_expr);
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}
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if (!s_check_stack_accesses && is_stack_access(bb, addr_expr))
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@ -574,6 +580,7 @@ static void instrument_store(IRSB* const bb, IRExpr* addr_expr,
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argv);
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break;
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}
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if (guard_expr) di->guard = guard_expr;
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addStmtToIRSB(bb, IRStmt_Dirty(di));
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}
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@ -631,10 +638,38 @@ IRSB* DRD_(instrument)(VgCallbackClosure* const closure,
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case Ist_Store:
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if (instrument)
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instrument_store(bb, st->Ist.Store.addr, st->Ist.Store.data);
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instrument_store(bb, st->Ist.Store.addr, st->Ist.Store.data,
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NULL/* no guard */);
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addStmtToIRSB(bb, st);
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break;
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case Ist_StoreG: {
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IRStoreG* sg = st->Ist.StoreG.details;
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IRExpr* data = sg->data;
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IRExpr* addr = sg->addr;
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if (instrument)
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instrument_store(bb, addr, data, sg->guard);
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addStmtToIRSB(bb, st);
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break;
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}
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case Ist_LoadG: {
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IRLoadG* lg = st->Ist.LoadG.details;
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IRType type = Ity_INVALID; /* loaded type */
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IRType typeWide = Ity_INVALID; /* after implicit widening */
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IRExpr* addr_expr = lg->addr;
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typeOfIRLoadGOp(lg->cvt, &typeWide, &type);
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tl_assert(type != Ity_INVALID);
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if (UNLIKELY(DRD_(any_address_is_traced)())) {
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addr_expr = instr_trace_mem_load(bb, addr_expr,
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sizeofIRType(type), lg->guard);
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}
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instrument_load(bb, lg->addr,
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sizeofIRType(type), lg->guard);
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addStmtToIRSB(bb, st);
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break;
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}
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case Ist_WrTmp:
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if (instrument) {
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const IRExpr* const data = st->Ist.WrTmp.data;
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@ -642,10 +677,12 @@ IRSB* DRD_(instrument)(VgCallbackClosure* const closure,
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if (data->tag == Iex_Load) {
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if (UNLIKELY(DRD_(any_address_is_traced)())) {
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addr_expr = instr_trace_mem_load(bb, addr_expr,
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sizeofIRType(data->Iex.Load.ty));
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sizeofIRType(data->Iex.Load.ty),
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NULL/* no guard */);
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}
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instrument_load(bb, data->Iex.Load.addr,
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sizeofIRType(data->Iex.Load.ty));
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sizeofIRType(data->Iex.Load.ty),
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NULL/* no guard */);
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}
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}
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addStmtToIRSB(bb, st);
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@ -709,9 +746,10 @@ IRSB* DRD_(instrument)(VgCallbackClosure* const closure,
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dataSize *= 2; /* since it's a doubleword-CAS */
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if (UNLIKELY(DRD_(any_address_is_traced)()))
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instr_trace_mem_store(bb, cas->addr, cas->dataHi, cas->dataLo);
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instr_trace_mem_store(bb, cas->addr, cas->dataHi, cas->dataLo,
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NULL/* no guard */);
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instrument_load(bb, cas->addr, dataSize);
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instrument_load(bb, cas->addr, dataSize, NULL/*no guard*/);
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}
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addStmtToIRSB(bb, st);
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break;
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@ -730,14 +768,17 @@ IRSB* DRD_(instrument)(VgCallbackClosure* const closure,
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IRExpr* addr_expr = st->Ist.LLSC.addr;
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if (UNLIKELY(DRD_(any_address_is_traced)()))
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addr_expr = instr_trace_mem_load(bb, addr_expr,
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sizeofIRType(dataTy));
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sizeofIRType(dataTy),
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NULL /* no guard */);
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instrument_load(bb, addr_expr, sizeofIRType(dataTy));
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instrument_load(bb, addr_expr, sizeofIRType(dataTy),
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NULL/*no guard*/);
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}
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} else {
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/* SC */
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instr_trace_mem_store(bb, st->Ist.LLSC.addr, NULL,
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st->Ist.LLSC.storedata);
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st->Ist.LLSC.storedata,
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NULL/* no guard */);
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}
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addStmtToIRSB(bb, st);
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break;
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