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Move the decoding of SFENCE out of the SSE only part of disInstr as it
exists on Athlon's that have MMXEXT support and those don't have SSE state so won't decode it where it was. CCMAIL: 85947-done@bugs.kde.org git-svn-id: svn://svn.valgrind.org/valgrind/trunk@2524
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@ -3984,17 +3984,17 @@ static Addr disInstr ( UCodeBlock* cb, Addr eip, Bool* isEnd )
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goto decode_success;
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}
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/* LFENCE/MFENCE/SFENCE -- flush pending operations to memory */
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/* LFENCE/MFENCE -- flush pending operations to memory */
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if (insn[0] == 0x0F && insn[1] == 0xAE
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&& (epartIsReg(insn[2]))
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&& (gregOfRM(insn[2]) >= 5 && gregOfRM(insn[2]) <= 7))
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&& (gregOfRM(insn[2]) >= 5 && gregOfRM(insn[2]) <= 6))
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{
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vg_assert(sz == 4);
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eip += 3;
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uInstr2(cb, SSE3, 0, /* ignore sz for internal ops */
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Lit16, (((UShort)0x0F) << 8) | (UShort)0xAE,
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Lit16, (UShort)insn[2] );
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DIP("sfence\n");
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DIP("%sfence\n", gregOfRM(insn[2]) == 5 ? "l" : "m");
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goto decode_success;
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}
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@ -6852,6 +6852,22 @@ static Addr disInstr ( UCodeBlock* cb, Addr eip, Bool* isEnd )
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}
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break;
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case 0xAE: /* SFENCE */
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vg_assert(sz == 4);
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modrm = getUChar(eip);
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if (!epartIsReg(modrm)) {
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goto decode_failure;
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}
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if (gregOfRM(modrm) != 7) {
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goto decode_failure;
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}
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eip += lengthAMode(eip);
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uInstr2(cb, SSE3, 0, /* ignore sz for internal ops */
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Lit16, (((UShort)0x0F) << 8) | (UShort)0xAE,
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Lit16, (UShort)modrm );
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DIP("sfence\n");
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break;
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case 0x71: case 0x72: case 0x73: {
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/* (sz==4): PSLL/PSRA/PSRL mmxreg by imm8 */
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/* (sz==2): PSLL/PSRA/PSRL xmmreg by imm8 */
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