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More use of LibVEX_GUEST_STATE_ALIGN.

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git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14931
This commit is contained in:
Florian Krohm 2015-02-13 17:05:57 +00:00
parent 493dd569d2
commit cf6190cb37
2 changed files with 13 additions and 13 deletions
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20
coregrind/m_scheduler/scheduler.c
View File

@ -691,8 +691,8 @@ void VG_(scheduler_init_phase2) ( ThreadId tid_main,
layout requirements. See libvex.h for details, but in short the
requirements are: There must be no holes in between the primary
guest state, its two copies, and the spill area. In short, all 4
areas must have a 16-aligned size and be 16-aligned, and placed
back-to-back. */
areas must be aligned on the LibVEX_GUEST_STATE_ALIGN boundary and
be placed back-to-back without holes in between. */
static void do_pre_run_checks ( volatile ThreadState* tst )
{
Addr a_vex = (Addr) & tst->arch.vex;
@ -712,15 +712,15 @@ static void do_pre_run_checks ( volatile ThreadState* tst )
(void*)a_vexsh2, sz_vexsh2,
(void*)a_spill, sz_spill );
vg_assert(VG_IS_16_ALIGNED(sz_vex));
vg_assert(VG_IS_16_ALIGNED(sz_vexsh1));
vg_assert(VG_IS_16_ALIGNED(sz_vexsh2));
vg_assert(VG_IS_16_ALIGNED(sz_spill));
vg_assert(sz_vex % LibVEX_GUEST_STATE_ALIGN == 0);
vg_assert(sz_vexsh1 % LibVEX_GUEST_STATE_ALIGN == 0);
vg_assert(sz_vexsh2 % LibVEX_GUEST_STATE_ALIGN == 0);
vg_assert(sz_spill % LibVEX_GUEST_STATE_ALIGN == 0);
vg_assert(VG_IS_16_ALIGNED(a_vex));
vg_assert(VG_IS_16_ALIGNED(a_vexsh1));
vg_assert(VG_IS_16_ALIGNED(a_vexsh2));
vg_assert(VG_IS_16_ALIGNED(a_spill));
vg_assert(a_vex % LibVEX_GUEST_STATE_ALIGN == 0);
vg_assert(a_vexsh1 % LibVEX_GUEST_STATE_ALIGN == 0);
vg_assert(a_vexsh2 % LibVEX_GUEST_STATE_ALIGN == 0);
vg_assert(a_spill % LibVEX_GUEST_STATE_ALIGN == 0);
/* Check that the guest state and its two shadows have the same
size, and that there are no holes in between. The latter is

6
coregrind/pub_core_threadstate.h
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@ -92,9 +92,9 @@ typedef
/* Note that for code generation reasons, we require that the
guest state area, its two shadows, and the spill area, are
16-aligned and have 16-aligned sizes, and there are no holes
in between. This is checked by do_pre_run_checks() in
scheduler.c. */
aligned on LibVEX_GUEST_STATE_ALIGN and have sizes, such that
there are no holes in between. This is checked by do_pre_run_checks()
in scheduler.c. */
/* Saved machine context. */
VexGuestArchState vex __attribute__((aligned(LibVEX_GUEST_STATE_ALIGN)));