mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-03 18:13:01 +00:00
Extended instruction test system to handle x87 floating point instructions
and started working on adding tests for the x87 instruction set. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@2338
This commit is contained in:
Tom Hughes
parent
6b76249c5c
commit
cd101bf7b2
@ -1,6 +1,6 @@
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noinst_SCRIPTS = filter_stderr
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INSN_TESTS=insn_basic insn_cmov insn_mmx insn_mmxext insn_sse insn_sse2
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INSN_TESTS=insn_basic insn_fpu insn_cmov insn_mmx insn_mmxext insn_sse insn_sse2
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EXTRA_DIST = $(noinst_SCRIPTS) \
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badrw.stderr.exp badrw.vgtest \
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0
addrcheck/tests/insn_fpu.stderr.exp
Normal file
0
addrcheck/tests/insn_fpu.stderr.exp
Normal file
183
addrcheck/tests/insn_fpu.stdout.exp
Normal file
183
addrcheck/tests/insn_fpu.stdout.exp
Normal file
@ -0,0 +1,183 @@
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fabs_1 ... ok
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fabs_2 ... ok
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fabs_3 ... ok
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fabs_4 ... ok
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fadds_1 ... ok
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fadds_2 ... ok
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fadds_3 ... ok
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fadds_4 ... ok
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faddl_1 ... ok
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faddl_2 ... ok
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faddl_3 ... ok
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faddl_4 ... ok
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fadd_1 ... ok
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fadd_2 ... ok
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fadd_3 ... ok
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fadd_4 ... ok
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fadd_5 ... ok
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fadd_6 ... ok
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fadd_7 ... ok
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fadd_8 ... ok
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fadd_9 ... ok
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fadd_10 ... ok
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fadd_11 ... ok
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fadd_12 ... ok
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fadd_13 ... ok
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fadd_14 ... ok
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fadd_15 ... ok
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fadd_16 ... ok
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faddp_1 ... ok
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faddp_2 ... ok
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faddp_3 ... ok
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faddp_4 ... ok
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faddp_5 ... ok
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faddp_6 ... ok
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faddp_7 ... ok
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faddp_8 ... ok
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faddp_9 ... ok
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faddp_10 ... ok
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faddp_11 ... ok
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faddp_12 ... ok
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faddp_13 ... ok
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faddp_14 ... ok
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faddp_15 ... ok
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faddp_16 ... ok
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fiadds_1 ... ok
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fiadds_2 ... ok
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fiadds_3 ... ok
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fiadds_4 ... ok
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fiadds_5 ... ok
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fiadds_6 ... ok
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fiadds_7 ... ok
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fiadds_8 ... ok
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fiaddl_1 ... ok
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fiaddl_2 ... ok
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fiaddl_3 ... ok
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fiaddl_4 ... ok
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fiaddl_5 ... ok
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fiaddl_6 ... ok
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fiaddl_7 ... ok
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fiaddl_8 ... ok
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fchs_1 ... ok
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fchs_2 ... ok
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fchs_3 ... ok
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fchs_4 ... ok
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fld1_1 ... ok
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fldl2t_1 ... ok
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fldl2e_1 ... ok
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fldpi_1 ... ok
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fldlg2_1 ... ok
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fldln2_1 ... ok
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fldz_1 ... ok
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fsubs_1 ... ok
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fsubs_2 ... ok
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fsubs_3 ... ok
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fsubs_4 ... ok
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fsubl_1 ... ok
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fsubl_2 ... ok
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fsubl_3 ... ok
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fsubl_4 ... ok
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fsub_1 ... ok
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fsub_2 ... ok
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fsub_3 ... ok
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fsub_4 ... ok
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fsub_5 ... ok
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fsub_6 ... ok
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fsub_7 ... ok
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fsub_8 ... ok
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fsub_9 ... ok
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fsub_10 ... ok
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fsub_11 ... ok
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fsub_12 ... ok
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fsub_13 ... ok
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fsub_14 ... ok
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fsub_15 ... ok
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fsub_16 ... ok
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fsubp_1 ... ok
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fsubp_2 ... ok
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fsubp_3 ... ok
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fsubp_4 ... ok
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fsubp_5 ... ok
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fsubp_6 ... ok
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fsubp_7 ... ok
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fsubp_8 ... ok
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fsubp_9 ... ok
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fsubp_10 ... ok
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fsubp_11 ... ok
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fsubp_12 ... ok
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fsubp_13 ... ok
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fsubp_14 ... ok
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fsubp_15 ... ok
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fsubp_16 ... ok
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fisubs_1 ... ok
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fisubs_2 ... ok
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fisubs_3 ... ok
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fisubs_4 ... ok
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fisubs_5 ... ok
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fisubs_6 ... ok
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fisubs_7 ... ok
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fisubs_8 ... ok
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fisubl_1 ... ok
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fisubl_2 ... ok
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fisubl_3 ... ok
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fisubl_4 ... ok
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fisubl_5 ... ok
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fisubl_6 ... ok
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fisubl_7 ... ok
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fisubl_8 ... ok
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fsubrs_1 ... ok
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fsubrs_2 ... ok
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fsubrs_3 ... ok
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fsubrs_4 ... ok
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fsubrl_1 ... ok
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fsubrl_2 ... ok
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fsubrl_3 ... ok
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fsubrl_4 ... ok
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fsubr_1 ... ok
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fsubr_2 ... ok
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fsubr_3 ... ok
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fsubr_4 ... ok
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fsubr_5 ... ok
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fsubr_6 ... ok
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fsubr_7 ... ok
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fsubr_8 ... ok
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fsubr_9 ... ok
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fsubr_10 ... ok
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fsubr_11 ... ok
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fsubr_12 ... ok
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fsubr_13 ... ok
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fsubr_14 ... ok
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fsubr_15 ... ok
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fsubr_16 ... ok
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fsubrp_1 ... ok
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fsubrp_2 ... ok
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fsubrp_3 ... ok
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fsubrp_4 ... ok
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fsubrp_5 ... ok
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fsubrp_6 ... ok
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fsubrp_7 ... ok
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fsubrp_8 ... ok
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fsubrp_9 ... ok
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fsubrp_10 ... ok
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fsubrp_11 ... ok
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fsubrp_12 ... ok
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fsubrp_13 ... ok
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fsubrp_14 ... ok
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fsubrp_15 ... ok
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fsubrp_16 ... ok
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fisubrs_1 ... ok
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fisubrs_2 ... ok
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fisubrs_3 ... ok
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fisubrs_4 ... ok
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fisubrs_5 ... ok
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fisubrs_6 ... ok
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fisubrs_7 ... ok
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fisubrs_8 ... ok
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fisubrl_1 ... ok
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fisubrl_2 ... ok
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fisubrl_3 ... ok
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fisubrl_4 ... ok
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fisubrl_5 ... ok
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fisubrl_6 ... ok
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fisubrl_7 ... ok
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fisubrl_8 ... ok
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3
addrcheck/tests/insn_fpu.vgtest
Normal file
3
addrcheck/tests/insn_fpu.vgtest
Normal file
@ -0,0 +1,3 @@
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vgopts: -q
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prog: ../../none/tests/insn_fpu
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cpu_test: fpu
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@ -1,6 +1,6 @@
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noinst_SCRIPTS = filter_stderr filter_cachesim_discards
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INSN_TESTS=insn_basic insn_cmov insn_mmx insn_mmxext insn_sse insn_sse2
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INSN_TESTS=insn_basic insn_fpu insn_cmov insn_mmx insn_mmxext insn_sse insn_sse2
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EXTRA_DIST = $(noinst_SCRIPTS) \
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chdir.vgtest chdir.stderr.exp \
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0
cachegrind/tests/insn_fpu.stderr.exp
Normal file
0
cachegrind/tests/insn_fpu.stderr.exp
Normal file
183
cachegrind/tests/insn_fpu.stdout.exp
Normal file
183
cachegrind/tests/insn_fpu.stdout.exp
Normal file
@ -0,0 +1,183 @@
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fabs_1 ... ok
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fabs_2 ... ok
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fabs_3 ... ok
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fabs_4 ... ok
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fadds_1 ... ok
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fadds_2 ... ok
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fadds_3 ... ok
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fadds_4 ... ok
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faddl_1 ... ok
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faddl_2 ... ok
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faddl_3 ... ok
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faddl_4 ... ok
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fadd_1 ... ok
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fadd_2 ... ok
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fadd_3 ... ok
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fadd_4 ... ok
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fadd_5 ... ok
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fadd_6 ... ok
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fadd_7 ... ok
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fadd_8 ... ok
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fadd_9 ... ok
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fadd_10 ... ok
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fadd_11 ... ok
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fadd_12 ... ok
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fadd_13 ... ok
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fadd_14 ... ok
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fadd_15 ... ok
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fadd_16 ... ok
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faddp_1 ... ok
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faddp_2 ... ok
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faddp_3 ... ok
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faddp_4 ... ok
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faddp_5 ... ok
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faddp_6 ... ok
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faddp_7 ... ok
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faddp_8 ... ok
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faddp_9 ... ok
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faddp_10 ... ok
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faddp_11 ... ok
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faddp_12 ... ok
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faddp_13 ... ok
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faddp_14 ... ok
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faddp_15 ... ok
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faddp_16 ... ok
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fiadds_1 ... ok
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fiadds_2 ... ok
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fiadds_3 ... ok
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fiadds_4 ... ok
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fiadds_5 ... ok
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fiadds_6 ... ok
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fiadds_7 ... ok
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fiadds_8 ... ok
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fiaddl_1 ... ok
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fiaddl_2 ... ok
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fiaddl_3 ... ok
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fiaddl_4 ... ok
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fiaddl_5 ... ok
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fiaddl_6 ... ok
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fiaddl_7 ... ok
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fiaddl_8 ... ok
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fchs_1 ... ok
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fchs_2 ... ok
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fchs_3 ... ok
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fchs_4 ... ok
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fld1_1 ... ok
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fldl2t_1 ... ok
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fldl2e_1 ... ok
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fldpi_1 ... ok
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fldlg2_1 ... ok
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fldln2_1 ... ok
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fldz_1 ... ok
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fsubs_1 ... ok
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fsubs_2 ... ok
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fsubs_3 ... ok
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fsubs_4 ... ok
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fsubl_1 ... ok
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fsubl_2 ... ok
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fsubl_3 ... ok
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fsubl_4 ... ok
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fsub_1 ... ok
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fsub_2 ... ok
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fsub_3 ... ok
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fsub_4 ... ok
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fsub_5 ... ok
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fsub_6 ... ok
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fsub_7 ... ok
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fsub_8 ... ok
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fsub_9 ... ok
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fsub_10 ... ok
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fsub_11 ... ok
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fsub_12 ... ok
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fsub_13 ... ok
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fsub_14 ... ok
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fsub_15 ... ok
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fsub_16 ... ok
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fsubp_1 ... ok
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fsubp_2 ... ok
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fsubp_3 ... ok
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fsubp_4 ... ok
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fsubp_5 ... ok
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fsubp_6 ... ok
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fsubp_7 ... ok
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fsubp_8 ... ok
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fsubp_9 ... ok
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fsubp_10 ... ok
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fsubp_11 ... ok
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fsubp_12 ... ok
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fsubp_13 ... ok
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fsubp_14 ... ok
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fsubp_15 ... ok
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fsubp_16 ... ok
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fisubs_1 ... ok
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fisubs_2 ... ok
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fisubs_3 ... ok
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fisubs_4 ... ok
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fisubs_5 ... ok
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fisubs_6 ... ok
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fisubs_7 ... ok
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fisubs_8 ... ok
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fisubl_1 ... ok
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fisubl_2 ... ok
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fisubl_3 ... ok
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fisubl_4 ... ok
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fisubl_5 ... ok
|
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fisubl_6 ... ok
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fisubl_7 ... ok
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fisubl_8 ... ok
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fsubrs_1 ... ok
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fsubrs_2 ... ok
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fsubrs_3 ... ok
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fsubrs_4 ... ok
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fsubrl_1 ... ok
|
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fsubrl_2 ... ok
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fsubrl_3 ... ok
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fsubrl_4 ... ok
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fsubr_1 ... ok
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fsubr_2 ... ok
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fsubr_3 ... ok
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fsubr_4 ... ok
|
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fsubr_5 ... ok
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fsubr_6 ... ok
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fsubr_7 ... ok
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fsubr_8 ... ok
|
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fsubr_9 ... ok
|
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fsubr_10 ... ok
|
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fsubr_11 ... ok
|
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fsubr_12 ... ok
|
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fsubr_13 ... ok
|
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fsubr_14 ... ok
|
||||
fsubr_15 ... ok
|
||||
fsubr_16 ... ok
|
||||
fsubrp_1 ... ok
|
||||
fsubrp_2 ... ok
|
||||
fsubrp_3 ... ok
|
||||
fsubrp_4 ... ok
|
||||
fsubrp_5 ... ok
|
||||
fsubrp_6 ... ok
|
||||
fsubrp_7 ... ok
|
||||
fsubrp_8 ... ok
|
||||
fsubrp_9 ... ok
|
||||
fsubrp_10 ... ok
|
||||
fsubrp_11 ... ok
|
||||
fsubrp_12 ... ok
|
||||
fsubrp_13 ... ok
|
||||
fsubrp_14 ... ok
|
||||
fsubrp_15 ... ok
|
||||
fsubrp_16 ... ok
|
||||
fisubrs_1 ... ok
|
||||
fisubrs_2 ... ok
|
||||
fisubrs_3 ... ok
|
||||
fisubrs_4 ... ok
|
||||
fisubrs_5 ... ok
|
||||
fisubrs_6 ... ok
|
||||
fisubrs_7 ... ok
|
||||
fisubrs_8 ... ok
|
||||
fisubrl_1 ... ok
|
||||
fisubrl_2 ... ok
|
||||
fisubrl_3 ... ok
|
||||
fisubrl_4 ... ok
|
||||
fisubrl_5 ... ok
|
||||
fisubrl_6 ... ok
|
||||
fisubrl_7 ... ok
|
||||
fisubrl_8 ... ok
|
||||
3
cachegrind/tests/insn_fpu.vgtest
Normal file
3
cachegrind/tests/insn_fpu.vgtest
Normal file
@ -0,0 +1,3 @@
|
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vgopts: -q
|
||||
prog: ../../none/tests/insn_fpu
|
||||
cpu_test: fpu
|
||||
@ -1,6 +1,6 @@
|
||||
noinst_SCRIPTS = filter_stderr
|
||||
|
||||
INSN_TESTS=insn_basic insn_cmov insn_mmx insn_mmxext insn_sse insn_sse2
|
||||
INSN_TESTS=insn_basic insn_fpu insn_cmov insn_mmx insn_mmxext insn_sse insn_sse2
|
||||
|
||||
EXTRA_DIST = $(noinst_SCRIPTS) \
|
||||
allok.stderr.exp allok.vgtest \
|
||||
|
||||
0
helgrind/tests/insn_fpu.stderr.exp
Normal file
0
helgrind/tests/insn_fpu.stderr.exp
Normal file
183
helgrind/tests/insn_fpu.stdout.exp
Normal file
183
helgrind/tests/insn_fpu.stdout.exp
Normal file
@ -0,0 +1,183 @@
|
||||
fabs_1 ... ok
|
||||
fabs_2 ... ok
|
||||
fabs_3 ... ok
|
||||
fabs_4 ... ok
|
||||
fadds_1 ... ok
|
||||
fadds_2 ... ok
|
||||
fadds_3 ... ok
|
||||
fadds_4 ... ok
|
||||
faddl_1 ... ok
|
||||
faddl_2 ... ok
|
||||
faddl_3 ... ok
|
||||
faddl_4 ... ok
|
||||
fadd_1 ... ok
|
||||
fadd_2 ... ok
|
||||
fadd_3 ... ok
|
||||
fadd_4 ... ok
|
||||
fadd_5 ... ok
|
||||
fadd_6 ... ok
|
||||
fadd_7 ... ok
|
||||
fadd_8 ... ok
|
||||
fadd_9 ... ok
|
||||
fadd_10 ... ok
|
||||
fadd_11 ... ok
|
||||
fadd_12 ... ok
|
||||
fadd_13 ... ok
|
||||
fadd_14 ... ok
|
||||
fadd_15 ... ok
|
||||
fadd_16 ... ok
|
||||
faddp_1 ... ok
|
||||
faddp_2 ... ok
|
||||
faddp_3 ... ok
|
||||
faddp_4 ... ok
|
||||
faddp_5 ... ok
|
||||
faddp_6 ... ok
|
||||
faddp_7 ... ok
|
||||
faddp_8 ... ok
|
||||
faddp_9 ... ok
|
||||
faddp_10 ... ok
|
||||
faddp_11 ... ok
|
||||
faddp_12 ... ok
|
||||
faddp_13 ... ok
|
||||
faddp_14 ... ok
|
||||
faddp_15 ... ok
|
||||
faddp_16 ... ok
|
||||
fiadds_1 ... ok
|
||||
fiadds_2 ... ok
|
||||
fiadds_3 ... ok
|
||||
fiadds_4 ... ok
|
||||
fiadds_5 ... ok
|
||||
fiadds_6 ... ok
|
||||
fiadds_7 ... ok
|
||||
fiadds_8 ... ok
|
||||
fiaddl_1 ... ok
|
||||
fiaddl_2 ... ok
|
||||
fiaddl_3 ... ok
|
||||
fiaddl_4 ... ok
|
||||
fiaddl_5 ... ok
|
||||
fiaddl_6 ... ok
|
||||
fiaddl_7 ... ok
|
||||
fiaddl_8 ... ok
|
||||
fchs_1 ... ok
|
||||
fchs_2 ... ok
|
||||
fchs_3 ... ok
|
||||
fchs_4 ... ok
|
||||
fld1_1 ... ok
|
||||
fldl2t_1 ... ok
|
||||
fldl2e_1 ... ok
|
||||
fldpi_1 ... ok
|
||||
fldlg2_1 ... ok
|
||||
fldln2_1 ... ok
|
||||
fldz_1 ... ok
|
||||
fsubs_1 ... ok
|
||||
fsubs_2 ... ok
|
||||
fsubs_3 ... ok
|
||||
fsubs_4 ... ok
|
||||
fsubl_1 ... ok
|
||||
fsubl_2 ... ok
|
||||
fsubl_3 ... ok
|
||||
fsubl_4 ... ok
|
||||
fsub_1 ... ok
|
||||
fsub_2 ... ok
|
||||
fsub_3 ... ok
|
||||
fsub_4 ... ok
|
||||
fsub_5 ... ok
|
||||
fsub_6 ... ok
|
||||
fsub_7 ... ok
|
||||
fsub_8 ... ok
|
||||
fsub_9 ... ok
|
||||
fsub_10 ... ok
|
||||
fsub_11 ... ok
|
||||
fsub_12 ... ok
|
||||
fsub_13 ... ok
|
||||
fsub_14 ... ok
|
||||
fsub_15 ... ok
|
||||
fsub_16 ... ok
|
||||
fsubp_1 ... ok
|
||||
fsubp_2 ... ok
|
||||
fsubp_3 ... ok
|
||||
fsubp_4 ... ok
|
||||
fsubp_5 ... ok
|
||||
fsubp_6 ... ok
|
||||
fsubp_7 ... ok
|
||||
fsubp_8 ... ok
|
||||
fsubp_9 ... ok
|
||||
fsubp_10 ... ok
|
||||
fsubp_11 ... ok
|
||||
fsubp_12 ... ok
|
||||
fsubp_13 ... ok
|
||||
fsubp_14 ... ok
|
||||
fsubp_15 ... ok
|
||||
fsubp_16 ... ok
|
||||
fisubs_1 ... ok
|
||||
fisubs_2 ... ok
|
||||
fisubs_3 ... ok
|
||||
fisubs_4 ... ok
|
||||
fisubs_5 ... ok
|
||||
fisubs_6 ... ok
|
||||
fisubs_7 ... ok
|
||||
fisubs_8 ... ok
|
||||
fisubl_1 ... ok
|
||||
fisubl_2 ... ok
|
||||
fisubl_3 ... ok
|
||||
fisubl_4 ... ok
|
||||
fisubl_5 ... ok
|
||||
fisubl_6 ... ok
|
||||
fisubl_7 ... ok
|
||||
fisubl_8 ... ok
|
||||
fsubrs_1 ... ok
|
||||
fsubrs_2 ... ok
|
||||
fsubrs_3 ... ok
|
||||
fsubrs_4 ... ok
|
||||
fsubrl_1 ... ok
|
||||
fsubrl_2 ... ok
|
||||
fsubrl_3 ... ok
|
||||
fsubrl_4 ... ok
|
||||
fsubr_1 ... ok
|
||||
fsubr_2 ... ok
|
||||
fsubr_3 ... ok
|
||||
fsubr_4 ... ok
|
||||
fsubr_5 ... ok
|
||||
fsubr_6 ... ok
|
||||
fsubr_7 ... ok
|
||||
fsubr_8 ... ok
|
||||
fsubr_9 ... ok
|
||||
fsubr_10 ... ok
|
||||
fsubr_11 ... ok
|
||||
fsubr_12 ... ok
|
||||
fsubr_13 ... ok
|
||||
fsubr_14 ... ok
|
||||
fsubr_15 ... ok
|
||||
fsubr_16 ... ok
|
||||
fsubrp_1 ... ok
|
||||
fsubrp_2 ... ok
|
||||
fsubrp_3 ... ok
|
||||
fsubrp_4 ... ok
|
||||
fsubrp_5 ... ok
|
||||
fsubrp_6 ... ok
|
||||
fsubrp_7 ... ok
|
||||
fsubrp_8 ... ok
|
||||
fsubrp_9 ... ok
|
||||
fsubrp_10 ... ok
|
||||
fsubrp_11 ... ok
|
||||
fsubrp_12 ... ok
|
||||
fsubrp_13 ... ok
|
||||
fsubrp_14 ... ok
|
||||
fsubrp_15 ... ok
|
||||
fsubrp_16 ... ok
|
||||
fisubrs_1 ... ok
|
||||
fisubrs_2 ... ok
|
||||
fisubrs_3 ... ok
|
||||
fisubrs_4 ... ok
|
||||
fisubrs_5 ... ok
|
||||
fisubrs_6 ... ok
|
||||
fisubrs_7 ... ok
|
||||
fisubrs_8 ... ok
|
||||
fisubrl_1 ... ok
|
||||
fisubrl_2 ... ok
|
||||
fisubrl_3 ... ok
|
||||
fisubrl_4 ... ok
|
||||
fisubrl_5 ... ok
|
||||
fisubrl_6 ... ok
|
||||
fisubrl_7 ... ok
|
||||
fisubrl_8 ... ok
|
||||
3
helgrind/tests/insn_fpu.vgtest
Normal file
3
helgrind/tests/insn_fpu.vgtest
Normal file
@ -0,0 +1,3 @@
|
||||
vgopts: -q
|
||||
prog: ../../none/tests/insn_fpu
|
||||
cpu_test: fpu
|
||||
@ -7,7 +7,7 @@ noinst_SCRIPTS = filter_allocs filter_leak_check_size \
|
||||
filter_stderr filter_stderr_backtrace filter_pushfpopf \
|
||||
filter_tronical
|
||||
|
||||
INSN_TESTS=insn_basic insn_cmov insn_mmx insn_mmxext insn_sse insn_sse2
|
||||
INSN_TESTS=insn_basic insn_fpu insn_cmov insn_mmx insn_mmxext insn_sse insn_sse2
|
||||
|
||||
EXTRA_DIST = $(noinst_SCRIPTS) \
|
||||
badaddrvalue.stderr.exp \
|
||||
|
||||
0
memcheck/tests/insn_fpu.stderr.exp
Normal file
0
memcheck/tests/insn_fpu.stderr.exp
Normal file
183
memcheck/tests/insn_fpu.stdout.exp
Normal file
183
memcheck/tests/insn_fpu.stdout.exp
Normal file
@ -0,0 +1,183 @@
|
||||
fabs_1 ... ok
|
||||
fabs_2 ... ok
|
||||
fabs_3 ... ok
|
||||
fabs_4 ... ok
|
||||
fadds_1 ... ok
|
||||
fadds_2 ... ok
|
||||
fadds_3 ... ok
|
||||
fadds_4 ... ok
|
||||
faddl_1 ... ok
|
||||
faddl_2 ... ok
|
||||
faddl_3 ... ok
|
||||
faddl_4 ... ok
|
||||
fadd_1 ... ok
|
||||
fadd_2 ... ok
|
||||
fadd_3 ... ok
|
||||
fadd_4 ... ok
|
||||
fadd_5 ... ok
|
||||
fadd_6 ... ok
|
||||
fadd_7 ... ok
|
||||
fadd_8 ... ok
|
||||
fadd_9 ... ok
|
||||
fadd_10 ... ok
|
||||
fadd_11 ... ok
|
||||
fadd_12 ... ok
|
||||
fadd_13 ... ok
|
||||
fadd_14 ... ok
|
||||
fadd_15 ... ok
|
||||
fadd_16 ... ok
|
||||
faddp_1 ... ok
|
||||
faddp_2 ... ok
|
||||
faddp_3 ... ok
|
||||
faddp_4 ... ok
|
||||
faddp_5 ... ok
|
||||
faddp_6 ... ok
|
||||
faddp_7 ... ok
|
||||
faddp_8 ... ok
|
||||
faddp_9 ... ok
|
||||
faddp_10 ... ok
|
||||
faddp_11 ... ok
|
||||
faddp_12 ... ok
|
||||
faddp_13 ... ok
|
||||
faddp_14 ... ok
|
||||
faddp_15 ... ok
|
||||
faddp_16 ... ok
|
||||
fiadds_1 ... ok
|
||||
fiadds_2 ... ok
|
||||
fiadds_3 ... ok
|
||||
fiadds_4 ... ok
|
||||
fiadds_5 ... ok
|
||||
fiadds_6 ... ok
|
||||
fiadds_7 ... ok
|
||||
fiadds_8 ... ok
|
||||
fiaddl_1 ... ok
|
||||
fiaddl_2 ... ok
|
||||
fiaddl_3 ... ok
|
||||
fiaddl_4 ... ok
|
||||
fiaddl_5 ... ok
|
||||
fiaddl_6 ... ok
|
||||
fiaddl_7 ... ok
|
||||
fiaddl_8 ... ok
|
||||
fchs_1 ... ok
|
||||
fchs_2 ... ok
|
||||
fchs_3 ... ok
|
||||
fchs_4 ... ok
|
||||
fld1_1 ... ok
|
||||
fldl2t_1 ... ok
|
||||
fldl2e_1 ... ok
|
||||
fldpi_1 ... ok
|
||||
fldlg2_1 ... ok
|
||||
fldln2_1 ... ok
|
||||
fldz_1 ... ok
|
||||
fsubs_1 ... ok
|
||||
fsubs_2 ... ok
|
||||
fsubs_3 ... ok
|
||||
fsubs_4 ... ok
|
||||
fsubl_1 ... ok
|
||||
fsubl_2 ... ok
|
||||
fsubl_3 ... ok
|
||||
fsubl_4 ... ok
|
||||
fsub_1 ... ok
|
||||
fsub_2 ... ok
|
||||
fsub_3 ... ok
|
||||
fsub_4 ... ok
|
||||
fsub_5 ... ok
|
||||
fsub_6 ... ok
|
||||
fsub_7 ... ok
|
||||
fsub_8 ... ok
|
||||
fsub_9 ... ok
|
||||
fsub_10 ... ok
|
||||
fsub_11 ... ok
|
||||
fsub_12 ... ok
|
||||
fsub_13 ... ok
|
||||
fsub_14 ... ok
|
||||
fsub_15 ... ok
|
||||
fsub_16 ... ok
|
||||
fsubp_1 ... ok
|
||||
fsubp_2 ... ok
|
||||
fsubp_3 ... ok
|
||||
fsubp_4 ... ok
|
||||
fsubp_5 ... ok
|
||||
fsubp_6 ... ok
|
||||
fsubp_7 ... ok
|
||||
fsubp_8 ... ok
|
||||
fsubp_9 ... ok
|
||||
fsubp_10 ... ok
|
||||
fsubp_11 ... ok
|
||||
fsubp_12 ... ok
|
||||
fsubp_13 ... ok
|
||||
fsubp_14 ... ok
|
||||
fsubp_15 ... ok
|
||||
fsubp_16 ... ok
|
||||
fisubs_1 ... ok
|
||||
fisubs_2 ... ok
|
||||
fisubs_3 ... ok
|
||||
fisubs_4 ... ok
|
||||
fisubs_5 ... ok
|
||||
fisubs_6 ... ok
|
||||
fisubs_7 ... ok
|
||||
fisubs_8 ... ok
|
||||
fisubl_1 ... ok
|
||||
fisubl_2 ... ok
|
||||
fisubl_3 ... ok
|
||||
fisubl_4 ... ok
|
||||
fisubl_5 ... ok
|
||||
fisubl_6 ... ok
|
||||
fisubl_7 ... ok
|
||||
fisubl_8 ... ok
|
||||
fsubrs_1 ... ok
|
||||
fsubrs_2 ... ok
|
||||
fsubrs_3 ... ok
|
||||
fsubrs_4 ... ok
|
||||
fsubrl_1 ... ok
|
||||
fsubrl_2 ... ok
|
||||
fsubrl_3 ... ok
|
||||
fsubrl_4 ... ok
|
||||
fsubr_1 ... ok
|
||||
fsubr_2 ... ok
|
||||
fsubr_3 ... ok
|
||||
fsubr_4 ... ok
|
||||
fsubr_5 ... ok
|
||||
fsubr_6 ... ok
|
||||
fsubr_7 ... ok
|
||||
fsubr_8 ... ok
|
||||
fsubr_9 ... ok
|
||||
fsubr_10 ... ok
|
||||
fsubr_11 ... ok
|
||||
fsubr_12 ... ok
|
||||
fsubr_13 ... ok
|
||||
fsubr_14 ... ok
|
||||
fsubr_15 ... ok
|
||||
fsubr_16 ... ok
|
||||
fsubrp_1 ... ok
|
||||
fsubrp_2 ... ok
|
||||
fsubrp_3 ... ok
|
||||
fsubrp_4 ... ok
|
||||
fsubrp_5 ... ok
|
||||
fsubrp_6 ... ok
|
||||
fsubrp_7 ... ok
|
||||
fsubrp_8 ... ok
|
||||
fsubrp_9 ... ok
|
||||
fsubrp_10 ... ok
|
||||
fsubrp_11 ... ok
|
||||
fsubrp_12 ... ok
|
||||
fsubrp_13 ... ok
|
||||
fsubrp_14 ... ok
|
||||
fsubrp_15 ... ok
|
||||
fsubrp_16 ... ok
|
||||
fisubrs_1 ... ok
|
||||
fisubrs_2 ... ok
|
||||
fisubrs_3 ... ok
|
||||
fisubrs_4 ... ok
|
||||
fisubrs_5 ... ok
|
||||
fisubrs_6 ... ok
|
||||
fisubrs_7 ... ok
|
||||
fisubrs_8 ... ok
|
||||
fisubrl_1 ... ok
|
||||
fisubrl_2 ... ok
|
||||
fisubrl_3 ... ok
|
||||
fisubrl_4 ... ok
|
||||
fisubrl_5 ... ok
|
||||
fisubrl_6 ... ok
|
||||
fisubrl_7 ... ok
|
||||
fisubrl_8 ... ok
|
||||
3
memcheck/tests/insn_fpu.vgtest
Normal file
3
memcheck/tests/insn_fpu.vgtest
Normal file
@ -0,0 +1,3 @@
|
||||
vgopts: -q
|
||||
prog: ../../none/tests/insn_fpu
|
||||
cpu_test: fpu
|
||||
@ -1,7 +1,7 @@
|
||||
noinst_SCRIPTS = filter_cpuid filter_none_discards filter_stderr filter_int gen_insn_test.pl
|
||||
|
||||
CLEANFILES = $(addsuffix .c,$(INSN_TESTS))
|
||||
INSN_TESTS=insn_basic insn_cmov insn_mmx insn_mmxext insn_sse insn_sse2
|
||||
INSN_TESTS=insn_basic insn_fpu insn_cmov insn_mmx insn_mmxext insn_sse insn_sse2
|
||||
|
||||
EXTRA_DIST = $(noinst_SCRIPTS) \
|
||||
args.stderr.exp args.stdout.exp args.vgtest \
|
||||
@ -89,6 +89,8 @@ fpu_lazy_eflags_SOURCES = fpu_lazy_eflags.c
|
||||
fucomip_SOURCES = fucomip.c
|
||||
insn_basic_SOURCES = insn_basic.def
|
||||
insn_basic_LDADD = -lm
|
||||
insn_fpu_SOURCES = insn_fpu.def
|
||||
insn_fpu_LDADD = -lm
|
||||
insn_cmov_SOURCES = insn_cmov.def
|
||||
insn_cmov_LDADD = -lm
|
||||
insn_mmx_SOURCES = insn_mmx.def
|
||||
|
||||
@ -7,14 +7,16 @@ our %ArgTypes = (
|
||||
r8 => "reg8_t",
|
||||
r16 => "reg16_t",
|
||||
r32 => "reg32_t",
|
||||
mm => "mm_reg_t",
|
||||
xmm => "xmm_reg_t",
|
||||
mm => "reg64_t",
|
||||
xmm => "reg128_t",
|
||||
m8 => "reg8_t",
|
||||
m16 => "reg16_t",
|
||||
m32 => "reg32_t",
|
||||
m64 => "mm_reg_t",
|
||||
m128 => "xmm_reg_t",
|
||||
eflags => "reg32_t"
|
||||
m64 => "reg64_t",
|
||||
m128 => "reg128_t",
|
||||
eflags => "reg32_t",
|
||||
st => "reg64_t",
|
||||
fpusw => "reg16_t"
|
||||
);
|
||||
|
||||
our %SubTypeFormats = (
|
||||
@ -51,7 +53,9 @@ our %RegNums = (
|
||||
ah => 4,
|
||||
bh => 5,
|
||||
ch => 6,
|
||||
dh => 7
|
||||
dh => 7,
|
||||
st0 => 0, st1 => 1, st2 => 2, st3 => 3,
|
||||
st4 => 4, st5 => 5, st6 => 6, st7 => 7
|
||||
);
|
||||
|
||||
our %RegTypes = (
|
||||
@ -112,7 +116,7 @@ typedef union {
|
||||
unsigned long long int uq[1];
|
||||
float ps[2];
|
||||
double pd[1];
|
||||
} mm_reg_t __attribute__ ((aligned (8)));
|
||||
} reg64_t __attribute__ ((aligned (8)));
|
||||
|
||||
typedef union {
|
||||
char sb[16];
|
||||
@ -125,7 +129,7 @@ typedef union {
|
||||
unsigned long long int uq[2];
|
||||
float ps[4];
|
||||
double pd[2];
|
||||
} xmm_reg_t __attribute__ ((aligned (16)));
|
||||
} reg128_t __attribute__ ((aligned (16)));
|
||||
|
||||
static sigjmp_buf catchpoint;
|
||||
|
||||
@ -184,12 +188,15 @@ while (<>)
|
||||
my @intregs = @IntRegs;
|
||||
my @mmregs = map { "mm$_" } (0 .. 7);
|
||||
my @xmmregs = map { "xmm$_" } (0 .. 7);
|
||||
my @fpregs = map { "st$_" } (0 .. 7);
|
||||
|
||||
my @presets;
|
||||
my $presetc = 0;
|
||||
my $eflagsmask;
|
||||
my $eflagsset;
|
||||
|
||||
my $fpuswmask;
|
||||
my $fpuswset;
|
||||
|
||||
foreach my $preset (split(/\s+/, $presets))
|
||||
{
|
||||
if ($preset =~ /^([abcd][lh]|[abcd]x|e[abcd]x)\.(sb|ub|sw|uw|sd|ud|sq|uq|ps|pd)\[([^\]]+)\]$/)
|
||||
@ -229,6 +236,43 @@ while (<>)
|
||||
|
||||
$presetc++;
|
||||
}
|
||||
elsif ($preset =~ /^st([0-9]+)\.(ps|pd)\[([^\]]+)\]$/)
|
||||
{
|
||||
my $name = "preset$presetc";
|
||||
my $type = "st";
|
||||
my $regnum = $1;
|
||||
my $register = $fpregs[$regnum];
|
||||
my $subtype = $2;
|
||||
my @values = split(/,/, $3);
|
||||
|
||||
die "Register st$1 already used" unless defined($register);
|
||||
|
||||
my $preset = {
|
||||
name => $name,
|
||||
type => $type,
|
||||
subtype => $subtype,
|
||||
register => $register
|
||||
};
|
||||
|
||||
delete($fpregs[$regnum]);
|
||||
|
||||
push @presets, $preset;
|
||||
|
||||
print qq| $ArgTypes{$type} $name = \{ .$subtype = \{|;
|
||||
|
||||
my $valuec = 0;
|
||||
|
||||
foreach my $value (@values)
|
||||
{
|
||||
print qq|,| if $valuec > 0;
|
||||
print qq| $value$SubTypeSuffixes{$subtype}|;
|
||||
$valuec++;
|
||||
}
|
||||
|
||||
print qq| \} \};\n|;
|
||||
|
||||
$presetc++;
|
||||
}
|
||||
elsif ($preset =~ /^(eflags)\[([^\]]+)\]$/)
|
||||
{
|
||||
my $type = $1;
|
||||
@ -240,6 +284,17 @@ while (<>)
|
||||
$eflagsmask = sprintf "0x%x", ~$values[0];
|
||||
$eflagsset = sprintf "0x%x", $values[1];
|
||||
}
|
||||
elsif ($preset =~ /^(fpusw)\[([^\]]+)\]$/)
|
||||
{
|
||||
my $type = $1;
|
||||
my @values = split(/,/, $2);
|
||||
|
||||
$values[0] = oct($values[0]) if $values[0] =~ /^0/;
|
||||
$values[1] = oct($values[1]) if $values[1] =~ /^0/;
|
||||
|
||||
$fpuswmask = sprintf "0x%x", ~$values[0];
|
||||
$fpuswset = sprintf "0x%x", $values[1];
|
||||
}
|
||||
else
|
||||
{
|
||||
die "Can't parse preset $preset";
|
||||
@ -290,6 +345,43 @@ while (<>)
|
||||
|
||||
print qq| \} \};\n|;
|
||||
}
|
||||
elsif ($arg =~ /^st([0-9]+)\.(ps|pd)\[([^\]]+)\]$/)
|
||||
{
|
||||
my $type = "st";
|
||||
my $regnum = $1;
|
||||
my $register = $fpregs[$regnum] if defined($regnum);
|
||||
my $subtype = $2;
|
||||
my @values = split(/,/, $3);
|
||||
|
||||
die "Register st$1 already used" if defined($regnum) && !defined($register);
|
||||
|
||||
my $arg = {
|
||||
name => $name,
|
||||
type => $type,
|
||||
subtype => $subtype
|
||||
};
|
||||
|
||||
if (defined($register))
|
||||
{
|
||||
$arg->{register} = $register;
|
||||
delete($fpregs[$regnum]);
|
||||
}
|
||||
|
||||
push @args, $arg;
|
||||
|
||||
print qq| $ArgTypes{$type} $name = \{ .$subtype = \{|;
|
||||
|
||||
my $valuec = 0;
|
||||
|
||||
foreach my $value (@values)
|
||||
{
|
||||
print qq|,| if $valuec > 0;
|
||||
print qq| $value$SubTypeSuffixes{$subtype}|;
|
||||
$valuec++;
|
||||
}
|
||||
|
||||
print qq| \} \};\n|;
|
||||
}
|
||||
elsif ($arg =~ /^(imm8|imm16|imm32)\[([^\]]+)\]$/)
|
||||
{
|
||||
my $type = $1;
|
||||
@ -329,6 +421,13 @@ while (<>)
|
||||
{
|
||||
$arg->{register} = shift @xmmregs;
|
||||
}
|
||||
elsif ($arg->{type} =~ /^st$/)
|
||||
{
|
||||
while (!exists($arg->{register}) || !defined($arg->{register}))
|
||||
{
|
||||
$arg->{register} = shift @fpregs;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
my @results;
|
||||
@ -383,6 +482,25 @@ while (<>)
|
||||
|
||||
print qq| $ArgTypes{$type} $name;\n|;
|
||||
}
|
||||
elsif ($result =~ /^(st[0-9]+)\.(ps|pd)\[([^\]]+)\]$/)
|
||||
{
|
||||
my $register = $1;
|
||||
my $type = "st";
|
||||
my $subtype = $2;
|
||||
my @values = split(/,/, $3);
|
||||
|
||||
my $result = {
|
||||
name => $name,
|
||||
type => $type,
|
||||
subtype => $subtype,
|
||||
register => $register,
|
||||
values => [ @values ]
|
||||
};
|
||||
|
||||
push @results, $result;
|
||||
|
||||
print qq| $ArgTypes{$type} $name;\n|;
|
||||
}
|
||||
elsif ($result =~ /^eflags\[([^\]]+)\]$/)
|
||||
{
|
||||
my @values = split(/,/, $1);
|
||||
@ -407,6 +525,30 @@ while (<>)
|
||||
$eflagsset = sprintf "0x%x", $values[0] & ~$values[1];
|
||||
}
|
||||
}
|
||||
elsif ($result =~ /^fpusw\[([^\]]+)\]$/)
|
||||
{
|
||||
my @values = split(/,/, $1);
|
||||
|
||||
$values[0] = oct($values[0]) if $values[0] =~ /^0/;
|
||||
$values[1] = oct($values[1]) if $values[1] =~ /^0/;
|
||||
|
||||
my $result = {
|
||||
name => $name,
|
||||
type => "fpusw",
|
||||
subtype => "ud",
|
||||
values => [ map { sprintf "0x%x", $_ } @values ]
|
||||
};
|
||||
|
||||
push @results, $result;
|
||||
|
||||
print qq| $ArgTypes{fpusw} $name;\n|;
|
||||
|
||||
if (!defined($fpuswmask) && !defined($fpuswset))
|
||||
{
|
||||
$fpuswmask = sprintf "0x%x", ~$values[0];
|
||||
$fpuswset = sprintf "0x%x", $values[0] & ~$values[1];
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
die "Can't parse result $result";
|
||||
@ -419,7 +561,7 @@ while (<>)
|
||||
|
||||
foreach my $result (@results)
|
||||
{
|
||||
if ($result->{type} =~ /^(m(8|16|32|64|128)|eflags)$/)
|
||||
if ($result->{type} =~ /^(m(8|16|32|64|128)|st|flags|fpusw)$/)
|
||||
{
|
||||
$result->{argnum} = $argnum++;
|
||||
}
|
||||
@ -450,6 +592,8 @@ while (<>)
|
||||
print qq| asm\(\n|;
|
||||
print qq| \"fsave %$stateargnum\\n\"\n|;
|
||||
|
||||
my @fpargs;
|
||||
|
||||
foreach my $arg (@presets, @args)
|
||||
{
|
||||
if ($arg->{type} eq "r8")
|
||||
@ -473,8 +617,31 @@ while (<>)
|
||||
print qq| \"movlps 0%$arg->{argnum}, %%$arg->{register}\\n\"\n|;
|
||||
print qq| \"movhps 8%$arg->{argnum}, %%$arg->{register}\\n\"\n|;
|
||||
}
|
||||
elsif ($arg->{type} eq "st")
|
||||
{
|
||||
$fpargs[$RegNums{$arg->{register}}] = $arg;
|
||||
}
|
||||
}
|
||||
|
||||
foreach my $arg (reverse @fpargs)
|
||||
{
|
||||
if (defined($arg))
|
||||
{
|
||||
if ($arg->{subtype} eq "ps")
|
||||
{
|
||||
print qq| \"flds %$arg->{argnum}\\n\"\n|;
|
||||
}
|
||||
elsif ($arg->{subtype} eq "pd")
|
||||
{
|
||||
print qq| \"fldl %$arg->{argnum}\\n\"\n|;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
print qq| \"fldz\\n\"\n|;
|
||||
}
|
||||
}
|
||||
|
||||
if (defined($eflagsmask) || defined($eflagsset))
|
||||
{
|
||||
print qq| \"pushfl\\n\"\n|;
|
||||
@ -495,6 +662,14 @@ while (<>)
|
||||
{
|
||||
print qq|$prefix%%$arg->{register}|;
|
||||
}
|
||||
elsif ($arg->{type} =~ /^st$/)
|
||||
{
|
||||
my $register = $arg->{register};
|
||||
|
||||
$register =~ s/st(\d+)/st\($1\)/;
|
||||
|
||||
print qq|$prefix%%$register|;
|
||||
}
|
||||
elsif ($arg->{type} =~ /^(m(8|16|32|64|128))$/)
|
||||
{
|
||||
if (exists($arg->{result}))
|
||||
@ -516,6 +691,8 @@ while (<>)
|
||||
|
||||
print qq|\\n\"\n|;
|
||||
|
||||
my @fpresults;
|
||||
|
||||
foreach my $result (@results)
|
||||
{
|
||||
if ($result->{type} eq "r8")
|
||||
@ -539,11 +716,38 @@ while (<>)
|
||||
print qq| \"movlps %%$result->{register}, 0%$result->{argnum}\\n\"\n|;
|
||||
print qq| \"movhps %%$result->{register}, 8%$result->{argnum}\\n\"\n|;
|
||||
}
|
||||
elsif ($result->{type} eq "st")
|
||||
{
|
||||
$fpresults[$RegNums{$result->{register}}] = $result;
|
||||
}
|
||||
elsif ($result->{type} eq "eflags")
|
||||
{
|
||||
print qq| \"pushfl\\n\"\n|;
|
||||
print qq| \"popl %$result->{argnum}\\n\"\n|;
|
||||
}
|
||||
elsif ($result->{type} eq "fpusw")
|
||||
{
|
||||
print qq| \"fstsw %$result->{argnum}\\n\"\n|;
|
||||
}
|
||||
}
|
||||
|
||||
foreach my $result (@fpresults)
|
||||
{
|
||||
if (defined($result))
|
||||
{
|
||||
if ($result->{subtype} eq "ps")
|
||||
{
|
||||
print qq| \"fstps %$result->{argnum}\\n\"\n|;
|
||||
}
|
||||
elsif ($result->{subtype} eq "pd")
|
||||
{
|
||||
print qq| \"fstpl %$result->{argnum}\\n\"\n|;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
print qq| \"fincstp\\n\"\n|;
|
||||
}
|
||||
}
|
||||
|
||||
print qq| \"frstor %$stateargnum\\n\"\n|;
|
||||
@ -554,7 +758,7 @@ while (<>)
|
||||
|
||||
foreach my $result (@results)
|
||||
{
|
||||
if ($result->{type} =~ /^(m(8|16|32|64|128)|eflags)$/)
|
||||
if ($result->{type} =~ /^(m(8|16|32|64|128)|st|eflags|fpusw)$/)
|
||||
{
|
||||
print qq|$prefix\"=m\" \($result->{name}\)|;
|
||||
$prefix = ", ";
|
||||
@ -589,7 +793,7 @@ while (<>)
|
||||
|
||||
foreach my $arg (@presets, @args)
|
||||
{
|
||||
if ($arg->{register})
|
||||
if ($arg->{register} && $arg->{type} ne "st")
|
||||
{
|
||||
print qq|$prefix\"$arg->{register}\"|;
|
||||
$prefix = ", ";
|
||||
@ -616,6 +820,10 @@ while (<>)
|
||||
{
|
||||
print qq|${prefix}\($result->{name}.ud[0] & $values[0]UL\) == $values[1]UL|;
|
||||
}
|
||||
elsif ($type eq "fpusw")
|
||||
{
|
||||
print qq|${prefix}\($result->{name}.uw[0] & $values[0]\) == $values[1]|;
|
||||
}
|
||||
else
|
||||
{
|
||||
foreach my $value (0 .. $#values)
|
||||
@ -659,6 +867,10 @@ while (<>)
|
||||
{
|
||||
print qq| printf(" eflags & 0x%lx = 0x%lx (expected 0x%lx)\\n", $values[0]UL, $result->{name}.ud\[0\] & $values[0]UL, $values[1]UL);\n|;
|
||||
}
|
||||
elsif ($type eq "fpusw")
|
||||
{
|
||||
print qq| printf(" fpusw & 0x%x = 0x%x (expected 0x%x)\\n", $values[0], $result->{name}.uw\[0\] & $values[0], $values[1]);\n|;
|
||||
}
|
||||
else
|
||||
{
|
||||
foreach my $value (0 .. $#values)
|
||||
|
||||
183
none/tests/insn_fpu.def
Normal file
183
none/tests/insn_fpu.def
Normal file
@ -0,0 +1,183 @@
|
||||
fabs st0.ps[1234.5678] : => st0.ps[1234.5678]
|
||||
fabs st0.ps[-1234.5678] : => st0.ps[1234.5678]
|
||||
fabs st0.pd[12345678.87654321] : => st0.pd[12345678.87654321]
|
||||
fabs st0.pd[-12345678.87654321] : => st0.pd[12345678.87654321]
|
||||
fadds st0.ps[1234.5678] : m32.ps[8765.4321] => st0.ps[9999.9999]
|
||||
fadds st0.ps[-1234.5678] : m32.ps[8765.4321] => st0.ps[7530.8643]
|
||||
fadds st0.ps[1234.5678] : m32.ps[-8765.4321] => st0.ps[-7530.8643]
|
||||
fadds st0.ps[-1234.5678] : m32.ps[-8765.4321] => st0.ps[-9999.9999]
|
||||
faddl st0.pd[1234567.7654321] : m64.pd[7654321.1234567] => st0.pd[8888888.8888888]
|
||||
faddl st0.pd[-1234567.7654321] : m64.pd[7654321.1234567] => st0.pd[6419753.3580246]
|
||||
faddl st0.pd[1234567.7654321] : m64.pd[-7654321.1234567] => st0.pd[-6419753.3580246]
|
||||
faddl st0.pd[-1234567.7654321] : m64.pd[-7654321.1234567] => st0.pd[-8888888.8888888]
|
||||
fadd st0.ps[1234.5678] st2.ps[8765.4321] => st2.ps[9999.9999]
|
||||
fadd st0.ps[-1234.5678] st2.ps[8765.4321] => st2.ps[7530.8643]
|
||||
fadd st0.ps[1234.5678] st2.ps[-8765.4321] => st2.ps[-7530.8643]
|
||||
fadd st0.ps[-1234.5678] st2.ps[-8765.4321] => st2.ps[-9999.9999]
|
||||
fadd st0.pd[1234567.7654321] st2.pd[7654321.1234567] => st2.pd[8888888.8888888]
|
||||
fadd st0.pd[-1234567.7654321] st2.pd[7654321.1234567] => st2.pd[6419753.3580246]
|
||||
fadd st0.pd[1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[-6419753.3580246]
|
||||
fadd st0.pd[-1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[-8888888.8888888]
|
||||
fadd st2.ps[1234.5678] st0.ps[8765.4321] => st0.ps[9999.9999]
|
||||
fadd st2.ps[-1234.5678] st0.ps[8765.4321] => st0.ps[7530.8643]
|
||||
fadd st2.ps[1234.5678] st0.ps[-8765.4321] => st0.ps[-7530.8643]
|
||||
fadd st2.ps[-1234.5678] st0.ps[-8765.4321] => st0.ps[-9999.9999]
|
||||
fadd st2.pd[1234567.7654321] st0.pd[7654321.1234567] => st0.pd[8888888.8888888]
|
||||
fadd st2.pd[-1234567.7654321] st0.pd[7654321.1234567] => st0.pd[6419753.3580246]
|
||||
fadd st2.pd[1234567.7654321] st0.pd[-7654321.1234567] => st0.pd[-6419753.3580246]
|
||||
fadd st2.pd[-1234567.7654321] st0.pd[-7654321.1234567] => st0.pd[-8888888.8888888]
|
||||
faddp st0.ps[1234.5678] st2.ps[8765.4321] => st1.ps[9999.9999]
|
||||
faddp st0.ps[-1234.5678] st2.ps[8765.4321] => st1.ps[7530.8643]
|
||||
faddp st0.ps[1234.5678] st2.ps[-8765.4321] => st1.ps[-7530.8643]
|
||||
faddp st0.ps[-1234.5678] st2.ps[-8765.4321] => st1.ps[-9999.9999]
|
||||
faddp st0.pd[1234567.7654321] st2.pd[7654321.1234567] => st1.pd[8888888.8888888]
|
||||
faddp st0.pd[-1234567.7654321] st2.pd[7654321.1234567] => st1.pd[6419753.3580246]
|
||||
faddp st0.pd[1234567.7654321] st2.pd[-7654321.1234567] => st1.pd[-6419753.3580246]
|
||||
faddp st0.pd[-1234567.7654321] st2.pd[-7654321.1234567] => st1.pd[-8888888.8888888]
|
||||
faddp st0.ps[1234.5678] st1.ps[8765.4321] : => st0.ps[9999.9999]
|
||||
faddp st0.ps[-1234.5678] st1.ps[8765.4321] : => st0.ps[7530.8643]
|
||||
faddp st0.ps[1234.5678] st1.ps[-8765.4321] : => st0.ps[-7530.8643]
|
||||
faddp st0.ps[-1234.5678] st1.ps[-8765.4321] : => st0.ps[-9999.9999]
|
||||
faddp st0.pd[1234567.7654321] st1.pd[7654321.1234567] : => st0.pd[8888888.8888888]
|
||||
faddp st0.pd[-1234567.7654321] st1.pd[7654321.1234567] : => st0.pd[6419753.3580246]
|
||||
faddp st0.pd[1234567.7654321] st1.pd[-7654321.1234567] : => st0.pd[-6419753.3580246]
|
||||
faddp st0.pd[-1234567.7654321] st1.pd[-7654321.1234567] : => st0.pd[-8888888.8888888]
|
||||
fiadds st0.ps[1234.5678] : m16.sw[4321] => st0.ps[5555.5678]
|
||||
fiadds st0.ps[-1234.5678] : m16.sw[4321] => st0.ps[3086.4322]
|
||||
fiadds st0.ps[1234.5678] : m16.sw[-4321] => st0.ps[-3086.4322]
|
||||
fiadds st0.ps[-1234.5678] : m16.sw[-4321] => st0.ps[-5555.5678]
|
||||
fiadds st0.pd[1234567.7654321] : m16.sw[4321] => st0.pd[1238888.7654321]
|
||||
fiadds st0.pd[-1234567.7654321] : m16.sw[4321] => st0.pd[-1230246.7654321]
|
||||
fiadds st0.pd[1234567.7654321] : m16.sw[-4321] => st0.pd[1230246.7654321]
|
||||
fiadds st0.pd[-1234567.7654321] : m16.sw[-4321] => st0.pd[-1238888.7654321]
|
||||
fiaddl st0.ps[1234.5678] : m32.sd[87654321] => st0.ps[87655555.5678]
|
||||
fiaddl st0.ps[-1234.5678] : m32.sd[87654321] => st0.ps[87653086.4322]
|
||||
fiaddl st0.ps[1234.5678] : m32.sd[-87654321] => st0.ps[-87653086.4322]
|
||||
fiaddl st0.ps[-1234.5678] : m32.sd[-87654321] => st0.ps[-87655555.5678]
|
||||
fiaddl st0.pd[1234567.7654321] : m32.sd[87654321] => st0.pd[88888888.7654321]
|
||||
fiaddl st0.pd[-1234567.7654321] : m32.sd[87654321] => st0.pd[86419753.2345679]
|
||||
fiaddl st0.pd[1234567.7654321] : m32.sd[-87654321] => st0.pd[-86419753.2345679]
|
||||
fiaddl st0.pd[-1234567.7654321] : m32.sd[-87654321] => st0.pd[-88888888.7654321]
|
||||
fchs st0.ps[1234.5678] : => st0.ps[-1234.5678]
|
||||
fchs st0.ps[-1234.5678] : => st0.ps[1234.5678]
|
||||
fchs st0.pd[12345678.87654321] : => st0.pd[-12345678.87654321]
|
||||
fchs st0.pd[-12345678.87654321] : => st0.pd[12345678.87654321]
|
||||
fld1 => st0.pd[1.0]
|
||||
fldl2t => st0.pd[3.321928094887362]
|
||||
fldl2e => st0.pd[1.442695040888963]
|
||||
fldpi => st0.pd[3.141592653589793]
|
||||
fldlg2 => st0.pd[0.3010299956639812]
|
||||
fldln2 => st0.pd[0.6931471805599453]
|
||||
fldz => st0.pd[0.0]
|
||||
fsubs st0.ps[1234.5678] : m32.ps[8765.4321] => st0.ps[-7530.8643]
|
||||
fsubs st0.ps[-1234.5678] : m32.ps[8765.4321] => st0.ps[-9999.9990]
|
||||
fsubs st0.ps[1234.5678] : m32.ps[-8765.4321] => st0.ps[9999.9999]
|
||||
fsubs st0.ps[-1234.5678] : m32.ps[-8765.4321] => st0.ps[7530.8643]
|
||||
fsubl st0.pd[1234567.7654321] : m64.pd[7654321.1234567] => st0.pd[-6419753.3580246]
|
||||
fsubl st0.pd[-1234567.7654321] : m64.pd[7654321.1234567] => st0.pd[-8888888.8888888]
|
||||
fsubl st0.pd[1234567.7654321] : m64.pd[-7654321.1234567] => st0.pd[8888888.8888888]
|
||||
fsubl st0.pd[-1234567.7654321] : m64.pd[-7654321.1234567] => st0.pd[6419753.3580246]
|
||||
fsub st0.ps[1234.5678] st2.ps[8765.4321] => st2.ps[-7530.8643]
|
||||
fsub st0.ps[-1234.5678] st2.ps[8765.4321] => st2.ps[-9999.9999]
|
||||
fsub st0.ps[1234.5678] st2.ps[-8765.4321] => st2.ps[9999.9999]
|
||||
fsub st0.ps[-1234.5678] st2.ps[-8765.4321] => st2.ps[7530.8643]
|
||||
fsub st0.pd[1234567.7654321] st2.pd[7654321.1234567] => st2.pd[-6419753.3580246]
|
||||
fsub st0.pd[-1234567.7654321] st2.pd[7654321.1234567] => st2.pd[-8888888.8888888]
|
||||
fsub st0.pd[1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[8888888.8888888]
|
||||
fsub st0.pd[-1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[6419753.3580246]
|
||||
fsub st2.ps[1234.5678] st0.ps[8765.4321] => st0.ps[7530.8643]
|
||||
fsub st2.ps[-1234.5678] st0.ps[8765.4321] => st0.ps[9999.9999]
|
||||
fsub st2.ps[1234.5678] st0.ps[-8765.4321] => st0.ps[-9999.9999]
|
||||
fsub st2.ps[-1234.5678] st0.ps[-8765.4321] => st0.ps[-7530.8643]
|
||||
fsub st2.pd[1234567.7654321] st0.pd[7654321.1234567] => st0.pd[6419753.3580246]
|
||||
fsub st2.pd[-1234567.7654321] st0.pd[7654321.1234567] => st0.pd[8888888.8888888]
|
||||
fsub st2.pd[1234567.7654321] st0.pd[-7654321.1234567] => st0.pd[-8888888.8888888]
|
||||
fsub st2.pd[-1234567.7654321] st0.pd[-7654321.1234567] => st0.pd[-6419753.3580246]
|
||||
fsubp st0.ps[1234.5678] st2.ps[8765.4321] => st1.ps[-7530.8643]
|
||||
fsubp st0.ps[-1234.5678] st2.ps[8765.4321] => st1.ps[-9999.9999]
|
||||
fsubp st0.ps[1234.5678] st2.ps[-8765.4321] => st1.ps[9999.9999]
|
||||
fsubp st0.ps[-1234.5678] st2.ps[-8765.4321] => st1.ps[7530.8643]
|
||||
fsubp st0.pd[1234567.7654321] st2.pd[7654321.1234567] => st1.pd[-6419753.3580246]
|
||||
fsubp st0.pd[-1234567.7654321] st2.pd[7654321.1234567] => st1.pd[-8888888.8888888]
|
||||
fsubp st0.pd[1234567.7654321] st2.pd[-7654321.1234567] => st1.pd[8888888.8888888]
|
||||
fsubp st0.pd[-1234567.7654321] st2.pd[-7654321.1234567] => st1.pd[6419753.3580246]
|
||||
fsubp st0.ps[1234.5678] st1.ps[8765.4321] : => st0.ps[-7530.8643]
|
||||
fsubp st0.ps[-1234.5678] st1.ps[8765.4321] : => st0.ps[-9999.9999]
|
||||
fsubp st0.ps[1234.5678] st1.ps[-8765.4321] : => st0.ps[9999.9999]
|
||||
fsubp st0.ps[-1234.5678] st1.ps[-8765.4321] : => st0.ps[7530.8643]
|
||||
fsubp st0.pd[1234567.7654321] st1.pd[7654321.1234567] : => st0.pd[-6419753.3580246]
|
||||
fsubp st0.pd[-1234567.7654321] st1.pd[7654321.1234567] : => st0.pd[-8888888.8888888]
|
||||
fsubp st0.pd[1234567.7654321] st1.pd[-7654321.1234567] : => st0.pd[8888888.8888888]
|
||||
fsubp st0.pd[-1234567.7654321] st1.pd[-7654321.1234567] : => st0.pd[6419753.3580246]
|
||||
fisubs st0.ps[1234.5678] : m16.sw[4321] => st0.ps[-3086.4322]
|
||||
fisubs st0.ps[-1234.5678] : m16.sw[4321] => st0.ps[-5555.5678]
|
||||
fisubs st0.ps[1234.5678] : m16.sw[-4321] => st0.ps[5555.5678]
|
||||
fisubs st0.ps[-1234.5678] : m16.sw[-4321] => st0.ps[3086.4322]
|
||||
fisubs st0.pd[1234567.7654321] : m16.sw[4321] => st0.pd[1230246.7654321]
|
||||
fisubs st0.pd[-1234567.7654321] : m16.sw[4321] => st0.pd[-1238888.7654321]
|
||||
fisubs st0.pd[1234567.7654321] : m16.sw[-4321] => st0.pd[1238888.7654321]
|
||||
fisubs st0.pd[-1234567.7654321] : m16.sw[-4321] => st0.pd[-1230246.7654321]
|
||||
fisubl st0.ps[1234.5678] : m32.sd[87654321] => st0.ps[-87653086.4322]
|
||||
fisubl st0.ps[-1234.5678] : m32.sd[87654321] => st0.ps[-87655555.5678]
|
||||
fisubl st0.ps[1234.5678] : m32.sd[-87654321] => st0.ps[87655555.5678]
|
||||
fisubl st0.ps[-1234.5678] : m32.sd[-87654321] => st0.ps[87653086.4322]
|
||||
fisubl st0.pd[1234567.7654321] : m32.sd[87654321] => st0.pd[-86419753.2345679]
|
||||
fisubl st0.pd[-1234567.7654321] : m32.sd[87654321] => st0.pd[-88888888.7654321]
|
||||
fisubl st0.pd[1234567.7654321] : m32.sd[-87654321] => st0.pd[88888888.7654321]
|
||||
fisubl st0.pd[-1234567.7654321] : m32.sd[-87654321] => st0.pd[86419753.2345679]
|
||||
fsubrs st0.ps[1234.5678] : m32.ps[8765.4321] => st0.ps[7530.8643]
|
||||
fsubrs st0.ps[-1234.5678] : m32.ps[8765.4321] => st0.ps[9999.9990]
|
||||
fsubrs st0.ps[1234.5678] : m32.ps[-8765.4321] => st0.ps[-9999.9999]
|
||||
fsubrs st0.ps[-1234.5678] : m32.ps[-8765.4321] => st0.ps[-7530.8643]
|
||||
fsubrl st0.pd[1234567.7654321] : m64.pd[7654321.1234567] => st0.pd[6419753.3580246]
|
||||
fsubrl st0.pd[-1234567.7654321] : m64.pd[7654321.1234567] => st0.pd[8888888.8888888]
|
||||
fsubrl st0.pd[1234567.7654321] : m64.pd[-7654321.1234567] => st0.pd[-8888888.8888888]
|
||||
fsubrl st0.pd[-1234567.7654321] : m64.pd[-7654321.1234567] => st0.pd[-6419753.3580246]
|
||||
fsubr st0.ps[1234.5678] st2.ps[8765.4321] => st2.ps[7530.8643]
|
||||
fsubr st0.ps[-1234.5678] st2.ps[8765.4321] => st2.ps[9999.9999]
|
||||
fsubr st0.ps[1234.5678] st2.ps[-8765.4321] => st2.ps[-9999.9999]
|
||||
fsubr st0.ps[-1234.5678] st2.ps[-8765.4321] => st2.ps[-7530.8643]
|
||||
fsubr st0.pd[1234567.7654321] st2.pd[7654321.1234567] => st2.pd[6419753.3580246]
|
||||
fsubr st0.pd[-1234567.7654321] st2.pd[7654321.1234567] => st2.pd[8888888.8888888]
|
||||
fsubr st0.pd[1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[-8888888.8888888]
|
||||
fsubr st0.pd[-1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[-6419753.3580246]
|
||||
fsubr st2.ps[1234.5678] st0.ps[8765.4321] => st0.ps[-7530.8643]
|
||||
fsubr st2.ps[-1234.5678] st0.ps[8765.4321] => st0.ps[-9999.9999]
|
||||
fsubr st2.ps[1234.5678] st0.ps[-8765.4321] => st0.ps[9999.9999]
|
||||
fsubr st2.ps[-1234.5678] st0.ps[-8765.4321] => st0.ps[7530.8643]
|
||||
fsubr st2.pd[1234567.7654321] st0.pd[7654321.1234567] => st0.pd[-6419753.3580246]
|
||||
fsubr st2.pd[-1234567.7654321] st0.pd[7654321.1234567] => st0.pd[-8888888.8888888]
|
||||
fsubr st2.pd[1234567.7654321] st0.pd[-7654321.1234567] => st0.pd[8888888.8888888]
|
||||
fsubr st2.pd[-1234567.7654321] st0.pd[-7654321.1234567] => st0.pd[6419753.3580246]
|
||||
fsubrp st0.ps[1234.5678] st2.ps[8765.4321] => st1.ps[7530.8643]
|
||||
fsubrp st0.ps[-1234.5678] st2.ps[8765.4321] => st1.ps[9999.9999]
|
||||
fsubrp st0.ps[1234.5678] st2.ps[-8765.4321] => st1.ps[-9999.9999]
|
||||
fsubrp st0.ps[-1234.5678] st2.ps[-8765.4321] => st1.ps[-7530.8643]
|
||||
fsubrp st0.pd[1234567.7654321] st2.pd[7654321.1234567] => st1.pd[6419753.3580246]
|
||||
fsubrp st0.pd[-1234567.7654321] st2.pd[7654321.1234567] => st1.pd[8888888.8888888]
|
||||
fsubrp st0.pd[1234567.7654321] st2.pd[-7654321.1234567] => st1.pd[-8888888.8888888]
|
||||
fsubrp st0.pd[-1234567.7654321] st2.pd[-7654321.1234567] => st1.pd[-6419753.3580246]
|
||||
fsubrp st0.ps[1234.5678] st1.ps[8765.4321] : => st0.ps[7530.8643]
|
||||
fsubrp st0.ps[-1234.5678] st1.ps[8765.4321] : => st0.ps[9999.9999]
|
||||
fsubrp st0.ps[1234.5678] st1.ps[-8765.4321] : => st0.ps[-9999.9999]
|
||||
fsubrp st0.ps[-1234.5678] st1.ps[-8765.4321] : => st0.ps[-7530.8643]
|
||||
fsubrp st0.pd[1234567.7654321] st1.pd[7654321.1234567] : => st0.pd[6419753.3580246]
|
||||
fsubrp st0.pd[-1234567.7654321] st1.pd[7654321.1234567] : => st0.pd[8888888.8888888]
|
||||
fsubrp st0.pd[1234567.7654321] st1.pd[-7654321.1234567] : => st0.pd[-8888888.8888888]
|
||||
fsubrp st0.pd[-1234567.7654321] st1.pd[-7654321.1234567] : => st0.pd[-6419753.3580246]
|
||||
fisubrs st0.ps[1234.5678] : m16.sw[4321] => st0.ps[3086.4322]
|
||||
fisubrs st0.ps[-1234.5678] : m16.sw[4321] => st0.ps[5555.5678]
|
||||
fisubrs st0.ps[1234.5678] : m16.sw[-4321] => st0.ps[-5555.5678]
|
||||
fisubrs st0.ps[-1234.5678] : m16.sw[-4321] => st0.ps[-3086.4322]
|
||||
fisubrs st0.pd[1234567.7654321] : m16.sw[4321] => st0.pd[-1230246.7654321]
|
||||
fisubrs st0.pd[-1234567.7654321] : m16.sw[4321] => st0.pd[1238888.7654321]
|
||||
fisubrs st0.pd[1234567.7654321] : m16.sw[-4321] => st0.pd[-1238888.7654321]
|
||||
fisubrs st0.pd[-1234567.7654321] : m16.sw[-4321] => st0.pd[1230246.7654321]
|
||||
fisubrl st0.ps[1234.5678] : m32.sd[87654321] => st0.ps[87655555.5678]
|
||||
fisubrl st0.ps[-1234.5678] : m32.sd[87654321] => st0.ps[87653086.4322]
|
||||
fisubrl st0.ps[1234.5678] : m32.sd[-87654321] => st0.ps[-87653086.4322]
|
||||
fisubrl st0.ps[-1234.5678] : m32.sd[-87654321] => st0.ps[-87655555.5678]
|
||||
fisubrl st0.pd[1234567.7654321] : m32.sd[87654321] => st0.pd[86419753.2345679]
|
||||
fisubrl st0.pd[-1234567.7654321] : m32.sd[87654321] => st0.pd[88888888.7654321]
|
||||
fisubrl st0.pd[1234567.7654321] : m32.sd[-87654321] => st0.pd[-88888888.7654321]
|
||||
fisubrl st0.pd[-1234567.7654321] : m32.sd[-87654321] => st0.pd[-86419753.2345679]
|
||||
2
none/tests/insn_fpu.stderr.exp
Normal file
2
none/tests/insn_fpu.stderr.exp
Normal file
@ -0,0 +1,2 @@
|
||||
|
||||
|
||||
183
none/tests/insn_fpu.stdout.exp
Normal file
183
none/tests/insn_fpu.stdout.exp
Normal file
@ -0,0 +1,183 @@
|
||||
fabs_1 ... ok
|
||||
fabs_2 ... ok
|
||||
fabs_3 ... ok
|
||||
fabs_4 ... ok
|
||||
fadds_1 ... ok
|
||||
fadds_2 ... ok
|
||||
fadds_3 ... ok
|
||||
fadds_4 ... ok
|
||||
faddl_1 ... ok
|
||||
faddl_2 ... ok
|
||||
faddl_3 ... ok
|
||||
faddl_4 ... ok
|
||||
fadd_1 ... ok
|
||||
fadd_2 ... ok
|
||||
fadd_3 ... ok
|
||||
fadd_4 ... ok
|
||||
fadd_5 ... ok
|
||||
fadd_6 ... ok
|
||||
fadd_7 ... ok
|
||||
fadd_8 ... ok
|
||||
fadd_9 ... ok
|
||||
fadd_10 ... ok
|
||||
fadd_11 ... ok
|
||||
fadd_12 ... ok
|
||||
fadd_13 ... ok
|
||||
fadd_14 ... ok
|
||||
fadd_15 ... ok
|
||||
fadd_16 ... ok
|
||||
faddp_1 ... ok
|
||||
faddp_2 ... ok
|
||||
faddp_3 ... ok
|
||||
faddp_4 ... ok
|
||||
faddp_5 ... ok
|
||||
faddp_6 ... ok
|
||||
faddp_7 ... ok
|
||||
faddp_8 ... ok
|
||||
faddp_9 ... ok
|
||||
faddp_10 ... ok
|
||||
faddp_11 ... ok
|
||||
faddp_12 ... ok
|
||||
faddp_13 ... ok
|
||||
faddp_14 ... ok
|
||||
faddp_15 ... ok
|
||||
faddp_16 ... ok
|
||||
fiadds_1 ... ok
|
||||
fiadds_2 ... ok
|
||||
fiadds_3 ... ok
|
||||
fiadds_4 ... ok
|
||||
fiadds_5 ... ok
|
||||
fiadds_6 ... ok
|
||||
fiadds_7 ... ok
|
||||
fiadds_8 ... ok
|
||||
fiaddl_1 ... ok
|
||||
fiaddl_2 ... ok
|
||||
fiaddl_3 ... ok
|
||||
fiaddl_4 ... ok
|
||||
fiaddl_5 ... ok
|
||||
fiaddl_6 ... ok
|
||||
fiaddl_7 ... ok
|
||||
fiaddl_8 ... ok
|
||||
fchs_1 ... ok
|
||||
fchs_2 ... ok
|
||||
fchs_3 ... ok
|
||||
fchs_4 ... ok
|
||||
fld1_1 ... ok
|
||||
fldl2t_1 ... ok
|
||||
fldl2e_1 ... ok
|
||||
fldpi_1 ... ok
|
||||
fldlg2_1 ... ok
|
||||
fldln2_1 ... ok
|
||||
fldz_1 ... ok
|
||||
fsubs_1 ... ok
|
||||
fsubs_2 ... ok
|
||||
fsubs_3 ... ok
|
||||
fsubs_4 ... ok
|
||||
fsubl_1 ... ok
|
||||
fsubl_2 ... ok
|
||||
fsubl_3 ... ok
|
||||
fsubl_4 ... ok
|
||||
fsub_1 ... ok
|
||||
fsub_2 ... ok
|
||||
fsub_3 ... ok
|
||||
fsub_4 ... ok
|
||||
fsub_5 ... ok
|
||||
fsub_6 ... ok
|
||||
fsub_7 ... ok
|
||||
fsub_8 ... ok
|
||||
fsub_9 ... ok
|
||||
fsub_10 ... ok
|
||||
fsub_11 ... ok
|
||||
fsub_12 ... ok
|
||||
fsub_13 ... ok
|
||||
fsub_14 ... ok
|
||||
fsub_15 ... ok
|
||||
fsub_16 ... ok
|
||||
fsubp_1 ... ok
|
||||
fsubp_2 ... ok
|
||||
fsubp_3 ... ok
|
||||
fsubp_4 ... ok
|
||||
fsubp_5 ... ok
|
||||
fsubp_6 ... ok
|
||||
fsubp_7 ... ok
|
||||
fsubp_8 ... ok
|
||||
fsubp_9 ... ok
|
||||
fsubp_10 ... ok
|
||||
fsubp_11 ... ok
|
||||
fsubp_12 ... ok
|
||||
fsubp_13 ... ok
|
||||
fsubp_14 ... ok
|
||||
fsubp_15 ... ok
|
||||
fsubp_16 ... ok
|
||||
fisubs_1 ... ok
|
||||
fisubs_2 ... ok
|
||||
fisubs_3 ... ok
|
||||
fisubs_4 ... ok
|
||||
fisubs_5 ... ok
|
||||
fisubs_6 ... ok
|
||||
fisubs_7 ... ok
|
||||
fisubs_8 ... ok
|
||||
fisubl_1 ... ok
|
||||
fisubl_2 ... ok
|
||||
fisubl_3 ... ok
|
||||
fisubl_4 ... ok
|
||||
fisubl_5 ... ok
|
||||
fisubl_6 ... ok
|
||||
fisubl_7 ... ok
|
||||
fisubl_8 ... ok
|
||||
fsubrs_1 ... ok
|
||||
fsubrs_2 ... ok
|
||||
fsubrs_3 ... ok
|
||||
fsubrs_4 ... ok
|
||||
fsubrl_1 ... ok
|
||||
fsubrl_2 ... ok
|
||||
fsubrl_3 ... ok
|
||||
fsubrl_4 ... ok
|
||||
fsubr_1 ... ok
|
||||
fsubr_2 ... ok
|
||||
fsubr_3 ... ok
|
||||
fsubr_4 ... ok
|
||||
fsubr_5 ... ok
|
||||
fsubr_6 ... ok
|
||||
fsubr_7 ... ok
|
||||
fsubr_8 ... ok
|
||||
fsubr_9 ... ok
|
||||
fsubr_10 ... ok
|
||||
fsubr_11 ... ok
|
||||
fsubr_12 ... ok
|
||||
fsubr_13 ... ok
|
||||
fsubr_14 ... ok
|
||||
fsubr_15 ... ok
|
||||
fsubr_16 ... ok
|
||||
fsubrp_1 ... ok
|
||||
fsubrp_2 ... ok
|
||||
fsubrp_3 ... ok
|
||||
fsubrp_4 ... ok
|
||||
fsubrp_5 ... ok
|
||||
fsubrp_6 ... ok
|
||||
fsubrp_7 ... ok
|
||||
fsubrp_8 ... ok
|
||||
fsubrp_9 ... ok
|
||||
fsubrp_10 ... ok
|
||||
fsubrp_11 ... ok
|
||||
fsubrp_12 ... ok
|
||||
fsubrp_13 ... ok
|
||||
fsubrp_14 ... ok
|
||||
fsubrp_15 ... ok
|
||||
fsubrp_16 ... ok
|
||||
fisubrs_1 ... ok
|
||||
fisubrs_2 ... ok
|
||||
fisubrs_3 ... ok
|
||||
fisubrs_4 ... ok
|
||||
fisubrs_5 ... ok
|
||||
fisubrs_6 ... ok
|
||||
fisubrs_7 ... ok
|
||||
fisubrs_8 ... ok
|
||||
fisubrl_1 ... ok
|
||||
fisubrl_2 ... ok
|
||||
fisubrl_3 ... ok
|
||||
fisubrl_4 ... ok
|
||||
fisubrl_5 ... ok
|
||||
fisubrl_6 ... ok
|
||||
fisubrl_7 ... ok
|
||||
fisubrl_8 ... ok
|
||||
2
none/tests/insn_fpu.vgtest
Normal file
2
none/tests/insn_fpu.vgtest
Normal file
@ -0,0 +1,2 @@
|
||||
prog: insn_fpu
|
||||
cpu_test: fpu
|
||||
@ -23,7 +23,10 @@ int main(int argc, char **argv)
|
||||
unsigned int d;
|
||||
|
||||
if ( argc == 2 ) {
|
||||
if ( strcmp( argv[1], "cmov" ) == 0 ) {
|
||||
if ( strcmp( argv[1], "fpu" ) == 0 ) {
|
||||
level = 1;
|
||||
mask = 1 << 0;
|
||||
} else if ( strcmp( argv[1], "cmov" ) == 0 ) {
|
||||
level = 1;
|
||||
mask = 1 << 15;
|
||||
} else if ( strcmp( argv[1], "mmx" ) == 0 ) {
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user