mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-04 02:18:37 +00:00
New test for the ISA 3.0 mcrxrx instruction.
Add new test.
This commit is contained in:
Carl Love
parent
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commit
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1
NEWS
1
NEWS
@ -58,6 +58,7 @@ are not entered into bugzilla tend to get forgotten about or ignored.
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441534 Update the expected output for test_isa_3_1_VRT.
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442061 very slow execution under Fedora 34 (readdwarf3)
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443031 Gcc -many change requires explicit .machine directives
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443033 Add support for the ISA 3.0 mcrxrx instruction
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To see details of a given bug, visit
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https://bugs.kde.org/show_bug.cgi?id=XXXXXX
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@ -60,7 +60,8 @@ EXTRA_DIST = \
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test_darn_inst.stdout.exp test_darn_inst.vgtest \
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scv_test.stderr.exp scv_test.stdout.exp scv_test.vgtest \
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test_copy_paste.stderr.exp test_copy_paste.stdout.exp \
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test_copy_paste.vgtest
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test_copy_paste.vgtest \
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test_mcrxrx.vgtest test_mcrxrx.stderr.exp test_mcrxrx.stdout.exp
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check_PROGRAMS = \
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@ -75,7 +76,8 @@ check_PROGRAMS = \
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subnormal_test test_darn_inst test_copy_paste \
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test_tm test_touch_tm data-cache-instructions \
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std_reg_imm \
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twi_tdi tw_td power6_bcmp scv_test
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twi_tdi tw_td power6_bcmp scv_test \
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test_mcrxrx
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# lmw, stmw, lswi, lswx, stswi, stswx compile (and run) only on big endian.
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if VGCONF_PLATFORMS_INCLUDE_PPC64BE_LINUX
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@ -221,6 +223,8 @@ subnormal_test_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG)
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test_copy_paste_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(HTM_FLAG) $(ISA_3_1_FLAG) \
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@FLAG_M64@ $(BUILD_FLAGS_ISA_3_1)
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test_mcrxrx_CFLAGS = $(AM_FLAGS) -Winline -Wall -O -g -mregnames @FLAG_M64@ $(ISA_3_00_FLAG)
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test_isa_2_06_part3_LDADD = -lm
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test_dfp1_LDADD = -lm
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test_dfp2_LDADD = -lm
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@ -232,4 +236,5 @@ test_isa_2_07_part2_LDADD = -lm
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test_tm_LDADD = -lm
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test_touch_tm_LDADD = -lm
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test_isa_3_0_LDADD = -lm
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test_mcrxrx_LDADD = -lm
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113
none/tests/ppc64/test_mcrxrx.c
Normal file
113
none/tests/ppc64/test_mcrxrx.c
Normal file
@ -0,0 +1,113 @@
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/*
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* Valgrind testcase for mcrxrx.
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* This is a power9 (isa 3.0) instruction that copies
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* OV,OV32,CA,CA32 fields from the XER and places them
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* into a specified field of the CR. */
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#include <stdio.h>
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#include <string.h>
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#include <unistd.h>
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unsigned long long current_cr;
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unsigned long long current_xer;
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inline static void dissect_cr_field (unsigned long long full_cr, int offset) {
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int mask;
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int crfield;
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mask = 0xf << (offset*4);
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crfield = full_cr & mask;
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crfield = crfield >> 4*offset;
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if (crfield & 0x01) printf("(LT)"); else printf(" - ");
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if (crfield & 0x02) printf("(GT)"); else printf(" - ");
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if (crfield & 0x04) printf("(EQ)"); else printf(" - ");
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if (crfield & 0x08) printf("(SO)"); else printf(" - ");
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}
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/* dissect_xer helpers */
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static char * xer_strings[] = {
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" 0-RSVD", " 1-RSVD", " 2-RSVD", " 3-RSVD", " 4-RSVD", " 5-RSVD", " 6-RSVD",
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" 7-RSVD", " 8-RSVD", " 9-RSVD", "10-RSVD", "11-RSVD", "12-RSVD", "13-RSVD",
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"14-RSVD", "15-RSVD", "16-RSVD", "17-RSVD", "18-RSVD", "19-RSVD",
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"20-RSVD", "21-RSVD", "22-RSVD", "23-RSVD", "24-RSVD", "25-RSVD",
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"26-RSVD", "27-RSVD", "28-RSVD", "29-RSVD", "30-RSVD", "31-RSVD",
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/* 32 */ "SO", "OV", "CA",
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/* 35 */ "35-RSVD", "36-RSVD", "37-RSVD", "38-RSVD", "39-RSVD",
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/* 40 */ "40-RSVD", "41-RSVD", "42-RSVD", "43-RSVD",
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/* 44 */ "OV32", "CA32",
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/* 46 */ "46-RSVD", "47-RSVD", "48-RSVD", "49-RSVD", "50-RSVD", "51-RSVD",
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"52-RSVD", "53-RSVD", "54-RSVD", "55-RSVD", "56-RSVD",
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/* 57:63 # bytes transferred by a Load/Store String Indexed instruction. */
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"LSI/SSI-0", "LSI/SSI-1", "LSI/SSI-2", "LSI/SSI-3",
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"LSI/SSI-4", "LSI/SSI-5", "LSI/SSI-6",
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};
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/* Dissect the XER register contents.
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*/
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static void dissect_xer_raw(unsigned long local_xer) {
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int i;
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long mybit;
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char mystr[30];
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strcpy(mystr,"");
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for (i = 0; i <= 63; i++) {
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mybit = 1ULL << (63 - i); /* compensate for reversed bit numbering. */
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if (mybit & local_xer) {
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strcat(mystr,xer_strings[i]);
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strcat(mystr," ");
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}
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}
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printf(" %16s",mystr);
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}
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int main (int argc, char **argv)
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{
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#if HAS_ISA_3_00
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/* init xer to zero. */
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unsigned long long Rx = 0;
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__asm__ __volatile__ ("mtxer %0" : : "r" (Rx) :"xer");
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/* iterate over each of the interesting fields in the xer
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* OV,CA,OV32,CA32. Build a field with those bits set, and
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* push that into the XER (mtxer). */
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unsigned long long i18,i19,i29,i30;
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for (i30=0; i30<2; i30++) { // iterate OV
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for (i29=0; i29<2; i29++) { // iterate CA
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for (i19=0; i19<2; i19++) { // iterate OV32
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for (i18=0; i18<2; i18++) { // iterate CA32
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Rx = i18 << 18;
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Rx += i19 << 19;
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Rx += i29 << 29;
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Rx += i30 << 30;
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printf("mcrxrx ");
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/* move 'Rx' value into the xer. */
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__asm__ __volatile__ ("mtxer %0" : : "r" (Rx) :"xer");
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/* Retrieve the XER and print it. */
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__asm__ __volatile__ ("mfxer %0" : "=b"(current_xer) );
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/* Moving the xer contents to the CR field # 2
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* using the mcrxr instruction. */
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__asm__ __volatile__ (".machine push;" \
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".machine power9;" \
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"mcrxrx 2;" \
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".machine pop;" );
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/* Copy the cr into a reg so we can print it.. */
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__asm__ __volatile__ ("mfcr %0" : "=b"(current_cr) );
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dissect_xer_raw(current_xer);
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printf(" => ");
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dissect_cr_field(current_cr,5);
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printf("\n");
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}
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}
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}
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}
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#else
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printf("HAS_ISA_3_00 not detected.\n");
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#endif
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return 0;
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}
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2
none/tests/ppc64/test_mcrxrx.stderr.exp
Normal file
2
none/tests/ppc64/test_mcrxrx.stderr.exp
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16
none/tests/ppc64/test_mcrxrx.stdout.exp
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16
none/tests/ppc64/test_mcrxrx.stdout.exp
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mcrxrx => - - - -
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mcrxrx CA32 => (LT) - - -
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mcrxrx OV32 => - - (EQ) -
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mcrxrx OV32 CA32 => (LT) - (EQ) -
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mcrxrx CA => - (GT) - -
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mcrxrx CA CA32 => (LT)(GT) - -
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mcrxrx CA OV32 => - (GT)(EQ) -
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mcrxrx CA OV32 CA32 => (LT)(GT)(EQ) -
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mcrxrx OV => - - - (SO)
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mcrxrx OV CA32 => (LT) - - (SO)
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mcrxrx OV OV32 => - - (EQ)(SO)
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mcrxrx OV OV32 CA32 => (LT) - (EQ)(SO)
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mcrxrx OV CA => - (GT) - (SO)
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mcrxrx OV CA CA32 => (LT)(GT) - (SO)
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mcrxrx OV CA OV32 => - (GT)(EQ)(SO)
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mcrxrx OV CA OV32 CA32 => (LT)(GT)(EQ)(SO)
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2
none/tests/ppc64/test_mcrxrx.vgtest
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2
none/tests/ppc64/test_mcrxrx.vgtest
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prereq: ../../../tests/check_ppc64_auxv_cap arch_3_00
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prog: test_mcrxrx
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