mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-04 02:18:37 +00:00
Handle IRLoadG and IRStoreG.
git-svn-id: svn://svn.valgrind.org/valgrind/branches/COMEM@13189
This commit is contained in:
parent
eab3c85005
commit
77113fe633
128
lackey/lk_main.c
128
lackey/lk_main.c
@ -292,6 +292,10 @@ static void add_one_inverted_Jcc_untaken(void)
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/*--- Stuff for --detailed-counts ---*/
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/*------------------------------------------------------------*/
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typedef
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IRExpr
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IRAtom;
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/* --- Operations --- */
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typedef enum { OpLoad=0, OpStore=1, OpAlu=2 } Op;
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@ -351,8 +355,10 @@ void increment_detail(ULong* detail)
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(*detail)++;
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}
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/* A helper that adds the instrumentation for a detail. */
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static void instrument_detail(IRSB* sb, Op op, IRType type)
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/* A helper that adds the instrumentation for a detail. guard ::
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Ity_I1 is the guarding condition for the event. If NULL it is
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assumed to mean "always True". */
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static void instrument_detail(IRSB* sb, Op op, IRType type, IRAtom* guard)
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{
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IRDirty* di;
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IRExpr** argv;
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@ -365,6 +371,7 @@ static void instrument_detail(IRSB* sb, Op op, IRType type)
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di = unsafeIRDirty_0_N( 1, "increment_detail",
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VG_(fnptr_to_fnentry)( &increment_detail ),
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argv);
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if (guard) di->guard = guard;
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addStmtToIRSB( sb, IRStmt_Dirty(di) );
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}
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@ -391,10 +398,6 @@ static void print_details ( void )
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#define MAX_DSIZE 512
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typedef
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IRExpr
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IRAtom;
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typedef
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enum { Event_Ir, Event_Dr, Event_Dw, Event_Dm }
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EventKind;
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@ -404,6 +407,7 @@ typedef
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EventKind ekind;
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IRAtom* addr;
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Int size;
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IRAtom* guard; /* :: Ity_I1, or NULL=="always True" */
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}
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Event;
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@ -499,6 +503,9 @@ static void flushEvents(IRSB* sb)
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di = unsafeIRDirty_0_N( /*regparms*/2,
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helperName, VG_(fnptr_to_fnentry)( helperAddr ),
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argv );
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if (ev->guard) {
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di->guard = ev->guard;
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}
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addStmtToIRSB( sb, IRStmt_Dirty(di) );
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}
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@ -523,11 +530,13 @@ static void addEvent_Ir ( IRSB* sb, IRAtom* iaddr, UInt isize )
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evt->ekind = Event_Ir;
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evt->addr = iaddr;
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evt->size = isize;
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evt->guard = NULL;
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events_used++;
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}
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/* Add a guarded read event. */
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static
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void addEvent_Dr ( IRSB* sb, IRAtom* daddr, Int dsize )
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void addEvent_Dr_guarded ( IRSB* sb, IRAtom* daddr, Int dsize, IRAtom* guard )
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{
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Event* evt;
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tl_assert(clo_trace_mem);
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@ -540,9 +549,40 @@ void addEvent_Dr ( IRSB* sb, IRAtom* daddr, Int dsize )
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evt->ekind = Event_Dr;
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evt->addr = daddr;
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evt->size = dsize;
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evt->guard = guard;
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events_used++;
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}
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/* Add an ordinary read event, by adding a guarded read event with an
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always-true guard. */
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static
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void addEvent_Dr ( IRSB* sb, IRAtom* daddr, Int dsize )
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{
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addEvent_Dr_guarded(sb, daddr, dsize, NULL);
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}
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/* Add a guarded write event. */
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static
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void addEvent_Dw_guarded ( IRSB* sb, IRAtom* daddr, Int dsize, IRAtom* guard )
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{
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Event* evt;
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tl_assert(clo_trace_mem);
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tl_assert(isIRAtom(daddr));
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tl_assert(dsize >= 1 && dsize <= MAX_DSIZE);
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if (events_used == N_EVENTS)
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flushEvents(sb);
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tl_assert(events_used >= 0 && events_used < N_EVENTS);
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evt = &events[events_used];
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evt->ekind = Event_Dw;
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evt->addr = daddr;
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evt->size = dsize;
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evt->guard = guard;
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events_used++;
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}
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/* Add an ordinary write event. Try to merge it with an immediately
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preceding ordinary read event of the same size to the same
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address. */
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static
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void addEvent_Dw ( IRSB* sb, IRAtom* daddr, Int dsize )
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{
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@ -555,9 +595,10 @@ void addEvent_Dw ( IRSB* sb, IRAtom* daddr, Int dsize )
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// Is it possible to merge this write with the preceding read?
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lastEvt = &events[events_used-1];
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if (events_used > 0
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&& lastEvt->ekind == Event_Dr
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&& lastEvt->size == dsize
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&& eqIRAtom(lastEvt->addr, daddr))
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&& lastEvt->ekind == Event_Dr
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&& lastEvt->size == dsize
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&& lastEvt->guard == NULL
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&& eqIRAtom(lastEvt->addr, daddr))
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{
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lastEvt->ekind = Event_Dm;
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return;
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@ -571,6 +612,7 @@ void addEvent_Dw ( IRSB* sb, IRAtom* daddr, Int dsize )
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evt->ekind = Event_Dw;
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evt->size = dsize;
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evt->addr = daddr;
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evt->guard = NULL;
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events_used++;
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}
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@ -612,7 +654,6 @@ IRSB* lk_instrument ( VgCallbackClosure* closure,
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Int i;
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IRSB* sbOut;
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HChar fnname[100];
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IRType type;
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IRTypeEnv* tyenv = sbIn->tyenv;
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Addr iaddr = 0, dst;
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UInt ilen = 0;
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@ -733,18 +774,18 @@ IRSB* lk_instrument ( VgCallbackClosure* closure,
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}
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if (clo_detailed_counts) {
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IRExpr* expr = st->Ist.WrTmp.data;
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type = typeOfIRExpr(sbOut->tyenv, expr);
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IRType type = typeOfIRExpr(sbOut->tyenv, expr);
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tl_assert(type != Ity_INVALID);
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switch (expr->tag) {
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case Iex_Load:
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instrument_detail( sbOut, OpLoad, type );
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instrument_detail( sbOut, OpLoad, type, NULL/*guard*/ );
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break;
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case Iex_Unop:
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case Iex_Binop:
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case Iex_Triop:
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case Iex_Qop:
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case Iex_Mux0X:
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instrument_detail( sbOut, OpAlu, type );
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instrument_detail( sbOut, OpAlu, type, NULL/*guard*/ );
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break;
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default:
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break;
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@ -753,19 +794,53 @@ IRSB* lk_instrument ( VgCallbackClosure* closure,
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addStmtToIRSB( sbOut, st );
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break;
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case Ist_Store:
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case Ist_Store: {
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IRExpr* data = st->Ist.Store.data;
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IRType type = typeOfIRExpr(tyenv, data);
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tl_assert(type != Ity_INVALID);
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if (clo_trace_mem) {
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IRExpr* data = st->Ist.Store.data;
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addEvent_Dw( sbOut, st->Ist.Store.addr,
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sizeofIRType(typeOfIRExpr(tyenv, data)) );
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sizeofIRType(type) );
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}
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if (clo_detailed_counts) {
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type = typeOfIRExpr(sbOut->tyenv, st->Ist.Store.data);
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tl_assert(type != Ity_INVALID);
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instrument_detail( sbOut, OpStore, type );
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instrument_detail( sbOut, OpStore, type, NULL/*guard*/ );
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}
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addStmtToIRSB( sbOut, st );
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break;
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}
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case Ist_StoreG: {
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IRStoreG* sg = st->Ist.StoreG.details;
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IRExpr* data = sg->data;
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IRType type = typeOfIRExpr(tyenv, data);
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tl_assert(type != Ity_INVALID);
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if (clo_trace_mem) {
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addEvent_Dw_guarded( sbOut, sg->addr,
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sizeofIRType(type), sg->guard );
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}
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if (clo_detailed_counts) {
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instrument_detail( sbOut, OpStore, type, sg->guard );
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}
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addStmtToIRSB( sbOut, st );
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break;
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}
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case Ist_LoadG: {
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IRLoadG* lg = st->Ist.LoadG.details;
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IRType type = Ity_INVALID; /* loaded type */
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IRType typeWide = Ity_INVALID; /* after implicit widening */
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typeOfIRLoadGOp(lg->cvt, &typeWide, &type);
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tl_assert(type != Ity_INVALID);
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if (clo_trace_mem) {
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addEvent_Dr_guarded( sbOut, lg->addr,
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sizeofIRType(type), lg->guard );
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}
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if (clo_detailed_counts) {
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instrument_detail( sbOut, OpLoad, type, lg->guard );
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}
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addStmtToIRSB( sbOut, st );
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break;
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}
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case Ist_Dirty: {
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if (clo_trace_mem) {
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@ -809,12 +884,12 @@ IRSB* lk_instrument ( VgCallbackClosure* closure,
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addEvent_Dw( sbOut, cas->addr, dataSize );
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}
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if (clo_detailed_counts) {
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instrument_detail( sbOut, OpLoad, dataTy );
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instrument_detail( sbOut, OpLoad, dataTy, NULL/*guard*/ );
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if (cas->dataHi != NULL) /* dcas */
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instrument_detail( sbOut, OpLoad, dataTy );
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instrument_detail( sbOut, OpStore, dataTy );
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instrument_detail( sbOut, OpLoad, dataTy, NULL/*guard*/ );
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instrument_detail( sbOut, OpStore, dataTy, NULL/*guard*/ );
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if (cas->dataHi != NULL) /* dcas */
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instrument_detail( sbOut, OpStore, dataTy );
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instrument_detail( sbOut, OpStore, dataTy, NULL/*guard*/ );
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}
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addStmtToIRSB( sbOut, st );
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break;
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@ -829,7 +904,7 @@ IRSB* lk_instrument ( VgCallbackClosure* closure,
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addEvent_Dr( sbOut, st->Ist.LLSC.addr,
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sizeofIRType(dataTy) );
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if (clo_detailed_counts)
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instrument_detail( sbOut, OpLoad, dataTy );
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instrument_detail( sbOut, OpLoad, dataTy, NULL/*guard*/ );
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} else {
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/* SC */
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dataTy = typeOfIRExpr(tyenv, st->Ist.LLSC.storedata);
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@ -837,7 +912,7 @@ IRSB* lk_instrument ( VgCallbackClosure* closure,
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addEvent_Dw( sbOut, st->Ist.LLSC.addr,
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sizeofIRType(dataTy) );
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if (clo_detailed_counts)
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instrument_detail( sbOut, OpStore, dataTy );
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instrument_detail( sbOut, OpStore, dataTy, NULL/*guard*/ );
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}
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addStmtToIRSB( sbOut, st );
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break;
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@ -889,6 +964,7 @@ IRSB* lk_instrument ( VgCallbackClosure* closure,
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break;
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default:
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ppIRStmt(st);
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tl_assert(0);
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}
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}
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