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Callgrind: Remove ifdef'ed-out, non-working code.

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Rechecking the diff of r9080 on the mailing list, I thought
I forgot to replace "|" with "+" in one spot. But that was part
of not-used code, so it actually does not matter.
So better get rid of this code part at all (no need to backport ;-).

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@9081
This commit is contained in:
Josef Weidendorfer 2009-01-26 23:21:18 +00:00
parent 3a5719678f
commit 70084d4fa2
1 changed files with 0 additions and 95 deletions
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95
callgrind/sim.c
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@ -680,101 +680,6 @@ void cacheuse_initcache(cache_t2* c)
}
}
/* FIXME: A little tricky */
#if 0
static __inline__
void cacheuse_update_hit(cache_t2* c, UInt high_idx, UInt low_idx, UInt use_mask)
{
int idx = (high_idx * c->assoc) + low_idx;
c->use[idx].count ++;
c->use[idx].mask |= use_mask;
CLG_DEBUG(6," Hit [idx %d] (line %#lx from %#lx): %x => %08x, count %d\n",
idx, c->loaded[idx].memline, c->loaded[idx].iaddr,
use_mask, c->use[idx].mask, c->use[idx].count);
}
/* only used for I1, D1 */
static __inline__
CacheResult cacheuse_setref(cache_t2* c, UInt set_no, UWord tag)
{
int i, j, idx;
UWord *set, tmp_tag;
UInt use_mask;
set = &(c->tags[set_no * c->assoc]);
use_mask =
c->line_start_mask[a & c->line_size_mask] &
c->line_end_mask[(a+size-1) & c->line_size_mask];
/* This loop is unrolled for just the first case, which is the most */
/* common. We can't unroll any further because it would screw up */
/* if we have a direct-mapped (1-way) cache. */
if (tag == (set[0] & c->tag_mask)) {
cacheuse_update(c, set_no, set[0] & ~c->tag_mask, use_mask);
return L1_Hit;
}
/* If the tag is one other than the MRU, move it into the MRU spot */
/* and shuffle the rest down. */
for (i = 1; i < c->assoc; i++) {
if (tag == (set[i] & c->tag_mask)) {
tmp_tag = set[i];
for (j = i; j > 0; j--) {
set[j] = set[j - 1];
}
set[0] = tmp_tag;
cacheuse_update(c, set_no, tmp_tag & ~c->tag_mask, use_mask);
return L1_Hit;
}
}
/* A miss; install this tag as MRU, shuffle rest down. */
tmp_tag = set[L.assoc - 1] & ~c->tag_mask;
for (j = c->assoc - 1; j > 0; j--) {
set[j] = set[j - 1];
}
set[0] = tag | tmp_tag;
cacheuse_L2_miss(c, (set_no * c->assoc) | tmp_tag,
use_mask, a & ~c->line_size_mask);
return Miss;
}
static CacheResult cacheuse_ref(cache_t2* c, Addr a, UChar size)
{
UInt set1 = ( a >> c->line_size_bits) & (c->sets_min_1);
UInt set2 = ((a+size-1) >> c->line_size_bits) & (c->sets_min_1);
UWord tag = a & c->tag_mask;
/* Access entirely within line. */
if (set1 == set2)
return cacheuse_setref(c, set1, tag);
/* Access straddles two lines. */
/* Nb: this is a fast way of doing ((set1+1) % c->sets) */
else if (((set1 + 1) & (c->sets-1)) == set2) {
UWord tag2 = a & c->tag_mask;
/* the call updates cache structures as side effect */
CacheResult res1 = cacheuse_isMiss(c, set1, tag);
CacheResult res2 = cacheuse_isMiss(c, set2, tag2);
return ((res1 == Miss) || (res2 == Miss)) ? Miss : Hit;
} else {
VG_(printf)("addr: %x size: %u sets: %d %d", a, size, set1, set2);
VG_(tool_panic)("item straddles more than two cache sets");
}
return Hit;
}
#endif
/* for I1/D1 caches */
#define CACHEUSE(L) \