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https://github.com/Zenithsiz/ftmemsim-valgrind.git
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Add test cases for out-of-range argument handling for x87 instructions
FSIN, FCOS, FSINCOS and FPTAN. Mozilla bug 995564. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13921
This commit is contained in:
Julian Seward
parent
d8b376f404
commit
6199b0550b
@ -80,6 +80,7 @@ EXTRA_DIST = \
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slahf-amd64.stderr.exp slahf-amd64.stdout.exp \
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slahf-amd64.vgtest \
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tm1.vgtest tm1.stderr.exp tm1.stdout.exp \
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x87trigOOR.vgtest x87trigOOR.stderr.exp x87trigOOR.stdout.exp \
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xacq_xrel.stderr.exp xacq_xrel.stdout.exp xacq_xrel.vgtest \
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xadd.stderr.exp xadd.stdout.exp xadd.vgtest
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@ -96,6 +97,7 @@ check_PROGRAMS = \
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smc1 \
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sbbmisc \
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nibz_bennee_mmap \
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x87trigOOR \
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xadd
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if BUILD_ADDR32_TESTS
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check_PROGRAMS += asorep
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1
none/tests/amd64/x87trigOOR.c
Symbolic link
1
none/tests/amd64/x87trigOOR.c
Symbolic link
@ -0,0 +1 @@
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../x86/x87trigOOR.c
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2
none/tests/amd64/x87trigOOR.stderr.exp
Normal file
2
none/tests/amd64/x87trigOOR.stderr.exp
Normal file
@ -0,0 +1,2 @@
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72
none/tests/amd64/x87trigOOR.stdout.exp
Normal file
72
none/tests/amd64/x87trigOOR.stdout.exp
Normal file
@ -0,0 +1,72 @@
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fsin 0.000000e+00 --> 0.000000e+00 3.141593e+00 0000
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fsin 1.230000e-01 --> 1.226901e-01 3.141593e+00 0000
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fsin -4.560000e-01 --> -4.403604e-01 3.141593e+00 0000
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fsin 3.700000e+01 --> -6.435381e-01 3.141593e+00 0000
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fsin -5.300000e+01 --> -3.959252e-01 3.141593e+00 0000
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fsin 8.301035e+18 --> -1.249775e-01 3.141593e+00 0000
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fsin 9.223363e+18 --> 2.344065e-01 3.141593e+00 0000
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fsin 9.223372e+18 --> 9.223372e+18 3.141593e+00 0400
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fsin 9.223381e+18 --> 9.223381e+18 3.141593e+00 0400
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fsin 1.014571e+19 --> 1.014571e+19 3.141593e+00 0400
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fsin -8.301035e+18 --> 1.249775e-01 3.141593e+00 0000
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fsin -9.223363e+18 --> -2.344065e-01 3.141593e+00 0000
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fsin -9.223372e+18 --> -9.223372e+18 3.141593e+00 0400
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fsin -9.223381e+18 --> -9.223381e+18 3.141593e+00 0400
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fsin -1.014571e+19 --> -1.014571e+19 3.141593e+00 0400
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fcos 0.000000e+00 --> 1.000000e+00 3.141593e+00 0000
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fcos 1.230000e-01 --> 9.924450e-01 3.141593e+00 0000
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fcos -4.560000e-01 --> 8.978211e-01 3.141593e+00 0000
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fcos 3.700000e+01 --> 7.654141e-01 3.141593e+00 0000
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fcos -5.300000e+01 --> -9.182828e-01 3.141593e+00 0000
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fcos 8.301035e+18 --> -9.921596e-01 3.141593e+00 0000
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fcos 9.223363e+18 --> 9.721387e-01 3.141593e+00 0000
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fcos 9.223372e+18 --> 9.223372e+18 3.141593e+00 0400
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fcos 9.223381e+18 --> 9.223381e+18 3.141593e+00 0400
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fcos 1.014571e+19 --> 1.014571e+19 3.141593e+00 0400
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fcos -8.301035e+18 --> -9.921596e-01 3.141593e+00 0000
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fcos -9.223363e+18 --> 9.721387e-01 3.141593e+00 0000
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fcos -9.223372e+18 --> -9.223372e+18 3.141593e+00 0400
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fcos -9.223381e+18 --> -9.223381e+18 3.141593e+00 0400
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fcos -1.014571e+19 --> -1.014571e+19 3.141593e+00 0400
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fsincos 0.000000e+00 --> 1.000000e+00 0.000000e+00 0000
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fsincos 1.230000e-01 --> 9.924450e-01 1.226901e-01 0000
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fsincos -4.560000e-01 --> 8.978211e-01 -4.403604e-01 0000
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fsincos 3.700000e+01 --> 7.654141e-01 -6.435381e-01 0000
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fsincos -5.300000e+01 --> -9.182828e-01 -3.959252e-01 0000
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fsincos 8.301035e+18 --> -9.921596e-01 -1.249775e-01 0000
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fsincos 9.223363e+18 --> 9.721387e-01 2.344065e-01 0000
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fsincos 9.223372e+18 --> 9.223372e+18 3.141593e+00 0400
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fsincos 9.223381e+18 --> 9.223381e+18 3.141593e+00 0400
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fsincos 1.014571e+19 --> 1.014571e+19 3.141593e+00 0400
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fsincos -8.301035e+18 --> -9.921596e-01 1.249775e-01 0000
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fsincos -9.223363e+18 --> 9.721387e-01 -2.344065e-01 0000
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fsincos -9.223372e+18 --> -9.223372e+18 3.141593e+00 0400
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fsincos -9.223381e+18 --> -9.223381e+18 3.141593e+00 0400
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fsincos -1.014571e+19 --> -1.014571e+19 3.141593e+00 0400
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fptan 0.000000e+00 --> 1.000000e+00 0.000000e+00 0000
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fptan 1.230000e-01 --> 1.000000e+00 1.236241e-01 0000
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fptan -4.560000e-01 --> 1.000000e+00 -4.904767e-01 0000
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fptan 3.700000e+01 --> 1.000000e+00 -8.407713e-01 0000
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fptan -5.300000e+01 --> 1.000000e+00 4.311582e-01 0000
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fptan 8.301035e+18 --> 1.000000e+00 1.259651e-01 0000
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fptan 9.223363e+18 --> 1.000000e+00 2.411246e-01 0000
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fptan 9.223372e+18 --> 9.223372e+18 3.141593e+00 0400
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fptan 9.223381e+18 --> 9.223381e+18 3.141593e+00 0400
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fptan 1.014571e+19 --> 1.014571e+19 3.141593e+00 0400
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fptan -8.301035e+18 --> 1.000000e+00 -1.259651e-01 0000
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fptan -9.223363e+18 --> 1.000000e+00 -2.411246e-01 0000
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fptan -9.223372e+18 --> -9.223372e+18 3.141593e+00 0400
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fptan -9.223381e+18 --> -9.223381e+18 3.141593e+00 0400
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fptan -1.014571e+19 --> -1.014571e+19 3.141593e+00 0400
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1
none/tests/amd64/x87trigOOR.vgtest
Normal file
1
none/tests/amd64/x87trigOOR.vgtest
Normal file
@ -0,0 +1 @@
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prog: x87trigOOR
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@ -61,6 +61,7 @@ EXTRA_DIST = \
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ssse3_misaligned.stderr.exp ssse3_misaligned.stdout.exp \
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ssse3_misaligned.vgtest ssse3_misaligned.c \
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x86locked.vgtest x86locked.stdout.exp x86locked.stderr.exp \
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x87trigOOR.vgtest x87trigOOR.stdout.exp x87trigOOR.stderr.exp \
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yield.stderr.exp yield.stdout.exp yield.disabled \
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xadd.stdout.exp xadd.stderr.exp xadd.vgtest
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@ -94,6 +95,7 @@ check_PROGRAMS = \
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shift_ndep \
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smc1 \
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x86locked \
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x87trigOOR \
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yield \
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xadd
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if BUILD_SSSE3_TESTS
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159
none/tests/x86/x87trigOOR.c
Normal file
159
none/tests/x86/x87trigOOR.c
Normal file
@ -0,0 +1,159 @@
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/* Tests out of range handling for FSIN, FCOS, FSINCOS and FPTAN. Be
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careful with the inline assembly -- this program is compiled as
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both a 32-bit and 64-bit test. */
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#include <stdio.h>
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#include <string.h>
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#include <assert.h>
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typedef unsigned short int UShort;
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typedef unsigned int UInt;
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typedef double Double;
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typedef unsigned long long int ULong;
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typedef struct { Double arg; Double st0; Double st1; UShort fpusw; } Res;
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#define SHIFT_C3 14
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#define SHIFT_C2 10
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#define SHIFT_C1 9
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#define SHIFT_C0 8
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#define my_offsetof(type,memb) ((int)(unsigned long int)&((type*)0)->memb)
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void do_fsin ( /*OUT*/Res* r, double d )
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{
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assert(my_offsetof(Res,arg) == 0);
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assert(my_offsetof(Res,st0) == 8);
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assert(my_offsetof(Res,st1) == 16);
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assert(my_offsetof(Res,fpusw) == 24);
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memset(r, 0, sizeof(*r));
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r->arg = d;
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__asm__ __volatile__(
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"finit" "\n\t"
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"fldpi" "\n\t"
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"fldl 0(%0)" "\n\t" // .arg
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"fsin" "\n\t"
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"fstsw %%ax" "\n\t"
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"fstpl 8(%0)" "\n\t" // .st0
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"fstpl 16(%0)" "\n\t" // .st1
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"movw %%ax, 24(%0)" "\n\t" // .fpusw
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"finit" "\n"
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: : "r"(r) : "eax","cc","memory"
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);
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}
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void do_fcos ( /*OUT*/Res* r, double d )
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{
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assert(my_offsetof(Res,arg) == 0);
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assert(my_offsetof(Res,st0) == 8);
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assert(my_offsetof(Res,st1) == 16);
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assert(my_offsetof(Res,fpusw) == 24);
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memset(r, 0, sizeof(*r));
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r->arg = d;
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__asm__ __volatile__(
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"finit" "\n\t"
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"fldpi" "\n\t"
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"fldl 0(%0)" "\n\t" // .arg
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"fcos" "\n\t"
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"fstsw %%ax" "\n\t"
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"fstpl 8(%0)" "\n\t" // .st0
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"fstpl 16(%0)" "\n\t" // .st1
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"movw %%ax, 24(%0)" "\n\t" // .fpusw
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"finit" "\n"
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: : "r"(r) : "eax","cc","memory"
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);
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}
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void do_fsincos ( /*OUT*/Res* r, double d )
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{
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assert(my_offsetof(Res,arg) == 0);
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assert(my_offsetof(Res,st0) == 8);
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assert(my_offsetof(Res,st1) == 16);
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assert(my_offsetof(Res,fpusw) == 24);
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memset(r, 0, sizeof(*r));
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r->arg = d;
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__asm__ __volatile__(
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"finit" "\n\t"
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"fldpi" "\n\t"
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"fldl 0(%0)" "\n\t" // .arg
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"fsincos" "\n\t"
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"fstsw %%ax" "\n\t"
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"fstpl 8(%0)" "\n\t" // .st0
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"fstpl 16(%0)" "\n\t" // .st1
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"movw %%ax, 24(%0)" "\n\t" // .fpusw
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"finit" "\n"
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: : "r"(r) : "eax","cc","memory"
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);
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}
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void do_fptan ( /*OUT*/Res* r, double d )
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{
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assert(my_offsetof(Res,arg) == 0);
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assert(my_offsetof(Res,st0) == 8);
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assert(my_offsetof(Res,st1) == 16);
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assert(my_offsetof(Res,fpusw) == 24);
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memset(r, 0, sizeof(*r));
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r->arg = d;
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__asm__ __volatile__(
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"finit" "\n\t"
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"fldpi" "\n\t"
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"fldl 0(%0)" "\n\t" // .arg
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"fptan" "\n\t"
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"fstsw %%ax" "\n\t"
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"fstpl 8(%0)" "\n\t" // .st0
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"fstpl 16(%0)" "\n\t" // .st1
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"movw %%ax, 24(%0)" "\n\t" // .fpusw
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"finit" "\n"
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: : "r"(r) : "eax","cc","memory"
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);
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}
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void try ( char* name, void(*fn)(Res*,double), double d )
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{
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Res r;
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fn(&r, d);
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// Mask out all except C2 (range)
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r.fpusw &= (1 << SHIFT_C2);
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printf("%s %16e --> %16e %16e %04x\n",
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name, r.arg, r.st0, r.st1, (UInt)r.fpusw);
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}
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int main ( void )
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{
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Double limit = 9223372036854775808.0; // 2^63
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char* names[4] = { "fsin ", "fcos ", "fsincos", "fptan " };
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void(*fns[4])(Res*,double) = { do_fsin, do_fcos, do_fsincos, do_fptan };
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int i;
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for (i = 0; i < 4; i++) {
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char* name = names[i];
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void (*fn)(Res*,double) = fns[i];
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try( name, fn, 0.0 );
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try( name, fn, 0.123 );
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try( name, fn, -0.456 );
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try( name, fn, 37.0 );
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try( name, fn, -53.0 );
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printf("\n");
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try( name, fn, limit * 0.900000 );
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try( name, fn, limit * 0.999999 );
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try( name, fn, limit * 1.000000 );
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try( name, fn, limit * 1.000001 );
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try( name, fn, limit * 1.100000 );
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printf("\n");
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try( name, fn, -limit * 0.900000 );
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try( name, fn, -limit * 0.999999 );
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try( name, fn, -limit * 1.000000 );
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try( name, fn, -limit * 1.000001 );
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try( name, fn, -limit * 1.100000 );
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printf("\n");
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}
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return 0;
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}
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2
none/tests/x86/x87trigOOR.stderr.exp
Normal file
2
none/tests/x86/x87trigOOR.stderr.exp
Normal file
@ -0,0 +1,2 @@
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72
none/tests/x86/x87trigOOR.stdout.exp
Normal file
72
none/tests/x86/x87trigOOR.stdout.exp
Normal file
@ -0,0 +1,72 @@
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fsin 0.000000e+00 --> 0.000000e+00 3.141593e+00 0000
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fsin 1.230000e-01 --> 1.226901e-01 3.141593e+00 0000
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fsin -4.560000e-01 --> -4.403604e-01 3.141593e+00 0000
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fsin 3.700000e+01 --> -6.435381e-01 3.141593e+00 0000
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fsin -5.300000e+01 --> -3.959252e-01 3.141593e+00 0000
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fsin 8.301035e+18 --> -1.249775e-01 3.141593e+00 0000
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fsin 9.223363e+18 --> 2.344065e-01 3.141593e+00 0000
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fsin 9.223372e+18 --> 9.223372e+18 3.141593e+00 0400
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fsin 9.223381e+18 --> 9.223381e+18 3.141593e+00 0400
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fsin 1.014571e+19 --> 1.014571e+19 3.141593e+00 0400
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fsin -8.301035e+18 --> 1.249775e-01 3.141593e+00 0000
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fsin -9.223363e+18 --> -2.344065e-01 3.141593e+00 0000
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fsin -9.223372e+18 --> -9.223372e+18 3.141593e+00 0400
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fsin -9.223381e+18 --> -9.223381e+18 3.141593e+00 0400
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fsin -1.014571e+19 --> -1.014571e+19 3.141593e+00 0400
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fcos 0.000000e+00 --> 1.000000e+00 3.141593e+00 0000
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fcos 1.230000e-01 --> 9.924450e-01 3.141593e+00 0000
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fcos -4.560000e-01 --> 8.978211e-01 3.141593e+00 0000
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fcos 3.700000e+01 --> 7.654141e-01 3.141593e+00 0000
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fcos -5.300000e+01 --> -9.182828e-01 3.141593e+00 0000
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fcos 8.301035e+18 --> -9.921596e-01 3.141593e+00 0000
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fcos 9.223363e+18 --> 9.721387e-01 3.141593e+00 0000
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fcos 9.223372e+18 --> 9.223372e+18 3.141593e+00 0400
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fcos 9.223381e+18 --> 9.223381e+18 3.141593e+00 0400
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fcos 1.014571e+19 --> 1.014571e+19 3.141593e+00 0400
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fcos -8.301035e+18 --> -9.921596e-01 3.141593e+00 0000
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fcos -9.223363e+18 --> 9.721387e-01 3.141593e+00 0000
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fcos -9.223372e+18 --> -9.223372e+18 3.141593e+00 0400
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fcos -9.223381e+18 --> -9.223381e+18 3.141593e+00 0400
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fcos -1.014571e+19 --> -1.014571e+19 3.141593e+00 0400
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fsincos 0.000000e+00 --> 1.000000e+00 0.000000e+00 0000
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fsincos 1.230000e-01 --> 9.924450e-01 1.226901e-01 0000
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fsincos -4.560000e-01 --> 8.978211e-01 -4.403604e-01 0000
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fsincos 3.700000e+01 --> 7.654141e-01 -6.435381e-01 0000
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fsincos -5.300000e+01 --> -9.182828e-01 -3.959252e-01 0000
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fsincos 8.301035e+18 --> -9.921596e-01 -1.249775e-01 0000
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fsincos 9.223363e+18 --> 9.721387e-01 2.344065e-01 0000
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fsincos 9.223372e+18 --> 9.223372e+18 3.141593e+00 0400
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fsincos 9.223381e+18 --> 9.223381e+18 3.141593e+00 0400
|
||||
fsincos 1.014571e+19 --> 1.014571e+19 3.141593e+00 0400
|
||||
|
||||
fsincos -8.301035e+18 --> -9.921596e-01 1.249775e-01 0000
|
||||
fsincos -9.223363e+18 --> 9.721387e-01 -2.344065e-01 0000
|
||||
fsincos -9.223372e+18 --> -9.223372e+18 3.141593e+00 0400
|
||||
fsincos -9.223381e+18 --> -9.223381e+18 3.141593e+00 0400
|
||||
fsincos -1.014571e+19 --> -1.014571e+19 3.141593e+00 0400
|
||||
|
||||
fptan 0.000000e+00 --> 1.000000e+00 0.000000e+00 0000
|
||||
fptan 1.230000e-01 --> 1.000000e+00 1.236241e-01 0000
|
||||
fptan -4.560000e-01 --> 1.000000e+00 -4.904767e-01 0000
|
||||
fptan 3.700000e+01 --> 1.000000e+00 -8.407713e-01 0000
|
||||
fptan -5.300000e+01 --> 1.000000e+00 4.311582e-01 0000
|
||||
|
||||
fptan 8.301035e+18 --> 1.000000e+00 1.259651e-01 0000
|
||||
fptan 9.223363e+18 --> 1.000000e+00 2.411246e-01 0000
|
||||
fptan 9.223372e+18 --> 9.223372e+18 3.141593e+00 0400
|
||||
fptan 9.223381e+18 --> 9.223381e+18 3.141593e+00 0400
|
||||
fptan 1.014571e+19 --> 1.014571e+19 3.141593e+00 0400
|
||||
|
||||
fptan -8.301035e+18 --> 1.000000e+00 -1.259651e-01 0000
|
||||
fptan -9.223363e+18 --> 1.000000e+00 -2.411246e-01 0000
|
||||
fptan -9.223372e+18 --> -9.223372e+18 3.141593e+00 0400
|
||||
fptan -9.223381e+18 --> -9.223381e+18 3.141593e+00 0400
|
||||
fptan -1.014571e+19 --> -1.014571e+19 3.141593e+00 0400
|
||||
|
||||
1
none/tests/x86/x87trigOOR.vgtest
Normal file
1
none/tests/x86/x87trigOOR.vgtest
Normal file
@ -0,0 +1 @@
|
||||
prog: x87trigOOR
|
||||
Loading…
x
Reference in New Issue
Block a user