mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-03 18:13:01 +00:00
Clarified an implementation choice.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@10429
This commit is contained in:
parent
6b56e137c9
commit
5f83d3907f
@ -557,11 +557,14 @@ IRSB* DRD_(instrument)(VgCallbackClosure* const closure,
|
||||
case Ist_CAS:
|
||||
if (instrument)
|
||||
{
|
||||
/* Just treat this as a read of the location. I believe
|
||||
this is equivalent to the previous logic, which
|
||||
observed bus-lock/unlock Ist_MBEs, and ignored all
|
||||
writes within sections bracketed by bus-lock and
|
||||
bus-unlock annotations. */
|
||||
/*
|
||||
* Treat compare-and-swap as a read. By handling atomic
|
||||
* instructions as read instructions no data races are reported
|
||||
* between conflicting atomic operations nor between atomic
|
||||
* operations and non-atomic reads. Conflicts between atomic
|
||||
* operations and non-atomic write operations are still reported
|
||||
* however.
|
||||
*/
|
||||
Int dataSize;
|
||||
IRCAS* cas = st->Ist.CAS.details;
|
||||
tl_assert(cas->addr != NULL);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user