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Track changes to PPC naming convention - VEX r1504

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git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5416
This commit is contained in:
Cerion Armour-Brown 2005-12-23 00:57:03 +00:00
parent ea279c7b15
commit 50920605fe
3 changed files with 15 additions and 9 deletions
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18
coregrind/m_machine.c
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@ -238,6 +238,12 @@ Bool VG_(thread_stack_next)(ThreadId* tid, Addr* stack_min, Addr* stack_max)
then safe to use VG_(machine_get_VexArchInfo)
and VG_(machine_ppc32_has_FP)
and VG_(machine_ppc32_has_VMX)
-------------
ppc64: initially: call VG_(machine_get_hwcaps)
call VG_(machine_ppc64_set_clszB)
then safe to use VG_(machine_get_VexArchInfo)
and VG_(machine_ppc64_has_VMX)
VG_(machine_get_hwcaps) may use signals (although it attempts to
leave signal state unchanged) and therefore should only be
@ -456,11 +462,11 @@ void VG_(machine_ppc32_set_clszB)( Int szB )
/* Either the value must not have been set yet (zero) or we can
tolerate it being set to the same value multiple times, as the
stack scanning logic in m_main is a bit stupid. */
vg_assert(vai.ppc32_cache_line_szB == 0
|| vai.ppc32_cache_line_szB == szB);
vg_assert(vai.ppc_cache_line_szB == 0
|| vai.ppc_cache_line_szB == szB);
vg_assert(szB == 32 || szB == 128);
vai.ppc32_cache_line_szB = szB;
vai.ppc_cache_line_szB = szB;
}
#endif
@ -474,11 +480,11 @@ void VG_(machine_ppc64_set_clszB)( Int szB )
/* Either the value must not have been set yet (zero) or we can
tolerate it being set to the same value multiple times, as the
stack scanning logic in m_main is a bit stupid. */
vg_assert(vai.ppc32_cache_line_szB == 0
|| vai.ppc32_cache_line_szB == szB);
vg_assert(vai.ppc_cache_line_szB == 0
|| vai.ppc_cache_line_szB == szB);
vg_assert(szB == 32 || szB == 128);
vai.ppc32_cache_line_szB = szB;
vai.ppc_cache_line_szB = szB;
}
#endif

4
coregrind/m_transtab.c
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@ -31,7 +31,7 @@
#include "pub_core_basics.h"
#include "pub_core_debuglog.h"
#include "pub_core_machine.h" // ppc32: VG_(cache_line_size_ppc32)
#include "pub_core_machine.h" // For VG(machine_get_VexArchInfo)
#include "pub_core_libcbase.h"
#include "pub_core_libcassert.h"
#include "pub_core_libcprint.h"
@ -742,7 +742,7 @@ static void invalidate_icache ( void *ptr, Int nbytes )
VexArchInfo vai;
VG_(machine_get_VexArchInfo)( NULL, &vai );
cls = vai.ppc32_cache_line_szB;
cls = vai.ppc_cache_line_szB;
/* Stay sane .. */
vg_assert(cls == 32 || cls == 128);

2
coregrind/pub_core_machine.h
View File

@ -87,7 +87,7 @@
//-------------------------------------------------------------
/* Details about the capabilities of the underlying (host) CPU. These
details are acquired by (1) enquiring with the CPU at startup, or
(2) from the AT_SYSINFO entries the kernel gave us (ppc32 cache
(2) from the AT_SYSINFO entries the kernel gave us (ppc cache
line size). It's a bit nasty in the sense that there's no obvious
way to stop uses of some of this info before it's ready to go.