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mips64: upgrade parts of valgrind's fast cache for the n32 abi

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Update the list of architectures to differentiate between the n32 and n64 abi
for mips64 when defining the fast cache macros in
coregrind/pub_core_transtab_asm.h.

Also amend the VG_(disp_cp_xindir) function in
coregrind/m_dispatch/dispatch-mips64-linux.S to use word-sized loads in case
of the n32 abi since the FastCacheSet structure members are now 4 bytes in
size for mips64 n32.

Patch by Stefan Maksimovic.
This commit is contained in:
Petar Jovanovic 2019-11-14 12:32:50 +00:00
parent ef9ac3aa0f
commit 4456279023
2 changed files with 40 additions and 2 deletions
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36
coregrind/m_dispatch/dispatch-mips64-linux.S
View File

@ -220,6 +220,7 @@ VG_(disp_cp_xindir):
.long 0x0
1: // try way 1
#if defined(VGABI_64)
ld $14, FCS_g1($16)
bne $14, $10, 2f // cmp against .guest1
// hit at way 1; swap upwards
@ -230,6 +231,17 @@ VG_(disp_cp_xindir):
sd $13, FCS_h0($16) // new .host0 = old .host1
sd $11, FCS_g1($16) // new .guest1 = old .guest0
sd $12, FCS_h1($16) // new .host1 = old .host0
#elif defined(VGABI_N32)
lw $14, FCS_g1($16)
bne $14, $10, 2f
lw $11, FCS_g0($16)
lw $12, FCS_h0($16)
lw $13, FCS_h1($16)
sw $10, FCS_g0($16)
sw $13, FCS_h0($16)
sw $11, FCS_g1($16)
sw $12, FCS_h1($16)
#endif
// stats only
lw $15, VG_(stats__n_xIndir_hits1_32)
addiu $15, $15, 1
@ -240,6 +252,7 @@ VG_(disp_cp_xindir):
.long 0x0
2: // try way 2
#if defined(VGABI_64)
ld $14, FCS_g2($16)
bne $14, $10, 3f // cmp against .guest2
// hit at way 2; swap upwards
@ -250,6 +263,17 @@ VG_(disp_cp_xindir):
sd $13, FCS_h1($16)
sd $11, FCS_g2($16)
sd $12, FCS_h2($16)
#elif defined(VGABI_N32)
lw $14, FCS_g2($16)
bne $14, $10, 3f
lw $11, FCS_g1($16)
lw $12, FCS_h1($16)
lw $13, FCS_h2($16)
sw $10, FCS_g1($16)
sw $13, FCS_h1($16)
sw $11, FCS_g2($16)
sw $12, FCS_h2($16)
#endif
// stats only
lw $15, VG_(stats__n_xIndir_hits2_32)
addiu $15, $15, 1
@ -260,6 +284,7 @@ VG_(disp_cp_xindir):
.long 0x0
3: // try way 3
#if defined(VGABI_64)
ld $14, FCS_g3($16)
bne $14, $10, 4f // cmp against .guest3
// hit at way 3; swap upwards
@ -270,6 +295,17 @@ VG_(disp_cp_xindir):
sd $13, FCS_h2($16)
sd $11, FCS_g3($16)
sd $12, FCS_h3($16)
#elif defined(VGABI_N32)
lw $14, FCS_g3($16)
bne $14, $10, 4f
lw $11, FCS_g2($16)
lw $12, FCS_h2($16)
lw $13, FCS_h3($16)
sw $10, FCS_g2($16)
sw $13, FCS_h2($16)
sw $11, FCS_g3($16)
sw $12, FCS_h3($16)
#endif
// stats only
lw $15, VG_(stats__n_xIndir_hits3_32)
addiu $15, $15, 1

6
coregrind/pub_core_transtab_asm.h
View File

@ -81,7 +81,8 @@
// Log2(sizeof(FastCacheSet)). This is needed in the handwritten assembly.
#if defined(VGA_amd64) || defined(VGA_arm64) \
|| defined(VGA_ppc64be) || defined(VGA_ppc64le) || defined(VGA_mips64) \
|| defined(VGA_ppc64be) || defined(VGA_ppc64le) \
|| (defined(VGA_mips64) && defined(VGABI_64)) \
|| defined(VGA_s390x)
// And all other 64-bit hosts
# define VG_FAST_CACHE_SET_BITS 6
@ -97,7 +98,8 @@
# define FCS_h3 56
#elif defined(VGA_x86) || defined(VGA_arm) || defined(VGA_ppc32) \
|| defined(VGA_mips32) || defined(VGP_nanomips_linux)
|| defined(VGA_mips32) || defined(VGP_nanomips_linux) \
|| (defined(VGA_mips64) && defined(VGABI_N32))
// And all other 32-bit hosts
# define VG_FAST_CACHE_SET_BITS 5
# define FCS_g0 0