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https://github.com/Zenithsiz/ftmemsim-valgrind.git
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Callgrind: use memory block number as tag for simple model
Same as in Cachegrind. Gives a slight speedup. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13094
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@ -283,26 +283,30 @@ __attribute__((always_inline))
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static __inline__
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CacheResult cachesim_ref(cache_t2* c, Addr a, UChar size)
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{
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UInt set1 = ( a >> c->line_size_bits) & (c->sets_min_1);
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UInt set2 = ((a+size-1) >> c->line_size_bits) & (c->sets_min_1);
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UWord tag = a >> c->tag_shift;
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UWord block1 = a >> c->line_size_bits;
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UWord block2 = (a+size-1) >> c->line_size_bits;
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UInt set1 = block1 & c->sets_min_1;
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/* the tag does not need to include bits specifying the set,
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* but it can, and this saves instructions */
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UWord tag1 = block1;
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/* Access entirely within line. */
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if (set1 == set2)
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return cachesim_setref(c, set1, tag);
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if (block1 == block2)
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return cachesim_setref(c, set1, tag1);
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/* Access straddles two lines. */
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/* Nb: this is a fast way of doing ((set1+1) % c->sets) */
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else if (((set1 + 1) & (c->sets_min_1)) == set2) {
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UWord tag2 = (a+size-1) >> c->tag_shift;
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else if (block1 + 1 == block2) {
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UInt set2 = block2 & c->sets_min_1;
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UWord tag2 = block2;
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/* the call updates cache structures as side effect */
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CacheResult res1 = cachesim_setref(c, set1, tag);
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CacheResult res1 = cachesim_setref(c, set1, tag1);
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CacheResult res2 = cachesim_setref(c, set2, tag2);
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return ((res1 == Miss) || (res2 == Miss)) ? Miss : Hit;
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} else {
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VG_(printf)("addr: %lx size: %u sets: %d %d", a, size, set1, set2);
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VG_(printf)("addr: %lx size: %u blocks: %ld %ld",
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a, size, block1, block2);
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VG_(tool_panic)("item straddles more than two cache sets");
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}
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return Hit;
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