mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-04 10:21:20 +00:00
ML_(read_elf_debug_info): when processing PT_LOAD entries from the
program header, don't make the following assumptions - that there is only one r-x and one rw- entry - that the r-x entry appears before the rw- entry This makes it possible to handle ELF objects processed by Mike Hommey's elfhack program. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11794
This commit is contained in:
Julian Seward
parent
68f57d0181
commit
35756a6d62
@ -1150,6 +1150,13 @@ Word file_offset_from_svma ( /*OUT*/Bool* ok,
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info) and anything else we want, into the tables within the
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supplied DebugInfo.
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*/
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/* Temporarily holds information copied out of PT_LOAD entries
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in ML_(read_elf_debug_info. */
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typedef
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struct { Addr svma_base; Addr svma_limit; PtrdiffT bias; }
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RangeAndBias;
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Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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{
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Bool res, ok;
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@ -1182,13 +1189,20 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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UWord shdr_ent_szB = 0;
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UChar* shdr_strtab_img = NULL;
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/* SVMAs covered by rx and rw segments and corresponding bias. */
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Addr rx_svma_base = 0;
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Addr rx_svma_limit = 0;
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PtrdiffT rx_bias = 0;
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Addr rw_svma_base = 0;
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Addr rw_svma_limit = 0;
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PtrdiffT rw_bias = 0;
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/* SVMAs covered by rx and rw segments and corresponding biases.
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We keep separate lists of rx and rw areas. Each can have up to
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N_RX_RW_AREAS entries. Normally each object would provide just
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one rx and one rw area, but Mike Hommey's elfhack creates
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objects with two rx PT_LOAD entries, hence the generality. */
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const Int N_RX_RW_AREAS = 2;
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RangeAndBias rx[N_RX_RW_AREAS];
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RangeAndBias rw[N_RX_RW_AREAS];
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Word n_rx = 0; /* 0 .. N_RX_RW_AREAS */
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Word n_rw = 0; /* 0 .. N_RX_RW_AREAS */
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/* Pointless paranoia: */
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VG_(memset)( rx, 0, sizeof(rx) );
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VG_(memset)( rw, 0, sizeof(rw) );
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/* Build ID */
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Char* buildid = NULL;
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@ -1222,8 +1236,8 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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di->*rw_map* fields. First we examine the file's ELF Program
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Header, and, by comparing that against the di->*r{w,x}_map*
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info, try to figure out the AVMAs for the sections we care
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about, that should have been mapped: text, data, sdata, bss got,
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plt, and toc.
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about, that should have been mapped: text, data, sdata, bss,
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got, plt, and toc.
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---------------------------------------------------------- */
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res = False;
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@ -1338,9 +1352,11 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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TRACE_SYMTAB("shdr: string table at %p\n", shdr_strtab_img );
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/* Do another amazingly tedious thing: find out the .soname for
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this object. Apparently requires looking through the program
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header table. */
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/* Look through the program header table, and:
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- copy information from suitable PT_LOAD entries into rx[] or
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rw[]
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- find (or fake up) the .soname for this object.
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*/
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TRACE_SYMTAB("\n");
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TRACE_SYMTAB("------ Looking for the soname ------\n");
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vg_assert(di->soname == NULL);
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@ -1350,7 +1366,13 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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for (i = 0; i < phdr_nent; i++) {
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ElfXX_Phdr* phdr = INDEX_BIS( phdr_img, i, phdr_ent_szB );
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/* Make sure the PT_LOADable entries are in order */
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/* Make sure the PT_LOADable entries are in order and
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non-overlapping. This in turn means the address ranges
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slurped into rx[] and rw[] are in order and
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non-overlapping. */
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vg_assert(n_rx >= 0 && n_rx <= N_RX_RW_AREAS);
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vg_assert(n_rw >= 0 && n_rw <= N_RX_RW_AREAS);
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if (phdr->p_type == PT_LOAD) {
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TRACE_SYMTAB("PT_LOAD in order?: %#lx %#lx\n",
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prev_svma + 0UL,
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@ -1361,21 +1383,36 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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goto out;
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}
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prev_svma = phdr->p_vaddr;
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if (rx_svma_limit == 0
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&& phdr->p_offset >= di->rx_map_foff
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if (phdr->p_offset >= di->rx_map_foff
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&& phdr->p_offset < di->rx_map_foff + di->rx_map_size
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&& phdr->p_offset + phdr->p_filesz <= di->rx_map_foff + di->rx_map_size) {
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rx_svma_base = phdr->p_vaddr;
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rx_svma_limit = phdr->p_vaddr + phdr->p_memsz;
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rx_bias = di->rx_map_avma - di->rx_map_foff + phdr->p_offset - phdr->p_vaddr;
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&& phdr->p_offset + phdr->p_filesz <= di->rx_map_foff + di->rx_map_size
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&& (phdr->p_flags & (PF_R | PF_W | PF_X)) == (PF_R | PF_X)) {
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if (n_rx == N_RX_RW_AREAS) {
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ML_(symerr)(di, True,
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"N_RX_RW_AREAS is too low; increase and recompile.");
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goto out;
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}
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rx[n_rx].svma_base = phdr->p_vaddr;
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rx[n_rx].svma_limit = phdr->p_vaddr + phdr->p_memsz;
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rx[n_rx].bias = di->rx_map_avma - di->rx_map_foff
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+ phdr->p_offset - phdr->p_vaddr;
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n_rx++;
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}
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else if (rw_svma_limit == 0
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&& phdr->p_offset >= di->rw_map_foff
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&& phdr->p_offset < di->rw_map_foff + di->rw_map_size
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&& phdr->p_offset + phdr->p_filesz <= di->rw_map_foff + di->rw_map_size) {
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rw_svma_base = phdr->p_vaddr;
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rw_svma_limit = phdr->p_vaddr + phdr->p_memsz;
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rw_bias = di->rw_map_avma - di->rw_map_foff + phdr->p_offset - phdr->p_vaddr;
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else
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if (phdr->p_offset >= di->rw_map_foff
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&& phdr->p_offset < di->rw_map_foff + di->rw_map_size
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&& phdr->p_offset + phdr->p_filesz <= di->rw_map_foff + di->rw_map_size
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&& (phdr->p_flags & (PF_R | PF_W | PF_X)) == (PF_R | PF_W)) {
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if (n_rw == N_RX_RW_AREAS) {
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ML_(symerr)(di, True,
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"N_RX_RW_AREAS is too low; increase and recompile.");
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goto out;
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}
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rw[n_rw].svma_base = phdr->p_vaddr;
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rw[n_rw].svma_limit = phdr->p_vaddr + phdr->p_memsz;
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rw[n_rw].bias = di->rw_map_avma - di->rw_map_foff
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+ phdr->p_offset - phdr->p_vaddr;
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n_rw++;
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}
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}
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@ -1428,8 +1465,14 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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di->soname = "NONE";
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}
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vg_assert(rx_svma_limit != 0);
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vg_assert(rw_svma_limit != 0);
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vg_assert(n_rx >= 0 && n_rx <= N_RX_RW_AREAS);
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vg_assert(n_rw >= 0 && n_rw <= N_RX_RW_AREAS);
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for (i = 0; i < n_rx; i++) {
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vg_assert(rx[i].svma_limit != 0);
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}
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for (i = 0; i < n_rw; i++) {
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vg_assert(rw[i].svma_limit != 0);
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}
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/* Now read the section table. */
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TRACE_SYMTAB("\n");
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@ -1438,13 +1481,17 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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TRACE_SYMTAB("rx: at %#lx are mapped foffsets %ld .. %ld\n",
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di->rx_map_avma,
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di->rx_map_foff, di->rx_map_foff + di->rx_map_size - 1 );
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TRACE_SYMTAB("rx: contains svmas %#lx .. %#lx with bias %#lx\n",
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rx_svma_base, rx_svma_limit - 1, rx_bias );
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for (i = 0; i < n_rx; i++) {
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TRACE_SYMTAB("rx[%ld]: contains svmas %#lx .. %#lx with bias %#lx\n",
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i, rx[i].svma_base, rx[i].svma_limit - 1, rx[i].bias );
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}
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TRACE_SYMTAB("rw: at %#lx are mapped foffsets %ld .. %ld\n",
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di->rw_map_avma,
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di->rw_map_foff, di->rw_map_foff + di->rw_map_size - 1 );
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TRACE_SYMTAB("rw: contains svmas %#lx .. %#lx with bias %#lx\n",
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rw_svma_base, rw_svma_limit - 1, rw_bias );
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for (i = 0; i < n_rw; i++) {
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TRACE_SYMTAB("rw[%ld]: contains svmas %#lx .. %#lx with bias %#lx\n",
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i, rw[i].svma_base, rw[i].svma_limit - 1, rw[i].bias );
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}
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/* Iterate over section headers */
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for (i = 0; i < shdr_nent; i++) {
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@ -1455,8 +1502,26 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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UWord size = shdr->sh_size;
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UInt alyn = shdr->sh_addralign;
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Bool bits = !(shdr->sh_type == SHT_NOBITS);
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Bool inrx = svma >= rx_svma_base && svma < rx_svma_limit;
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Bool inrw = svma >= rw_svma_base && svma < rw_svma_limit;
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/* Look through our collection of info obtained from the PT_LOAD
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headers, and make 'inrx' and 'inrw' point to the first entry
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in each that intersects 'avma'. If in each case none is found,
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leave the relevant pointer at NULL. */
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RangeAndBias* inrx = NULL;
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RangeAndBias* inrw = NULL;
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{ Word j;
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for (j = 0; j < n_rx; j++) {
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if (svma >= rx[j].svma_base && svma < rx[j].svma_limit) {
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inrx = &rx[j];
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break;
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}
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}
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for (j = 0; j < n_rw; j++) {
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if (svma >= rw[j].svma_base && svma < rw[j].svma_limit) {
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inrw = &rw[j];
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break;
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}
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}
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}
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TRACE_SYMTAB(" [sec %2ld] %s %s al%2u foff %6ld .. %6ld "
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" svma %p name \"%s\"\n",
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@ -1492,11 +1557,11 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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if (inrx && size >= 0 && !di->text_present) {
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di->text_present = True;
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di->text_svma = svma;
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di->text_avma = svma + rx_bias;
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di->text_avma = svma + rx->bias;
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di->text_size = size;
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di->text_bias = rx_bias;
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di->text_bias = rx->bias;
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di->text_debug_svma = svma;
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di->text_debug_bias = rx_bias;
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di->text_debug_bias = rx->bias;
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TRACE_SYMTAB("acquiring .text svma = %#lx .. %#lx\n",
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di->text_svma,
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di->text_svma + di->text_size - 1);
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@ -1514,11 +1579,11 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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if (inrw && size >= 0 && !di->data_present) {
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di->data_present = True;
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di->data_svma = svma;
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di->data_avma = svma + rw_bias;
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di->data_avma = svma + inrw->bias;
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di->data_size = size;
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di->data_bias = rw_bias;
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di->data_bias = inrw->bias;
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di->data_debug_svma = svma;
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di->data_debug_bias = rw_bias;
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di->data_debug_bias = inrw->bias;
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TRACE_SYMTAB("acquiring .data svma = %#lx .. %#lx\n",
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di->data_svma,
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di->data_svma + di->data_size - 1);
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@ -1536,11 +1601,11 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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if (inrw && size > 0 && !di->sdata_present) {
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di->sdata_present = True;
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di->sdata_svma = svma;
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di->sdata_avma = svma + rw_bias;
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di->sdata_avma = svma + inrw->bias;
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di->sdata_size = size;
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di->sdata_bias = rw_bias;
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di->sdata_bias = inrw->bias;
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di->sdata_debug_svma = svma;
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di->sdata_debug_bias = rw_bias;
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di->sdata_debug_bias = inrw->bias;
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TRACE_SYMTAB("acquiring .sdata svma = %#lx .. %#lx\n",
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di->sdata_svma,
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di->sdata_svma + di->sdata_size - 1);
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@ -1558,11 +1623,12 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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if (inrx && size >= 0 && !di->rodata_present) {
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di->rodata_present = True;
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di->rodata_svma = svma;
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di->rodata_avma = svma + rx_bias;
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di->rodata_avma = svma + rx->bias;
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di->rodata_size = size;
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di->rodata_bias = rx_bias;
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di->rodata_bias = rx->bias;
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di->rodata_debug_svma = svma;
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di->rodata_debug_bias = rw_bias;
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di->rodata_debug_bias = inrx->bias;
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/* NB was 'inrw' prior to rXXXXX */
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TRACE_SYMTAB("acquiring .rodata svma = %#lx .. %#lx\n",
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di->rodata_svma,
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di->rodata_svma + di->rodata_size - 1);
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@ -1580,11 +1646,11 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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dynbss_present = True;
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di->bss_present = True;
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di->bss_svma = svma;
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di->bss_avma = svma + rw_bias;
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di->bss_avma = svma + inrw->bias;
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di->bss_size = size;
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di->bss_bias = rw_bias;
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di->bss_bias = inrw->bias;
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di->bss_debug_svma = svma;
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di->bss_debug_bias = rw_bias;
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di->bss_debug_bias = inrw->bias;
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TRACE_SYMTAB("acquiring .dynbss svma = %#lx .. %#lx\n",
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di->bss_svma,
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di->bss_svma + di->bss_size - 1);
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@ -1605,18 +1671,18 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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TRACE_SYMTAB("acquiring .bss svma = %#lx .. %#lx\n",
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svma, svma + size - 1);
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TRACE_SYMTAB("acquiring .bss avma = %#lx .. %#lx\n",
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svma + rw_bias, svma + rw_bias + size - 1);
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svma + inrw->bias, svma + inrw->bias + size - 1);
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TRACE_SYMTAB("acquiring .bss bias = %#lx\n", di->bss_bias);
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} else
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if (inrw && size >= 0 && !di->bss_present) {
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di->bss_present = True;
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di->bss_svma = svma;
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di->bss_avma = svma + rw_bias;
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di->bss_avma = svma + inrw->bias;
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di->bss_size = size;
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di->bss_bias = rw_bias;
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di->bss_bias = inrw->bias;
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di->bss_debug_svma = svma;
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di->bss_debug_bias = rw_bias;
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di->bss_debug_bias = inrw->bias;
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TRACE_SYMTAB("acquiring .bss svma = %#lx .. %#lx\n",
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di->bss_svma,
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di->bss_svma + di->bss_size - 1);
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@ -1665,11 +1731,11 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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sdynbss_present = True;
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di->sbss_present = True;
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di->sbss_svma = svma;
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di->sbss_avma = svma + rw_bias;
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di->sbss_avma = svma + inrw->bias;
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di->sbss_size = size;
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di->sbss_bias = rw_bias;
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di->sbss_bias = inrw->bias;
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di->sbss_debug_svma = svma;
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di->sbss_debug_bias = rw_bias;
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di->sbss_debug_bias = inrw->bias;
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TRACE_SYMTAB("acquiring .sdynbss svma = %#lx .. %#lx\n",
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di->sbss_svma,
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di->sbss_svma + di->sbss_size - 1);
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@ -1690,18 +1756,18 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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TRACE_SYMTAB("acquiring .sbss svma = %#lx .. %#lx\n",
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svma, svma + size - 1);
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TRACE_SYMTAB("acquiring .sbss avma = %#lx .. %#lx\n",
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svma + rw_bias, svma + rw_bias + size - 1);
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svma + inrw->bias, svma + inrw->bias + size - 1);
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TRACE_SYMTAB("acquiring .sbss bias = %#lx\n", di->sbss_bias);
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} else
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if (inrw && size > 0 && !di->sbss_present) {
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di->sbss_present = True;
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di->sbss_svma = svma;
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di->sbss_avma = svma + rw_bias;
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di->sbss_avma = svma + inrw->bias;
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di->sbss_size = size;
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di->sbss_bias = rw_bias;
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di->sbss_bias = inrw->bias;
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di->sbss_debug_svma = svma;
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di->sbss_debug_bias = rw_bias;
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di->sbss_debug_bias = inrw->bias;
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TRACE_SYMTAB("acquiring .sbss svma = %#lx .. %#lx\n",
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di->sbss_svma,
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di->sbss_svma + di->sbss_size - 1);
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@ -1718,7 +1784,7 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
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if (0 == VG_(strcmp)(name, ".got")) {
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if (inrw && size > 0 && !di->got_present) {
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di->got_present = True;
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di->got_avma = svma + rw_bias;
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di->got_avma = svma + inrw->bias;
|
||||
di->got_size = size;
|
||||
TRACE_SYMTAB("acquiring .got avma = %#lx\n", di->got_avma);
|
||||
} else {
|
||||
@ -1730,7 +1796,7 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
|
||||
if (0 == VG_(strcmp)(name, ".got.plt")) {
|
||||
if (inrw && size > 0 && !di->gotplt_present) {
|
||||
di->gotplt_present = True;
|
||||
di->gotplt_avma = svma + rw_bias;
|
||||
di->gotplt_avma = svma + inrw->bias;
|
||||
di->gotplt_size = size;
|
||||
TRACE_SYMTAB("acquiring .got.plt avma = %#lx\n", di->gotplt_avma);
|
||||
} else if (size != 0) {
|
||||
@ -1745,7 +1811,7 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
|
||||
if (0 == VG_(strcmp)(name, ".plt")) {
|
||||
if (inrx && size > 0 && !di->plt_present) {
|
||||
di->plt_present = True;
|
||||
di->plt_avma = svma + rx_bias;
|
||||
di->plt_avma = svma + rx->bias;
|
||||
di->plt_size = size;
|
||||
TRACE_SYMTAB("acquiring .plt avma = %#lx\n", di->plt_avma);
|
||||
} else {
|
||||
@ -1757,7 +1823,7 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
|
||||
if (0 == VG_(strcmp)(name, ".plt")) {
|
||||
if (inrw && size > 0 && !di->plt_present) {
|
||||
di->plt_present = True;
|
||||
di->plt_avma = svma + rw_bias;
|
||||
di->plt_avma = svma + inrw->bias;
|
||||
di->plt_size = size;
|
||||
TRACE_SYMTAB("acquiring .plt avma = %#lx\n", di->plt_avma);
|
||||
} else {
|
||||
@ -1769,7 +1835,7 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
|
||||
if (0 == VG_(strcmp)(name, ".plt")) {
|
||||
if (inrw && size > 0 && !di->plt_present) {
|
||||
di->plt_present = True;
|
||||
di->plt_avma = svma + rw_bias;
|
||||
di->plt_avma = svma + inrw->bias;
|
||||
di->plt_size = size;
|
||||
TRACE_SYMTAB("acquiring .plt avma = %#lx\n", di->plt_avma);
|
||||
} else
|
||||
@ -1792,7 +1858,7 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
|
||||
if (0 == VG_(strcmp)(name, ".opd")) {
|
||||
if (inrw && size > 0 && !di->opd_present) {
|
||||
di->opd_present = True;
|
||||
di->opd_avma = svma + rw_bias;
|
||||
di->opd_avma = svma + inrw->bias;
|
||||
di->opd_size = size;
|
||||
TRACE_SYMTAB("acquiring .opd avma = %#lx\n", di->opd_avma);
|
||||
} else {
|
||||
@ -1806,14 +1872,14 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di )
|
||||
ELF object. */
|
||||
if (0 == VG_(strcmp)(name, ".eh_frame")) {
|
||||
if (inrx && size > 0 && di->n_ehframe < N_EHFRAME_SECTS) {
|
||||
di->ehframe_avma[di->n_ehframe] = svma + rx_bias;
|
||||
di->ehframe_avma[di->n_ehframe] = svma + rx->bias;
|
||||
di->ehframe_size[di->n_ehframe] = size;
|
||||
TRACE_SYMTAB("acquiring .eh_frame avma = %#lx\n",
|
||||
di->ehframe_avma[di->n_ehframe]);
|
||||
di->n_ehframe++;
|
||||
} else
|
||||
if (inrw && size > 0 && di->n_ehframe < N_EHFRAME_SECTS) {
|
||||
di->ehframe_avma[di->n_ehframe] = svma + rw_bias;
|
||||
di->ehframe_avma[di->n_ehframe] = svma + inrw->bias;
|
||||
di->ehframe_size[di->n_ehframe] = size;
|
||||
TRACE_SYMTAB("acquiring .eh_frame avma = %#lx\n",
|
||||
di->ehframe_avma[di->n_ehframe]);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user