Change the core-tool interface so that tools are fully aware of both

the guest extents for the presented translation and also its original
un-redirected guest address.  These changes are needed in particular
to make cachegrind's code cache management work properly.



git-svn-id: svn://svn.valgrind.org/valgrind/trunk@4943
This commit is contained in:
Julian Seward 2005-10-18 12:04:18 +00:00
parent e5264d94c5
commit 1813e8fdcd
12 changed files with 74 additions and 41 deletions

View File

@ -141,7 +141,7 @@ struct _InstrInfo {
typedef struct _BB_info BB_info;
struct _BB_info {
Addr BB_addr; // key
Addr BB_addr; // key; MUST BE FIRST
Int n_instrs;
InstrInfo instrs[0];
};
@ -452,6 +452,8 @@ typedef
/*--- Instrumentation main ---*/
/*------------------------------------------------------------*/
// Note that origAddr is the real origAddr, not the address of the first
// instruction in the block (they can be different due to redirection).
static
BB_info* get_BB_info(IRBB* bbIn, Addr origAddr)
{
@ -731,8 +733,10 @@ void addEvent_Dw ( CgState* cgs, InstrInfo* inode, Int datasize, IRAtom* ea )
////////////////////////////////////////////////////////////
static IRBB* cg_instrument ( IRBB* bbIn, VexGuestLayout* layout,
IRType gWordTy, IRType hWordTy )
static
IRBB* cg_instrument ( IRBB* bbIn, VexGuestLayout* layout,
Addr64 orig_addr_noredir, VexGuestExtents* vge,
IRType gWordTy, IRType hWordTy )
{
Int i, isize;
IRStmt* st;
@ -763,7 +767,7 @@ static IRBB* cg_instrument ( IRBB* bbIn, VexGuestLayout* layout,
// Set up running state and get block info
cgs.events_used = 0;
cgs.bbInfo = get_BB_info(bbIn, (Addr)cia);
cgs.bbInfo = get_BB_info(bbIn, (Addr)orig_addr_noredir);
cgs.bbInfo_i = 0;
if (DEBUG_CG)
@ -1241,18 +1245,22 @@ static void cg_fini(Int exitcode)
// Called when a translation is removed from the translation cache for
// any reason at all: to free up space, because the guest code was
// unmapped or modified, or for any arbitrary reason.
static void cg_discard_basic_block_info ( VexGuestExtents vge )
static
void cg_discard_basic_block_info ( Addr64 orig_addr64, VexGuestExtents vge )
{
BB_info* bbInfo;
Addr orig_addr = (Addr)orig_addr64;
tl_assert(vge.n_used > 0);
if (DEBUG_CG)
VG_(printf)( "discard_basic_block_info: %p, %llu\n",
VG_(printf)( "discard_basic_block_info: %p, %p, %llu\n",
(void*)(Addr)orig_addr,
(void*)(Addr)vge.base[0], (ULong)vge.len[0]);
// Get BB info, remove from table, free BB info. Simple!
bbInfo = VG_(OSet_Remove)(instrInfoTable, &(vge.base[0]));
// Get BB info, remove from table, free BB info. Simple! Note that we
// use orig_addr, not the first instruction address in vge.
bbInfo = VG_(OSet_Remove)(instrInfoTable, &orig_addr);
tl_assert(NULL != bbInfo);
VG_(OSet_FreeNode)(instrInfoTable, bbInfo);
}
@ -1375,7 +1383,7 @@ static void cg_pre_clo_init(void)
CC_table = VG_(OSet_Create)(offsetof(LineCC, loc),
cmp_CodeLoc_LineCC,
VG_(malloc), VG_(free));
instrInfoTable = VG_(OSet_Create)(offsetof(BB_info, BB_addr),
instrInfoTable = VG_(OSet_Create)(/*keyOff*/0,
NULL,
VG_(malloc), VG_(free));
stringTable = VG_(OSet_Create)(/*keyOff*/0,

View File

@ -40,7 +40,8 @@ VgToolInterface VG_(tdict);
void VG_(basic_tool_funcs)(
void(*post_clo_init)(void),
IRBB*(*instrument)(IRBB*, VexGuestLayout*, IRType, IRType ),
IRBB*(*instrument)(IRBB*, VexGuestLayout*,
Addr64, VexGuestExtents*, IRType, IRType ),
void(*fini)(Int)
)
{
@ -154,7 +155,7 @@ NEEDS(core_errors)
NEEDS(data_syms)
void VG_(needs_basic_block_discards)(
void (*discard)(VexGuestExtents)
void (*discard)(Addr64, VexGuestExtents)
)
{
VG_(needs).basic_block_discards = True;

View File

@ -166,8 +166,12 @@ static Bool need_to_handle_SP_assignment(void)
*/
static
IRBB* vg_SP_update_pass ( IRBB* bb_in, VexGuestLayout* layout,
IRType gWordTy, IRType hWordTy )
IRBB* vg_SP_update_pass ( IRBB* bb_in,
VexGuestLayout* layout,
Addr64 orig_addr_noredir,
VexGuestExtents* vge,
IRType gWordTy,
IRType hWordTy )
{
Int i, j, minoff_ST, maxoff_ST, sizeof_SP, offset_SP;
IRDirty *dcall, *d;
@ -520,7 +524,7 @@ Bool VG_(translate) ( ThreadId tid,
Int debugging_verbosity,
ULong bbs_done )
{
Addr64 redir, orig_addr0 = orig_addr;
Addr64 redir, orig_addr_noredir = orig_addr;
Int tmpbuf_used, verbosity, i;
Bool notrace_until_done, do_self_check;
UInt notrace_until_limit = 0;
@ -672,6 +676,7 @@ Bool VG_(translate) ( ThreadId tid,
vex_arch, &vex_archinfo,
(UChar*)ULong_to_Ptr(orig_addr),
(Addr64)orig_addr,
(Addr64)orig_addr_noredir,
chase_into_ok,
&vge,
tmpbuf, N_TMPBUF, &tmpbuf_used,
@ -711,10 +716,10 @@ Bool VG_(translate) ( ThreadId tid,
// If debugging, don't do anything with the translated block; we
// only did this for the debugging output produced along the way.
if (!debugging_translation) {
// Note that we use orig_addr0, not orig_addr, which might have been
// changed by the redirection
// Note that we use orig_addr_noredir, not orig_addr, which
// might have been changed by the redirection
VG_(add_to_transtab)( &vge,
orig_addr0,
orig_addr_noredir,
(Addr)(&tmpbuf[0]),
tmpbuf_used,
do_self_check );

View File

@ -688,6 +688,7 @@ static void initialiseSector ( Int sno )
/* Tell the tool too. */
if (VG_(needs).basic_block_discards) {
VG_TDICT_CALL( tool_discard_basic_block_info,
sec->tt[i].entry,
sec->tt[i].vge );
}
} else {
@ -1011,6 +1012,7 @@ static void delete_tte ( /*MOD*/Sector* sec, Int tteno )
/* Tell the tool too. */
if (VG_(needs).basic_block_discards) {
VG_TDICT_CALL( tool_discard_basic_block_info,
tte->entry,
tte->vge );
}
}

View File

@ -104,7 +104,8 @@ typedef struct {
// Basic functions
void (*tool_pre_clo_init) (void);
void (*tool_post_clo_init)(void);
IRBB* (*tool_instrument) (IRBB*, VexGuestLayout*, IRType, IRType);
IRBB* (*tool_instrument) (IRBB*, VexGuestLayout*,
Addr64, VexGuestExtents*, IRType, IRType);
void (*tool_fini) (Int);
// VG_(needs).core_errors
@ -121,7 +122,7 @@ typedef struct {
void (*tool_print_extra_suppression_info)(Error*);
// VG_(needs).basic_block_discards
void (*tool_discard_basic_block_info)(VexGuestExtents);
void (*tool_discard_basic_block_info)(Addr64, VexGuestExtents);
// VG_(needs).command_line_options
Bool (*tool_process_cmd_line_option)(Char*);

View File

@ -2297,8 +2297,10 @@ UCodeBlock* TL_(instrument) ( UCodeBlock* cb_in, Addr not_used )
return cb;
}
#endif
static IRBB* hg_instrument ( IRBB* bb_in, VexGuestLayout* layout,
IRType gWordTy, IRType hWordTy )
static
IRBB* hg_instrument ( IRBB* bb_in, VexGuestLayout* layout,
Addr64 orig_addr_noredir, VexGuestExtents* vge,
IRType gWordTy, IRType hWordTy )
{
tl_assert(0); // Need to convert to Vex
}

View File

@ -78,10 +78,14 @@ extern void VG_(basic_tool_funcs)(
// processing.
void (*post_clo_init)(void),
// Instrument a basic block. Must be a true function, ie. the same input
// always results in the same output, because basic blocks can be
// retranslated. Unless you're doing something really strange...
IRBB* (*instrument)(IRBB* bb_in, VexGuestLayout* layout,
// Instrument a basic block. Must be a true function, ie. the same
// input always results in the same output, because basic blocks
// can be retranslated. Unless you're doing something really
// strange... Note that orig_addr_noredir is not necessarily the
// same as the address of the first instruction in the IR, due to
// function redirection.
IRBB* (*instrument)(IRBB* bb_in, VexGuestLayout* layout,
Addr64 orig_addr_noredir, VexGuestExtents* vge,
IRType gWordTy, IRType hWordTy ),
// Finish up, print out any results, etc. `exitcode' is program's exit
@ -195,19 +199,21 @@ extern void VG_(needs_tool_errors) (
reused for new translations. */
extern void VG_(needs_basic_block_discards) (
// Discard any information that pertains to specific translations
// or instructions within the address range given. The "extents"
// arg can be used in two ways.
// - If info is being stored at a per-translation level, the first
// address in the extents can be used to identify which translation
// is being discarded. Each translation will be discarded exactly
// once.
// or instructions within the address range given. There are two
// possible approaches.
// - If info is being stored at a per-translation level, use orig_addr
// to identify which translation is being discarded. Each translation
// will be discarded exactly once.
// This orig_addr will match the orig_addr which was passed to
// to instrument() when this translation was made. Note that orig_addr
// won't necessarily be the same as the first address in "extents".
// - If info is being stored at a per-instruction level, you can get
// the address range(s) being discarded by stepping through "extents".
// Note that any single instruction may belong to more than one
// translation, and so could be covered by the "extents" of more than
// one call to this function.
// Doing it the first way (as eg. Cachegrind does) is probably easier.
void (*discard_basic_block_info)(VexGuestExtents vge)
void (*discard_basic_block_info)(Addr64 orig_addr, VexGuestExtents extents)
);
/* Tool defines its own command line options? */

View File

@ -124,8 +124,10 @@ static void lk_post_clo_init(void)
Which gives us the right answer. And just to avoid two C calls, we fold
the basic-block-beginning call in with add_one_BB(). Phew.
*/
static IRBB* lk_instrument(IRBB* bb_in, VexGuestLayout* layout,
IRType gWordTy, IRType hWordTy )
static
IRBB* lk_instrument( IRBB* bb_in, VexGuestLayout* layout,
Addr64 orig_addr_noredir, VexGuestExtents* vge,
IRType gWordTy, IRType hWordTy )
{
IRDirty* di;
Int i;

View File

@ -1148,8 +1148,10 @@ static Bool ms_handle_client_request ( ThreadId tid, UWord* argv, UWord* ret )
/*--- Instrumentation ---*/
/*------------------------------------------------------------*/
static IRBB* ms_instrument ( IRBB* bb_in, VexGuestLayout* layout,
IRType gWordTy, IRType hWordTy )
static
IRBB* ms_instrument ( IRBB* bb_in, VexGuestLayout* layout,
Addr64 orig_addr_noredir, VexGuestExtents* vge,
IRType gWordTy, IRType hWordTy )
{
/* XXX Will Massif work when gWordTy != hWordTy ? */
return bb_in;

View File

@ -79,9 +79,10 @@ extern VG_REGPARM(1) UWord MC_(helperc_LOADV1) ( Addr );
extern void MC_(helperc_MAKE_STACK_UNINIT) ( Addr base, UWord len );
/* Functions defined in mc_translate.c */
extern IRBB* MC_(instrument) ( IRBB* bb_in, VexGuestLayout* layout,
IRType gWordTy, IRType hWordTy );
extern
IRBB* MC_(instrument) ( IRBB* bb_in, VexGuestLayout* layout,
Addr64 orig_addr_noredir, VexGuestExtents* vge,
IRType gWordTy, IRType hWordTy );
#endif /* ndef __MC_INCLUDE_H */

View File

@ -2810,6 +2810,7 @@ static Bool checkForBogusLiterals ( /*FLAT*/ IRStmt* st )
IRBB* MC_(instrument) ( IRBB* bb_in, VexGuestLayout* layout,
Addr64 orig_addr_noredir, VexGuestExtents* vge,
IRType gWordTy, IRType hWordTy )
{
Bool verboze = False; //True;

View File

@ -36,8 +36,10 @@ static void nl_post_clo_init(void)
{
}
static IRBB* nl_instrument(IRBB* bb, VexGuestLayout* layout,
IRType gWordTy, IRType hWordTy)
static
IRBB* nl_instrument(IRBB* bb, VexGuestLayout* layout,
Addr64 orig_addr_noredir, VexGuestExtents* vge,
IRType gWordTy, IRType hWordTy)
{
return bb;
}