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arm-linux: zero out the least significant bit of R15 that we

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ptrace into the child, so as to be a legitimate instruction
address in both ARM and Thumb mode.


git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11375
This commit is contained in:
Julian Seward 2010-09-23 11:02:48 +00:00
parent 9258157b08
commit 0bfbb21837
1 changed files with 4 additions and 1 deletions
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5
coregrind/m_debugger.c
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@ -223,7 +223,10 @@ static Int ptrace_setregs(Int pid, VexGuestArchState* vex)
uregs.ARM_ip = vex->guest_R12;
uregs.ARM_sp = vex->guest_R13;
uregs.ARM_lr = vex->guest_R14;
uregs.ARM_pc = vex->guest_R15T;
// Remove the T bit from the bottom of R15T. It will get shipped
// over in CPSR.T instead, since LibVEX_GuestARM_get_cpsr copies
// it from R15T[0].
uregs.ARM_pc = vex->guest_R15T & 0xFFFFFFFE;
uregs.ARM_cpsr = LibVEX_GuestARM_get_cpsr(vex);
return VG_(ptrace)(VKI_PTRACE_SETREGS, pid, NULL, &uregs);