mirror of
https://github.com/Zenithsiz/ftmemsim-valgrind.git
synced 2026-02-03 18:13:01 +00:00
Patch 7 of 7, improve PPC HW capabiltiy checking.
The patch was submitted by Will Schmidt (will_schmidt@vnet.ibm.com). A handful of cosmetic changes to the ppc32 and ppc64 makefiles. Cleans up some whitespace issues, spaces/tabs/etc, Rearranges some of the contents so they are logically group, and more consistent between the 32- and 64- bit versions of the same. Bugzilla 34979 git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15425
This commit is contained in:
Carl Love
parent
a06e72acfe
commit
059aa611c1
@ -9,12 +9,12 @@ EXTRA_DIST = \
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bug139050-ppc32.stdout.exp bug139050-ppc32.stderr.exp \
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bug139050-ppc32.vgtest \
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ldstrev.stderr.exp ldstrev.stdout.exp ldstrev.vgtest \
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lsw.stderr.exp lsw.stdout.exp lsw.vgtest \
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jm-int.stderr.exp jm-int.stdout.exp jm-int.vgtest \
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jm-fp.stderr.exp jm-fp.stdout.exp jm-fp.vgtest jm-fp.stdout.exp-BE2 \
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jm-vmx.stderr.exp jm-vmx.stdout.exp jm-vmx.stdout.exp_Minus_nan \
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jm-vmx.vgtest \
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jm-misc.stderr.exp jm-misc.stdout.exp jm-misc.vgtest \
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lsw.stderr.exp lsw.stdout.exp lsw.vgtest \
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mftocrf.stderr.exp mftocrf.stdout.exp mftocrf.vgtest \
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mcrfs.stderr.exp mcrfs.stdout.exp mcrfs.vgtest \
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round.stderr.exp round.stdout.exp round.vgtest \
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@ -40,31 +40,25 @@ EXTRA_DIST = \
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test_dfp5.stderr.exp test_dfp5.stdout.exp test_dfp5.vgtest \
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jm_vec_isa_2_07.stderr.exp jm_vec_isa_2_07.stdout.exp jm_vec_isa_2_07.vgtest \
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jm_fp_isa_2_07.stderr.exp jm_fp_isa_2_07.stdout.exp jm_fp_isa_2_07.vgtest \
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jm_int_isa_2_07.stdout.exp \
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jm_int_isa_2_07.stderr.exp jm_int_isa_2_07.vgtest \
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jm_int_isa_2_07.stdout.exp \
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test_isa_2_07_part2.stderr.exp test_isa_2_07_part2.stdout.exp test_isa_2_07_part2.vgtest \
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test_tm.stderr.exp test_tm.stdout.exp test_tm.vgtest \
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test_touch_tm.stderr.exp test_touch_tm.stdout.exp test_touch_tm.vgtest \
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ldst_multiple.stderr.exp ldst_multiple.stdout.exp ldst_multiple.vgtest \
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data-cache-instructions.stderr.exp data-cache-instructions.stdout.exp data-cache-instructions.vgtest
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check_PROGRAMS = \
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allexec \
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bug129390-ppc32 \
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bug139050-ppc32 \
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ldstrev lsw jm-insns mftocrf mcrfs round test_fx test_gx \
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testVMX twi tw xlc_dbl_u32 power5+_round power6_bcmp \
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test_isa_2_06_part1 \
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test_isa_2_06_part2 \
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test_isa_2_06_part3 \
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lsw jm-insns round \
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test_isa_2_06_part1 test_isa_2_06_part2 test_isa_2_06_part3 \
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test_dfp1 test_dfp2 test_dfp3 test_dfp4 test_dfp5 \
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test_isa_2_07_part1 \
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test_isa_2_07_part2 \
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test_tm \
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test_touch_tm \
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ldst_multiple \
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data-cache-instructions
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test_isa_2_07_part1 test_isa_2_07_part2 \
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test_tm test_touch_tm ldst_multiple data-cache-instructions \
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test_fx test_gx \
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testVMX twi tw xlc_dbl_u32 power5+_round power6_bcmp \
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bug129390-ppc32 bug139050-ppc32 \
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ldstrev mftocrf mcrfs
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AM_CFLAGS += @FLAG_M32@
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AM_CXXFLAGS += @FLAG_M32@
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@ -132,16 +126,13 @@ test_dfp2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_DFP)
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test_dfp3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_DFP)
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test_dfp4_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_DFP)
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test_dfp5_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_DFP)
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test_isa_2_07_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
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@FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
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test_isa_2_07_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
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@FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
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@ -17,7 +17,8 @@ EXTRA_DIST = \
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opcodes.h \
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power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \
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power6_mf_gpr.stderr.exp power6_mf_gpr.stdout.exp power6_mf_gpr.vgtest \
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test_isa_2_06_part1.stderr.exp test_isa_2_06_part1.stdout.exp test_isa_2_06_part1.vgtest test_isa_2_06_part1.stdout.exp-LE \
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test_isa_2_06_part1.stderr.exp test_isa_2_06_part1.stdout.exp test_isa_2_06_part1.vgtest \
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test_isa_2_06_part1.stdout.exp-LE \
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test_isa_2_06_part2.stderr.exp test_isa_2_06_part2.stdout.exp test_isa_2_06_part2.vgtest \
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test_isa_2_06_part3.stderr.exp test_isa_2_06_part3.stdout.exp test_isa_2_06_part3.vgtest \
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test_dfp1.stderr.exp test_dfp1.stdout.exp test_dfp1.vgtest \
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@ -38,11 +39,14 @@ EXTRA_DIST = \
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check_PROGRAMS = \
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allexec \
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jm-insns lsw round std_reg_imm twi_tdi tw_td power6_bcmp \
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power6_mf_gpr test_isa_2_06_part1 test_isa_2_06_part2 \
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test_isa_2_06_part3 test_dfp1 test_dfp2 test_dfp3 test_dfp4 \
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test_dfp5 test_isa_2_07_part1 test_isa_2_07_part2 \
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test_tm test_touch_tm ldst_multiple data-cache-instructions
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lsw jm-insns round \
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test_isa_2_06_part1 test_isa_2_06_part2 test_isa_2_06_part3 \
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test_dfp1 test_dfp2 test_dfp3 test_dfp4 test_dfp5 \
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test_isa_2_07_part1 test_isa_2_07_part2 \
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test_tm test_touch_tm ldst_multiple data-cache-instructions \
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power6_mf_gpr std_reg_imm \
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twi_tdi tw_td power6_bcmp
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AM_CFLAGS += @FLAG_M64@
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AM_CXXFLAGS += @FLAG_M64@
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@ -86,6 +90,9 @@ if SUPPORTS_HTM
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HTM_FLAG = -mhtm -DSUPPORTS_HTM
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endif
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jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames \
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@FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_ALTIVEC)
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test_isa_2_06_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
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@FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
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@ -95,26 +102,19 @@ test_isa_2_06_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_
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test_isa_2_06_part3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
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@FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
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jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames \
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@FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_ALTIVEC)
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test_dfp1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M64@ $(BUILD_FLAGS_DFP)
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test_dfp2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M64@ $(BUILD_FLAGS_DFP)
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test_dfp3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M64@ $(BUILD_FLAGS_DFP)
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test_dfp4_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M64@ $(BUILD_FLAGS_DFP)
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test_dfp5_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
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@FLAG_M64@ $(BUILD_FLAGS_DFP)
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test_isa_2_07_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
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@FLAG_M64@ $(BUILD_FLAGS_ISA_2_07)
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test_isa_2_07_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
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@FLAG_M64@ $(BUILD_FLAGS_ISA_2_07)
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